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2022-01-05rtc: rs5c372: fix incorrect oscillation value on r2221tlCamel Guo1-3/+7
The XSL bit only exists in RS5C372A/B. On other Ricoh RTC chips supported in rs5c372, this bit has different meaning. For example, on R2221x and R2223x, this bit of oscillation adjustment register determines the operation frequency of oscillation adjustment circuit and the oscillation is always 32768HZ. But rs5c372_get_trim gives 32000HZ to osc when DEV is 1. Signed-off-by: Camel Guo <camelg@axis.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/20211206125832.6461-1-camel.guo@axis.com
2022-01-04rtc: rs5c372: add offset correction supportCamel Guo1-0/+120
In order for linux userspace application to be able to adjust offset to keep rtc precision as high as possible, this commit adds support of offset correction by adjusting the time trimming register on rs5c372[a|b] and oscilluation adjustment register on r2025x, r222[1|3]x, rv5c38[6|7]a. Signed-off-by: Camel Guo <camelg@axis.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/20211202152252.31264-1-camel.guo@axis.com
2022-01-04iavf: Fix limit of total number of queues to active queues of VFKaren Sornek1-1/+4
In the absence of this validation, if the user requests to configure queues more than the enabled queues, it results in sending the requested number of queues to the kernel stack (due to the asynchronous nature of VF response), in which case the stack might pick a queue to transmit that is not enabled and result in Tx hang. Fix this bug by limiting the total number of queues allocated for VF to active queues of VF. Fixes: d5b33d024496 ("i40evf: add ndo_setup_tc callback to i40evf") Signed-off-by: Ashwin Vijayavel <ashwin.vijayavel@intel.com> Signed-off-by: Karen Sornek <karen.sornek@intel.com> Tested-by: Konrad Jankowski <konrad0.jankowski@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
2022-01-04i40e: Fix incorrect netdev's real number of RX/TX queuesJedrzej Jagielski1-7/+25
There was a wrong queues representation in sysfs during driver's reinitialization in case of online cpus number is less than combined queues. It was caused by stopped NetworkManager, which is responsible for calling vsi_open function during driver's initialization. In specific situation (ex. 12 cpus online) there were 16 queues in /sys/class/net/<iface>/queues. In case of modifying queues with value higher, than number of online cpus, then it caused write errors and other errors. Add updating of sysfs's queues representation during driver initialization. Fixes: 41c445ff0f48 ("i40e: main driver core") Signed-off-by: Lukasz Cieplicki <lukaszx.cieplicki@intel.com> Signed-off-by: Jedrzej Jagielski <jedrzej.jagielski@intel.com> Tested-by: Gurucharan G <gurucharanx.g@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
2022-01-04i40e: Fix for displaying message regarding NVM versionMateusz Palczewski1-2/+2
When loading the i40e driver, it prints a message like: 'The driver for the device detected a newer version of the NVM image v1.x than expected v1.y. Please install the most recent version of the network driver.' This is misleading as the driver is working as expected. Fix that by removing the second part of message and changing it from dev_info to dev_dbg. Fixes: 4fb29bddb57f ("i40e: The driver now prints the API version in error message") Signed-off-by: Mateusz Palczewski <mateusz.palczewski@intel.com> Tested-by: Gurucharan G <gurucharanx.g@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
2022-01-04i40e: fix use-after-free in i40e_sync_filters_subtask()Di Zhu1-0/+24
Using ifconfig command to delete the ipv6 address will cause the i40e network card driver to delete its internal mac_filter and i40e_service_task kernel thread will concurrently access the mac_filter. These two processes are not protected by lock so causing the following use-after-free problems. print_address_description+0x70/0x360 ? vprintk_func+0x5e/0xf0 kasan_report+0x1b2/0x330 i40e_sync_vsi_filters+0x4f0/0x1850 [i40e] i40e_sync_filters_subtask+0xe3/0x130 [i40e] i40e_service_task+0x195/0x24c0 [i40e] process_one_work+0x3f5/0x7d0 worker_thread+0x61/0x6c0 ? process_one_work+0x7d0/0x7d0 kthread+0x1c3/0x1f0 ? kthread_park+0xc0/0xc0 ret_from_fork+0x35/0x40 Allocated by task 2279810: kasan_kmalloc+0xa0/0xd0 kmem_cache_alloc_trace+0xf3/0x1e0 i40e_add_filter+0x127/0x2b0 [i40e] i40e_add_mac_filter+0x156/0x190 [i40e] i40e_addr_sync+0x2d/0x40 [i40e] __hw_addr_sync_dev+0x154/0x210 i40e_set_rx_mode+0x6d/0xf0 [i40e] __dev_set_rx_mode+0xfb/0x1f0 __dev_mc_add+0x6c/0x90 igmp6_group_added+0x214/0x230 __ipv6_dev_mc_inc+0x338/0x4f0 addrconf_join_solict.part.7+0xa2/0xd0 addrconf_dad_work+0x500/0x980 process_one_work+0x3f5/0x7d0 worker_thread+0x61/0x6c0 kthread+0x1c3/0x1f0 ret_from_fork+0x35/0x40 Freed by task 2547073: __kasan_slab_free+0x130/0x180 kfree+0x90/0x1b0 __i40e_del_filter+0xa3/0xf0 [i40e] i40e_del_mac_filter+0xf3/0x130 [i40e] i40e_addr_unsync+0x85/0xa0 [i40e] __hw_addr_sync_dev+0x9d/0x210 i40e_set_rx_mode+0x6d/0xf0 [i40e] __dev_set_rx_mode+0xfb/0x1f0 __dev_mc_del+0x69/0x80 igmp6_group_dropped+0x279/0x510 __ipv6_dev_mc_dec+0x174/0x220 addrconf_leave_solict.part.8+0xa2/0xd0 __ipv6_ifa_notify+0x4cd/0x570 ipv6_ifa_notify+0x58/0x80 ipv6_del_addr+0x259/0x4a0 inet6_addr_del+0x188/0x260 addrconf_del_ifaddr+0xcc/0x130 inet6_ioctl+0x152/0x190 sock_do_ioctl+0xd8/0x2b0 sock_ioctl+0x2e5/0x4c0 do_vfs_ioctl+0x14e/0xa80 ksys_ioctl+0x7c/0xa0 __x64_sys_ioctl+0x42/0x50 do_syscall_64+0x98/0x2c0 entry_SYSCALL_64_after_hwframe+0x65/0xca Fixes: 41c445ff0f48 ("i40e: main driver core") Signed-off-by: Di Zhu <zhudi2@huawei.com> Signed-off-by: Rui Zhang <zhangrui182@huawei.com> Tested-by: Gurucharan G <gurucharanx.g@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
2022-01-04i40e: Fix to not show opcode msg on unsuccessful VF MAC changeMateusz Palczewski1-8/+32
Hide i40e opcode information sent during response to VF in case when untrusted VF tried to change MAC on the VF interface. This is implemented by adding an additional parameter 'hide' to the response sent to VF function that hides the display of error information, but forwards the error code to VF. Previously it was not possible to send response with some error code to VF without displaying opcode information. Fixes: 5c3c48ac6bf5 ("i40e: implement virtual device interface") Signed-off-by: Grzegorz Szczurek <grzegorzx.szczurek@intel.com> Signed-off-by: Mateusz Palczewski <mateusz.palczewski@intel.com> Reviewed-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Reviewed-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com> Tested-by: Tony Brelinski <tony.brelinski@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
2022-01-04ACPI: PCC: Implement OperationRegion handler for the PCC Type 3 subtypeSudeep Holla4-0/+139
PCC OpRegion provides a mechanism to communicate with the platform directly from the AML. PCCT provides the list of PCC channel available in the platform, a subset or all of them can be used in PCC Opregion. This patch registers the PCC OpRegion handler before ACPI tables are loaded. This relies on the special context data passed to identify and set up the PCC channel before the OpRegion handler is executed for the first time. Typical PCC Opregion declaration looks like this: OperationRegion (PFRM, PCC, 2, 0x74) Field (PFRM, ByteAcc, NoLock, Preserve) { SIGN, 32, FLGS, 32, LEN, 32, CMD, 32, DATA, 800 } It contains four named double words followed by 100 bytes of buffer names DATA. ASL can fill out the buffer something like: /* Create global or local buffer */ Name (BUFF, Buffer (0x0C){}) /* Create double word fields over the buffer */ CreateDWordField (BUFF, 0x0, WD0) CreateDWordField (BUFF, 0x04, WD1) CreateDWordField (BUFF, 0x08, WD2) /* Fill the named fields */ WD0 = 0x50434300 SIGN = BUFF WD0 = 1 FLGS = BUFF WD0 = 0x10 LEN = BUFF /* Fill the payload in the DATA buffer */ WD0 = 0 WD1 = 0x08 WD2 = 0 DATA = BUFF /* Write to CMD field to trigger handler */ WD0 = 0x4404 CMD = BUFF This buffer is received by acpi_pcc_opregion_space_handler. This handler will fetch the complete buffer via internal_pcc_buffer. The setup handler will receive the special PCC context data which will contain the PCC channel index which used to set up the channel. The buffer pointer and length is saved in region context which is then used in the handler. (kernel test robot: Build failure with CONFIG_ACPI_DEBUGGER) Link: https://lore.kernel.org/r/202201041539.feAV0l27-lkp@intel.com Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2022-01-04ieee802154: atusb: fix uninit value in atusb_set_extended_addrPavel Skripkin1-4/+6
Alexander reported a use of uninitialized value in atusb_set_extended_addr(), that is caused by reading 0 bytes via usb_control_msg(). Fix it by validating if the number of bytes transferred is actually correct, since usb_control_msg() may read less bytes, than was requested by caller. Fail log: BUG: KASAN: uninit-cmp in ieee802154_is_valid_extended_unicast_addr include/linux/ieee802154.h:310 [inline] BUG: KASAN: uninit-cmp in atusb_set_extended_addr drivers/net/ieee802154/atusb.c:1000 [inline] BUG: KASAN: uninit-cmp in atusb_probe.cold+0x29f/0x14db drivers/net/ieee802154/atusb.c:1056 Uninit value used in comparison: 311daa649a2003bd stack handle: 000000009a2003bd ieee802154_is_valid_extended_unicast_addr include/linux/ieee802154.h:310 [inline] atusb_set_extended_addr drivers/net/ieee802154/atusb.c:1000 [inline] atusb_probe.cold+0x29f/0x14db drivers/net/ieee802154/atusb.c:1056 usb_probe_interface+0x314/0x7f0 drivers/usb/core/driver.c:396 Fixes: 7490b008d123 ("ieee802154: add support for atusb transceiver") Reported-by: Alexander Potapenko <glider@google.com> Acked-by: Alexander Aring <aahringo@redhat.com> Signed-off-by: Pavel Skripkin <paskripkin@gmail.com> Link: https://lore.kernel.org/r/20220104182806.7188-1-paskripkin@gmail.com Signed-off-by: Stefan Schmidt <stefan@datenfreihafen.org>
2022-01-04dm space map common: add bounds check to sm_ll_lookup_bitmap()Joe Thornber1-0/+5
Corrupted metadata could warrant returning error from sm_ll_lookup_bitmap(). Signed-off-by: Joe Thornber <ejt@redhat.com> Signed-off-by: Mike Snitzer <snitzer@redhat.com>
2022-01-04dm btree: add a defensive bounds check to insert_at()Joe Thornber1-3/+5
Corrupt metadata could trigger an out of bounds write. Signed-off-by: Joe Thornber <ejt@redhat.com> Signed-off-by: Mike Snitzer <snitzer@redhat.com>
2022-01-04dm btree remove: change a bunch of BUG_ON() calls to proper errorsJoe Thornber1-51/+122
Abuse of BUG_ON() is never appropriate, best to propagate errors to fail gracefully (rather than take the entire system down). Signed-off-by: Joe Thornber <ejt@redhat.com> Signed-off-by: Mike Snitzer <snitzer@redhat.com>
2022-01-04dm btree spine: eliminate duplicate le32_to_cpu() in node_check()Joe Thornber1-3/+5
Signed-off-by: Joe Thornber <ejt@redhat.com> Signed-off-by: Mike Snitzer <snitzer@redhat.com>
2022-01-04dm btree spine: remove extra node_check function declarationJoe Thornber1-4/+0
Should have been removed as part of commit f73e2e70ec48 ("dm btree spine: remove paranoid node_check call in node_prep_for_write()") Signed-off-by: Joe Thornber <ejt@redhat.com> Signed-off-by: Mike Snitzer <snitzer@redhat.com>
2022-01-04EDAC/i10nm: Release mdev/mbase when failing to detect HBMQiuxu Zhuo1-0/+9
On systems without HBM (High Bandwidth Memory) mdev/mbase are not released/unmapped. Add the code to release mdev/mbase when failing to detect HBM. [Tony: re-word commit message] Cc: <stable@vger.kernel.org> Fixes: c945088384d0 ("EDAC/i10nm: Add support for high bandwidth memory") Reported-by: kernel test robot <lkp@intel.com> Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com> Link: https://lore.kernel.org/r/20211224091126.1246-1-qiuxu.zhuo@intel.com
2022-01-04PCI: qcom-ep: Constify static dw_pcie_ep_opsRikard Falkeborn1-1/+1
The only usage of pci_ep_ops is to assign its address to the ops field in the dw_pcie_ep struct which is a pointer to const struct dw_pcie_ep_ops. Make it const to allow the compiler to put it in read-only memory. Link: https://lore.kernel.org/r/20211204220316.88655-1-rikard.falkeborn@gmail.com Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Krzysztof Wilczyński <kw@linux.com>
2022-01-04PCI: vmd: Honor ACPI _OSC on PCIe featuresKai-Heng Feng1-0/+18
When Samsung PCIe Gen4 NVMe is connected to Intel ADL VMD, the combination causes AER message flood and drags the system performance down. The issue doesn't happen when VMD mode is disabled in BIOS, since AER isn't enabled by acpi_pci_root_create() . When VMD mode is enabled, AER is enabled regardless of _OSC: [ 0.410076] acpi PNP0A08:00: _OSC: platform does not support [AER] ... [ 1.486704] pcieport 10000:e0:06.0: AER: enabled with IRQ 146 Since VMD is an aperture to regular PCIe root ports, honor ACPI _OSC to disable PCIe features accordingly to resolve the issue. Suggested-by: Rafael J. Wysocki <rafael@kernel.org> Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=215027 Link: https://lore.kernel.org/r/20211203031541.1428904-1-kai.heng.feng@canonical.com Signed-off-by: Kai-Heng Feng <kai.heng.feng@canonical.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2022-01-04drm: exynos: dsi: Add mode_set functionJagan Teki1-1/+12
Get the display mode settings via mode_set bridge function instead of explicitly de-reference. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Robert Foss <robert.foss@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20211122070633.89219-3-jagan@amarulasolutions.com
2022-01-04drm: exynos: dsi: Convert to bridge driverJagan Teki1-22/+51
Some display panels would come up with a non-DSI output, those can have an option to connect the DSI host by means of interface bridge converter. This DSI to non-DSI interface bridge converter would requires DSI Host to handle drm bridge functionalities in order to DSI Host to Interface bridge. This patch convert the existing to a drm bridge driver with a built-in encoder support for compatibility with existing component drivers. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Robert Foss <robert.foss@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20211122070633.89219-2-jagan@amarulasolutions.com
2022-01-04regulator: remove redundant ret variableMinghao Chi1-4/+2
Return value from regmap_update_bits() directly instead of taking this in another redundant variable. Reported-by: Zeal Robot <zealci@zte.com.cn> Signed-off-by: Minghao Chi <chi.minghao@zte.com.cn> Signed-off-by: CGEL ZTE <cgel.zte@gmail.com> Link: https://lore.kernel.org/r/20220104104139.601031-1-chi.minghao@zte.com.cn Signed-off-by: Mark Brown <broonie@kernel.org>
2022-01-04PCI: mvebu: Fix support for DEVCAP2, DEVCTL2 and LNKCTL2 registers on emulated bridgePali Rohár1-0/+23
Armada XP and new hardware supports access to DEVCAP2, DEVCTL2 and LNKCTL2 configuration registers of PCIe core via PCIE_CAP_PCIEXP. So export them via emulated software root bridge. Pre-XP hardware does not support these registers and returns zeros. Link: https://lore.kernel.org/r/20211125124605.25915-16-pali@kernel.org Fixes: 1f08673eef12 ("PCI: mvebu: Convert to PCI emulated bridge config space") Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2022-01-04PCI: mvebu: Fix support for PCI_EXP_RTSTA on emulated bridgePali Rohár1-1/+10
PME Status bit in Root Status Register (PCIE_RC_RTSTA_OFF) is read-only and can be cleared only by writing 0b to the Interrupt Cause RW0C register (PCIE_INT_CAUSE_OFF). Link: https://lore.kernel.org/r/20211125124605.25915-15-pali@kernel.org Fixes: 1f08673eef12 ("PCI: mvebu: Convert to PCI emulated bridge config space") Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2022-01-04spi: ar934x: fix transfer sizeOskari Lemmela1-5/+11
If bits_per_word is configured, transfer only word amount of data per iteration. Signed-off-by: Oskari Lemmela <oskari@lemmela.net> Link: https://lore.kernel.org/r/20211222055958.1383233-2-oskari@lemmela.net Signed-off-by: Mark Brown <broonie@kernel.org>
2022-01-04PCI: mvebu: Fix support for PCI_EXP_DEVCTL on emulated bridgePali Rohár1-10/+1
Comment in Armada 370 functional specification is misleading. PCI_EXP_DEVCTL_*RE bits are supported and configures receiving of error interrupts. Link: https://lore.kernel.org/r/20211125124605.25915-14-pali@kernel.org Fixes: 1f08673eef12 ("PCI: mvebu: Convert to PCI emulated bridge config space") Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2022-01-04PCI: mvebu: Fix support for PCI_BRIDGE_CTL_BUS_RESET on emulated bridgePali Rohár1-0/+28
Hardware supports PCIe Hot Reset via PCIE_CTRL_OFF register. Use it for implementing PCI_BRIDGE_CTL_BUS_RESET bit of PCI_BRIDGE_CONTROL register on emulated bridge. With this change the function pci_reset_secondary_bus() starts working and can reset connected PCIe card. Link: https://lore.kernel.org/r/20211125124605.25915-13-pali@kernel.org Fixes: 1f08673eef12 ("PCI: mvebu: Convert to PCI emulated bridge config space") Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2022-01-04PCI: mvebu: Fix configuring secondary bus of PCIe Root Port via emulated bridgePali Rohár1-2/+97
It looks like that mvebu PCIe controller has for each PCIe link fully independent PCIe host bridge and so every PCIe Root Port is isolated not only on its own bus but also isolated from each others. But in past device tree structure was defined to put all PCIe Root Ports (as PCI Bridge devices) into one root bus 0 and this bus is emulated by pci-mvebu.c driver. Probably reason for this decision was incorrect understanding of PCIe topology of these Armada SoCs and also reason of misunderstanding how is PCIe controller generating Type 0 and Type 1 config requests (it is fully different compared to other drivers). Probably incorrect setup leaded to very surprised things like having PCIe Root Port (PCI Bridge device, with even incorrect Device Class set to Memory Controller) and the PCIe device behind the Root Port on the same PCI bus, which obviously was needed to somehow hack (as these two devices cannot be in reality on the same bus). Properly set mvebu local bus number and mvebu local device number based on PCI Bridge secondary bus number configuration. Also correctly report configured secondary bus number in config space. And explain in driver comment why this setup is correct. Link: https://lore.kernel.org/r/20211125124605.25915-12-pali@kernel.org Fixes: 1f08673eef12 ("PCI: mvebu: Convert to PCI emulated bridge config space") Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2022-01-04PCI: mvebu: Set PCI Bridge Class Code to PCI BridgePali Rohár1-1/+27
The default value of Class Code of this bridge corresponds to a Memory controller, though. This is probably relict from the past when old Marvell/Galileo PCI-based controllers were used as standalone PCI device for connecting SDRAM or workaround for PCs with broken BIOS. Details are in commit 36de23a4c5f0 ("MIPS: Cobalt: Explain GT64111 early PCI fixup"). Change the Class Code to correspond to a PCI Bridge. Add comment explaining this change. Link: https://lore.kernel.org/r/20211125124605.25915-11-pali@kernel.org Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2022-01-04PCI: mvebu: Setup PCIe controller to Root Complex modePali Rohár1-1/+7
This driver operates only in Root Complex mode, so ensure that hardware is properly configured in Root Complex mode. Link: https://lore.kernel.org/r/20211125124605.25915-10-pali@kernel.org Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2022-01-04PCI: mvebu: Propagate errors when updating PCI_IO_BASE and PCI_MEM_BASE registersPali Rohár1-27/+55
Properly propagate failure from mvebu_pcie_add_windows() function back to the caller mvebu_pci_bridge_emul_base_conf_write() and correctly updates PCI_IO_BASE, PCI_MEM_BASE and PCI_IO_BASE_UPPER16 registers on error. On error set base value higher than limit value which indicates that address range is disabled. When IO is unsupported then let IO registers zeroed as required by PCIe base specification. Link: https://lore.kernel.org/r/20211125124605.25915-9-pali@kernel.org Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2022-01-04PCI: mvebu: Do not modify PCI IO type bits in conf_writePali Rohár1-7/+0
PCI IO type bits are already initialized in mvebu_pci_bridge_emul_init() function and only when IO support is enabled. These type bits are read-only and pci-bridge-emul.c code already does not allow to modify them from upper layers. When IO support is disabled then all IO registers should be read-only and return zeros. Therefore do not modify PCI IO type bits in mvebu_pci_bridge_emul_base_conf_write() callback. Link: https://lore.kernel.org/r/20211125124605.25915-8-pali@kernel.org Fixes: 1f08673eef12 ("PCI: mvebu: Convert to PCI emulated bridge config space") Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2022-01-04PCI: mvebu: Fix support for bus mastering and PCI_COMMAND on emulated bridgePali Rohár1-20/+32
According to PCI specifications bits [0:2] of Command Register, this should be by default disabled on reset. So explicitly disable these bits at early beginning of driver initialization. Also remove code which unconditionally enables all 3 bits and let kernel code (via pci_set_master() function) to handle bus mastering of PCI Bridge via emulated PCI_COMMAND on emulated bridge. Adjust existing functions mvebu_pcie_handle_iobase_change() and mvebu_pcie_handle_membase_change() to handle PCI_IO_BASE and PCI_MEM_BASE registers correctly even when bus mastering on emulated bridge is disabled. Link: https://lore.kernel.org/r/20211125124605.25915-7-pali@kernel.org Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2022-01-04PCI: mvebu: Disallow mapping interrupts on emulated bridgesPali Rohár1-0/+10
Interrupt support on mvebu emulated bridges is not implemented yet. So properly indicate return value to callers that they cannot request interrupts from emulated bridge. Link: https://lore.kernel.org/r/20211125124605.25915-6-pali@kernel.org Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2022-01-04PCI: mvebu: Handle invalid size of read config requestPali Rohár1-0/+3
Function mvebu_pcie_hw_rd_conf() does not handle invalid size. So correctly set read value to all-ones and return appropriate error return value PCIBIOS_BAD_REGISTER_NUMBER like in mvebu_pcie_hw_wr_conf() function. Link: https://lore.kernel.org/r/20211125124605.25915-5-pali@kernel.org Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2022-01-04PCI: mvebu: Check that PCI bridge specified in DT has function number zeroPali Rohár1-0/+5
Driver cannot handle PCI bridges at non-zero function address. So add appropriate check. Currently all in-tree kernel DTS files set PCI bridge function to zero. Link: https://lore.kernel.org/r/20211125124605.25915-4-pali@kernel.org Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2022-01-04PCI: mvebu: Check for errors from pci_bridge_emul_init() callPali Rohár1-3/+12
Function pci_bridge_emul_init() may fail so correctly check for errors. Link: https://lore.kernel.org/r/20211125124605.25915-3-pali@kernel.org Fixes: 1f08673eef12 ("PCI: mvebu: Convert to PCI emulated bridge config space") Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2022-01-04PCI: mvebu: Check for valid portsPali Rohár1-0/+7
Some mvebu ports do not have to be initialized. So skip these uninitialized mvebu ports in every port iteration function to prevent access to unmapped memory or dereferencing NULL pointers. Uninitialized mvebu port has base address set to NULL. Link: https://lore.kernel.org/r/20211125124605.25915-2-pali@kernel.org Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2022-01-04ACPI / x86: Skip AC and battery devices on x86 Android tablets with broken DSDTsHans de Goede1-3/+6
So far all of the tablets for which the skip i2c-client/serdev enumeration quirks have been added also all have broken ACPI AC / battery devices extend the existing quirks for these tablets to also skip the broken AC / battery devices. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2022-01-04ACPI / x86: Introduce an acpi_quirk_skip_acpi_ac_and_battery() helperHans de Goede3-83/+79
Some x86 ACPI boards have broken AC and battery ACPI devices in their ACPI tables. This is often tied to these devices using certain PMICs where the factory OS image seems to be using native charger and fuel-gauge drivers instead. So far both the AC and battery drivers have almost identical checks for these PMICs including both of them having a DMI based mechanism to force usage of the ACPI AC and battery drivers on some boards even though one of these PMICs is present, with the same 2 boards listed in both driver's DMI tables for this. The only difference is that the AC driver checks for 2 PMICs and the battery driver only for one. This has grown this way because the other (Whiskey Cove) PMIC is only used on a few boards (3 known boards) and although some of these do have non working ACPI battery devices, their _STA method always returns 0, but that really should not be relied on. This patch factors out the shared checks into a new acpi_quirk_skip_acpi_ac_and_battery() helper and moves the AC and battery drivers over to this new helper. Note the DMI table is shared with acpi_quirk_skip_i2c_client_enumeration() and acpi_quirk_skip_serdev_enumeration(), because boards needing DMI quirks for either of these typically also have broken AC and battery ACPI devices. The ACPI_QUIRK_SKIP_ACPI_AC_AND_BATTERY quirk is not set yet on boards already in this DMI table, to avoid introducing any functional changes in this refactoring patch. Besided sharing the code between the AC and battery drivers this refactoring also moves this quirk handling to under #ifdef CONFIG_X86, removing this x86 specific code from non x86 ACPI builds. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2022-01-04Merge branch 'acpi-scan' into acpi-x86Rafael J. Wysocki17-82/+221
Merge recent device enumeration changes to satisfy dependencies.
2022-01-04drm/bridge: anx7625: Fix null vs IS_ERR() checking in anx7625_register_i2c_dummy_clientsMiaoqian Lin1-9/+23
Since i2c_new_client_device() function return error pointers. The i2c_new_dummy_device() function does not return NULL, It returns error pointers too. Using IS_ERR() to check the return value to fix this. Fixes: 8bdfc5dae4e3("drm/bridge: anx7625: Add anx7625 MIPI DSI/DPI to DP") Signed-off-by: Miaoqian Lin <linmq006@gmail.com> Signed-off-by: Robert Foss <robert.foss@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20211222083350.18514-1-linmq006@gmail.com Reviewed-by: Robert Foss <robert.foss@linaro.org>
2022-01-04RDMA/rxe: Prevent double freeing rxe_map_set()Li Zhijian1-9/+7
The same rxe_map_set could be freed twice: rxe_reg_user_mr() -> rxe_mr_init_user() -> rxe_mr_free_map_set() # 1st -> rxe_drop_ref() ... -> rxe_mr_cleanup() -> rxe_mr_free_map_set() # 2nd Follow normal convection and put resource cleanup either in the error unwind of the allocator, or the overall free function. Leave the object unchanged with a NULL cur_map_set on failure and remove the unncessary free in rxe_mr_init_user(). Link: https://lore.kernel.org/r/20211228014406.1033444-1-lizhijian@cn.fujitsu.com Signed-off-by: Li Zhijian <lizhijian@cn.fujitsu.com> Acked-by: Zhu Yanjun <zyjzyj2000@gmail.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2022-01-04drivers: perf: marvell_cn10k: fix an IS_ERR() vs NULL checkDan Carpenter1-1/+1
The devm_ioremap() function does not return error pointers. It returns NULL. Fixes: 036a7584bede ("drivers: perf: Add LLC-TAD perf counter support") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Link: https://lore.kernel.org/r/20211217145907.GA16611@kili Signed-off-by: Will Deacon <will@kernel.org>
2022-01-04drm/bridge: anx7625: Check GPIO description to avoid crashXin Ji1-0/+9
As GPIO probe function "devm_gpiod_get_optional()" may return error code, driver should identify GPIO desc as NULL to avoid crash. Acked-by: Tzung-Bi Shih <tzungbi@google.com> Signed-off-by: Xin Ji <xji@analogixsemi.com> Signed-off-by: Robert Foss <robert.foss@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20211119015804.3824027-1-xji@analogixsemi.com Reviewed-by: Robert Foss <robert.foss@linaro.org>
2022-01-04perf/smmuv3: Fix unused variable warning when CONFIG_OF=nWill Deacon1-0/+2
The kbuild robot reports that building the SMMUv3 PMU driver with CONFIG_OF=n results in a warning for W=1 builds: >> drivers/perf/arm_smmuv3_pmu.c:889:34: warning: unused variable 'smmu_pmu_of_match' [-Wunused-const-variable] static const struct of_device_id smmu_pmu_of_match[] = { ^ Guard the match table with #ifdef CONFIG_OF. Link: https://lore.kernel.org/r/202201041700.01KZEzhb-lkp@intel.com Fixes: 3f7be4356176 ("perf/smmuv3: Add devicetree support") Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Will Deacon <will@kernel.org>
2022-01-04drm/stm: ltdc: support of new hardware versionYannick Fertre2-30/+145
Add support of new hardware version 0x40100. Signed-off-by: Yannick Fertre <yannick.fertre@foss.st.com> Reviewed-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com> Tested-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com> Acked-by: Philippe Cornu <philippe.cornu@foss.st.com> Signed-off-by: Philippe Cornu <philippe.cornu@foss.st.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211203085618.11314-1-yannick.fertre@foss.st.com
2022-01-04drm/stm: remove conflicting framebuffersYannick Fertre1-0/+5
In case of using simplefb or another conflicting framebuffer, call drm_aperture_remove_framebuffers() to remove memory allocated. Signed-off-by: Yannick Fertre <yannick.fertre@foss.st.com> Reviewed-by: Thomas Zimmermann <tzimmermann@suse.de> Acked-by: Philippe Cornu <philippe.cornu@foss.st.com> Signed-off-by: Philippe Cornu <philippe.cornu@foss.st.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211206134735.13537-1-yannick.fertre@foss.st.com
2022-01-04headers/uninline: Uninline single-use function: kobject_has_children()Ingo Molnar1-0/+17
This was the only usage of <linux/kref_api.h> in <linux/kobject_api.h>, so we'll able to decouple the two after this change. Signed-off-by: Ingo Molnar <mingo@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-01-04drm/bridge: Fix free wrong object in sii8620_init_rcp_input_devMiaoqian Lin1-1/+1
rc_dev is allocated by rc_allocate_device(), and doesn't assigned to ctx->rc_dev before calling rc_free_device(ctx->rc_dev). So it should call rc_free_device(rc_dev); Fixes: e25f1f7c94e1 ("drm/bridge/sii8620: add remote control support") Signed-off-by: Miaoqian Lin <linmq006@gmail.com> Reviewed-by: Robert Foss <robert.foss@linaro.org> Signed-off-by: Robert Foss <robert.foss@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20211227092522.21755-1-linmq006@gmail.com
2022-01-04drm/bridge: chipone-icn6211: Add mode_set APIJagan Teki1-6/+12
Get the display mode settings via mode_set bridge function instead of explicitly de-reference. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Robert Foss <robert.foss@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20211119145325.1775046-2-jagan@amarulasolutions.com Reviewed-by: Robert Foss <robert.foss@linaro.org>
2022-01-04drm/bridge: chipone-icn6211: Switch to atomic operationsJagan Teki1-7/+14
Replace atomic version of the pre_enable/enable/post_disable operations to continue the transition to the atomic API. Also added default drm atomic operations for duplicate, destroy and reset state API's in order to have smooth transition on atomic API's. Tested on Allwinner R16/R40 DSI. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Robert Foss <robert.foss@linaro.org> Signed-off-by: Robert Foss <robert.foss@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20211119145325.1775046-1-jagan@amarulasolutions.com