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2021-12-01cpufreq: Fix get_cpu_device() failure in add_cpu_dev_symlink()Xiongfeng Wang1-5/+4
When I hot added a CPU, I found 'cpufreq' directory was not created below /sys/devices/system/cpu/cpuX/. It is because get_cpu_device() failed in add_cpu_dev_symlink(). cpufreq_add_dev() is the .add_dev callback of a CPU subsys interface. It will be called when the CPU device registered into the system. The call chain is as follows: register_cpu() ->device_register() ->device_add() ->bus_probe_device() ->cpufreq_add_dev() But only after the CPU device has been registered, we can get the CPU device by get_cpu_device(), otherwise it will return NULL. Since we already have the CPU device in cpufreq_add_dev(), pass it to add_cpu_dev_symlink(). I noticed that the 'kobj' of the CPU device has been added into the system before cpufreq_add_dev(). Fixes: 2f0ba790df51 ("cpufreq: Fix creation of symbolic links to policy directories") Signed-off-by: Xiongfeng Wang <wangxiongfeng2@huawei.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Cc: All applicable <stable@vger.kernel.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-12-01PCI: mvebu: Remove custom mvebu_pci_host_probe() functionPali Rohár1-40/+1
Now after pci_ioremap_io() usage was replaced by devm_pci_remap_iospace() function, there is no need to use custom mvebu_pci_host_probe() function. Current implementation of mvebu_pci_host_probe() is same as standard PCI core function pci_host_probe(). So replace mvebu_pci_host_probe() call by pci_host_probe() and remove custom mvebu_pci_host_probe() function. Link: https://lore.kernel.org/r/20211124154116.916-4-pali@kernel.org Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2021-12-01drm/vmwgfx: Switch the internal BO's to ttm_bo_type_kernelZack Rusin1-1/+1
There's never a need to access our internal kernel bo's from user-space. Those objects are used exclusively for internal support to guest backed surfaces (in otable setup and mob page tables) and there's no need to have them be of device type, i.e. mmappable from user-space. Signed-off-by: Zack Rusin <zackr@vmware.com> Reviewed-by: Martin Krastev <krastevm@vmware.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211105193845.258816-6-zackr@vmware.com
2021-12-01drm/vmwgfx: Introduce a new placement for MOB page tablesZack Rusin5-38/+138
For larger (bigger than a page) and noncontiguous mobs we have to create page tables that allow the host to find the memory. Those page tables just used regular system memory. Unfortunately in TTM those BO's are not allowed to be busy thus can't be fenced and we have to fence those bo's because we don't want to destroy the page tables while the host is still executing the command buffers which might be accessing them. To solve it we introduce a new placement VMW_PL_SYSTEM which is very similar to TTM_PL_SYSTEM except that it allows fencing. This fixes kernel oops'es during unloading of the driver (and pci hot remove/add) which were caused by busy BO's in TTM_PL_SYSTEM being present in the delayed deletion list in TTM (TTM_PL_SYSTEM manager is destroyed before the delayed deletions are executed) Signed-off-by: Zack Rusin <zackr@vmware.com> Reviewed-by: Martin Krastev <krastevm@vmware.com> Cc: Christian König <christian.koenig@amd.com> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211105193845.258816-5-zackr@vmware.com
2021-12-01drm/vmwgfx: Fail to initialize on broken configsZack Rusin1-0/+7
Some of our hosts have a bug where rescaning a pci bus results in stale fifo memory being mapped on the host. This makes any fifo communication impossible resulting in various kernel crashes. Instead of unexpectedly crashing, predictably fail to load the driver which will preserve the system. Fixes: fb1d9738ca05 ("drm/vmwgfx: Add DRM driver for VMware Virtual GPU") Signed-off-by: Zack Rusin <zackr@vmware.com> Reviewed-by: Martin Krastev <krastevm@vmware.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211105193845.258816-4-zackr@vmware.com
2021-12-01drm/vmwgfx: Release ttm memory if probe failsZack Rusin1-10/+16
The ttm mem global state was leaking if the vmwgfx driver load failed. In case of a driver load failure we have to make sure we also release the ttm mem global state. Signed-off-by: Zack Rusin <zackr@vmware.com> Reviewed-by: Martin Krastev <krastevm@vmware.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211105193845.258816-3-zackr@vmware.com
2021-12-01drm/vmwgfx: Remove the deprecated lower mem limitZack Rusin2-103/+2
TTM during the transition to the new page allocator lost the ability to constrain the allocations via the lower_mem_limit. The code has been unused since the change: 256dd44bd897 ("drm/ttm: nuke old page allocator") and there's no reason to keep it. Fixes: 256dd44bd897 ("drm/ttm: nuke old page allocator") Signed-off-by: Zack Rusin <zackr@vmware.com> Reviewed-by: Martin Krastev <krastevm@vmware.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211105193845.258816-2-zackr@vmware.com
2021-12-01remoteproc: k3-r5: Extend support for R5F clusters on J721S2 SoCsHari Nagalla1-2/+3
The K3 J721S2 SoCs have three dual-core R5F subsystems, one in MCU voltage domain and the other two in MAIN voltage domain. These R5F clusters are similar to the R5F clusters in J7200 SoCs. Compatible Info is updated to support J721S2 SoCs. Signed-off-by: Hari Nagalla <hnagalla@ti.com> Link: https://lore.kernel.org/r/20211122122726.8532-5-hnagalla@ti.com Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
2021-12-01remoteproc: k3-dsp: Extend support for C71x DSPs on J721S2 SoCsHari Nagalla1-0/+1
The K3 J721S2 SoCs have two C71x DSP subsystems in MAIN voltage domain, and there are no C66x DSP subsystems on these SoCs. The C71x DSP subsystem is a slighly updated version of the C71x DSP subsystem on J721e. The C71x DSPs are 64 bit machine with fixed and floating point DSP operations. Extend support to the C71x DSPs with J721S2 compatible strings. Signed-off-by: Hari Nagalla <hnagalla@ti.com> Link: https://lore.kernel.org/r/20211122122726.8532-4-hnagalla@ti.com Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
2021-12-01PCI: rcar: Check if device is runtime suspended instead of __clk_is_enabled()Marek Vasut1-5/+5
Replace __clk_is_enabled() with pm_runtime_suspended(), as __clk_is_enabled() was checking the wrong bus clock and caused the following build error too: arm-linux-gnueabi-ld: drivers/pci/controller/pcie-rcar-host.o: in function `rcar_pcie_aarch32_abort_handler': pcie-rcar-host.c:(.text+0xdd0): undefined reference to `__clk_is_enabled' Link: https://lore.kernel.org/r/20211115204641.12941-1-marek.vasut@gmail.com Fixes: a115b1bd3af0 ("PCI: rcar: Add L1 link state fix into data abort hook") Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Randy Dunlap <rdunlap@infradead.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Geert Uytterhoeven <geert+renesas@glider.be> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Stephen Boyd <sboyd@kernel.org> Cc: Wolfram Sang <wsa@the-dreams.de> Cc: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Cc: linux-renesas-soc@vger.kernel.org
2021-12-01drm/i915: Update error capture code to avoid using the current vma stateThomas Hellström8-95/+554
With asynchronous migrations, the vma state may be several migrations ahead of the state that matches the request we're capturing. Address that by introducing an i915_vma_snapshot structure that can be used to snapshot relevant state at request submission. In order to make sure we access the correct memory, the snapshots take references on relevant sg-tables and memory regions. Also move the capture list allocation out of the fence signaling critical path and use the CONFIG_DRM_I915_CAPTURE_ERROR define to avoid compiling in members and functions used for error capture when they're not used. Finally, Introduce lockdep annotation. v4: - Break out the capture allocation mode change to a separate patch. v5: - Fix compilation error in the !CONFIG_DRM_I915_CAPTURE_ERROR case (kernel test robot) v6: - Use #if IS_ENABLED() instead of #ifdef to match driver style. - Move yet another change of allocation mode to the separate patch. - Commit message rework due to patch reordering. v7: - Adjust for removal of region refcounting. Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com> Reviewed-by: Ramalingam C <ramalingam.c@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211129202245.472043-1-thomas.hellstrom@linux.intel.com
2021-12-01Merge tag 'wireless-drivers-2021-12-01' of git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/wireless-driversDavid S. Miller17-49/+116
Kalle Valo says: ==================== wireless-drivers fixes for v5.16 First set of fixes for v5.16. Mostly crash and driver initialisation fixes, the fix for rtw89 being most important. iwlwifi * compiler, lockdep and smatch warning fixes * fix for a rare driver initialisation failure * fix a memory leak rtw89 * fix const buffer modification causing a kernel crash mt76 * fix null pointer access * fix idr leak rt2x00 * fix driver initialisation errors, a regression since v5.2-rc1 ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2021-12-01mlxsw: Use Switch Multicast ID Register Version 2Amit Cohen2-72/+72
The SMID-V2 register maps Multicast ID (MID) into a list of local ports. It is a new version of SMID in order to support 1024 bits of local_port. Add SMID-V2 register and use it instead of SMID. Signed-off-by: Amit Cohen <amcohen@nvidia.com> Reviewed-by: Petr Machata <petrm@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-12-01mlxsw: Use Switch Flooding Table Register Version 2Amit Cohen2-80/+80
The SFTR-V2 register is used for flooding packet replication. It is a new version of SFTR in order to support 1024 bits of local_port. Add SFTR-V2 register and use it instead of SFTR. Signed-off-by: Amit Cohen <amcohen@nvidia.com> Reviewed-by: Petr Machata <petrm@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-12-01mlxsw: Add support for more than 256 ports in SBSR registerAmit Cohen2-5/+31
Add 'port_page' field in SBSR to be able to query occupancy of more than 256 ports. The field determines the range of the ports specified in the 'ingress_port_mask' and 'egress_port_mask' bit masks: >From '256 * port_page' to '256 * port_page + 255'. For each local port, the appropriate port page is used. A query is never performed for a port range that spans multiple port pages. Signed-off-by: Amit Cohen <amcohen@nvidia.com> Reviewed-by: Petr Machata <petrm@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-12-01mlxsw: Use u16 for local_port field instead of u8Amit Cohen19-234/+234
Currently, local_port field is saved as u8, which means that maximum 256 ports can be used. As preparation for Spectrum-4, which will support more than 256 ports, local_port field should be extended. Save local_port as u16 to allow use of additional ports. Signed-off-by: Amit Cohen <amcohen@nvidia.com> Reviewed-by: Petr Machata <petrm@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-12-01mlxsw: reg: Adjust PPCNT register to support local port 255Amit Cohen1-2/+9
Local port 255 has a special meaning in PPCNT register, it is used to refer to all local ports. This wild card ability is not currently used by the driver. Special casing local port 255 in Spectrum-4 systems where it is a valid port is going to be a problem. Work around this issue by adding and always setting the 'lp_gl' bit which instructs the device's firmware to treat this local port like an ordinary port. Signed-off-by: Amit Cohen <amcohen@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-12-01mlxsw: reg: Increase 'port_num' field in PMTDB registerAmit Cohen1-1/+1
'port_num' field is used to indicate the local port value which can be assigned to a module. Increase the field from 8 bits to 10 bits in order to support more than 255 ports. Signed-off-by: Amit Cohen <amcohen@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-12-01mlxsw: reg: Align existing registers to use extended local_port fieldAmit Cohen1-49/+49
Add support for 10-bit local ports in device registers by making use of the MLXSW_ITEM32_LP() macro that was added in the previous patch. Signed-off-by: Amit Cohen <amcohen@nvidia.com> Reviewed-by: Petr Machata <petrm@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-12-01mlxsw: item: Add support for local_port field in a split formAmit Cohen1-0/+36
Currently, local_port field uses 8 bits, which means that maximum 256 ports can be used. As preparation for the next ASIC, which will support more than 256 ports, local_port field should be extended to 10 bits. It is not possible to use 10 consecutive bits in all registers, and therefore, the field is split into 2 fields: 1. local_port - the existing 8 bits, represent LSB of the extended field. 2. lp_msb - extra 2 bits, represent MSB of the extended field. To avoid complex programming when reading/writing local_port, add a dedicated macro which creates get and set functions which handle both parts of local_port. Signed-off-by: Amit Cohen <amcohen@nvidia.com> Reviewed-by: Jiri Pirko <jiri@nvidia.com> Reviewed-by: Petr Machata <petrm@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-12-01mlxsw: reg: Remove unused functionsAmit Cohen1-18/+0
The functions mlxsw_reg_sfd_uc_unpack() and mlxsw_reg_sfd_uc_lag_unpack() are not used. Remove them. Signed-off-by: Amit Cohen <amcohen@nvidia.com> Reviewed-by: Petr Machata <petrm@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-12-01mlxsw: spectrum: Bump minimum FW version to xx.2010.1006Amit Cohen1-6/+6
Add latest verified version of Nvidia Spectrum-family switch firmware, for Spectrum (13.2010.1006), Spectrum-2 (29.2010.1006) and Spectrum-3 (30.2010.1006). Signed-off-by: Amit Cohen <amcohen@nvidia.com> Reviewed-by: Petr Machata <petrm@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-12-01Merge tag 'mlx5-fixes-2021-11-30' of git://git.kernel.org/pub/scm/linux/kernel/git/saeed/linuxDavid S. Miller14-60/+93
Saeed Mahameed says: ==================== mlx5 fixes 2021-11-30 This series provides bug fixes to mlx5 driver. Please pull and let me know if there is any problem. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2021-12-01Merge branch '40GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/next-queueDavid S. Miller5-44/+69
Tony Nguyen says: ==================== 40GbE Intel Wired LAN Driver Updates 2021-11-30 This series contains updates to iavf driver only. Patryk adds a debug message when MTU is changed. Grzegorz adds messaging when transitioning in and out of multicast promiscuous mode. Jake returns correct error codes for iavf_parse_cls_flower(). Jedrzej adds messaging for when the driver is removed and refactors struct usage to take less memory. He also adjusts ethtool statistics to only display information on active queues. Tony allows for user to specify the RSS hash. Karen resolves some static analysis warnings, corrects format specifiers, and rewords a message to come across as informational. v2: - Dropped patch 1 (for net) and 5 - Change MTU message from info to debug ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2021-12-01Merge branch '100GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/next-queueDavid S. Miller2-5/+1
Tony Nguyen says: ==================== 100GbE Intel Wired LAN Driver Updates 2021-11-30 This series contains updates to ice driver only. Shiraz corrects assignment of boolean variable and removes an unused enum. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2021-12-01Merge branch '1GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/next-queueDavid S. Miller1-12/+25
Tony Nguyen says: ==================== 1GbE Intel Wired LAN Driver Updates 2021-11-30 Jesper Dangaard Brouer says: Changes to fix and enable XDP metadata to a specific Intel driver igc. Tested with hardware i225 that uses driver igc, while testing AF_XDP access to metadata area. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2021-12-01net: dsa: mv88e6xxx: Link in pcs_get_state() if AN is bypassedMarek Behún1-6/+42
Function mv88e6xxx_serdes_pcs_get_state() currently does not report link up if AN is enabled, Link bit is set, but Speed and Duplex Resolved bit is not set, which testing shows is the case for when auto-negotiation was bypassed (we have AN enabled but link partner does not). An example of such link partner is Marvell 88X3310 PHY, when put into the mode where host interface changes between 10gbase-r, 5gbase-r, 2500base-x and sgmii according to copper speed. The 88X3310 does not enable AN in 2500base-x, and so SerDes on mv88e6xxx currently does not link with it. Fix this. Fixes: a5a6858b793f ("net: dsa: mv88e6xxx: extend phylink to Serdes PHYs") Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-12-01net: dsa: mv88e6xxx: Fix inband AN for 2500base-x on 88E6393X familyMarek Behún2-1/+61
Inband AN is broken on Amethyst in 2500base-x mode when set by standard mechanism (via cmode). (There probably is some weird setting done by default in the switch for this mode that make it cycle in some state or something, because when the peer is the mvneta controller, it receives link change interrupts every ~0.3ms, but the link is always down.) Get around this by configuring the PCS mode to 1000base-x (where inband AN works), and then changing the SerDes frequency while SerDes transmitter and receiver are disabled, before enabling SerDes PHY. After disabling SerDes PHY, change the PCS mode back to 2500base-x, to avoid confusing the device (if we leave it at 1000base-x PCS mode but with different frequency, and then change cmode to sgmii, the device won't change the frequency because it thinks it already has the correct one). The register which changes the frequency is undocumented. I discovered it by going through all registers in the ranges 4.f000-4.f100 and 1e.8000-1e.8200 for all SerDes cmodes (sgmii, 1000base-x, 2500base-x, 5gbase-r, 10gbase-r, usxgmii) and filtering out registers that didn't make sense (the value was the same for modes which have different frequency). The result of this was: reg sgmii 1000base-x 2500base-x 5gbase-r 10gbase-r usxgmii 04.f002 005b 0058 0059 005c 005d 005f 04.f076 3000 0000 1000 4000 5000 7000 04.f07c 0950 0950 1850 0550 0150 0150 1e.8000 0059 0059 0058 0055 0051 0051 1e.8140 0e20 0e20 0e28 0e21 0e42 0e42 Register 04.f002 is the documented Port Operational Confiuration register, it's last 3 bits select PCS type, so changing this register also changes the frequency to the appropriate value. Registers 04.f076 and 04.f07c are not writable. Undocumented register 1e.8000 was the one: changing bits 3:0 from 9 to 8 changed SerDes frequency to 3.125 GHz, while leaving the value of PCS mode in register 04.f002.2:0 at 1000base-x. Inband autonegotiation started working correctly. (I didn't try anything with register 1e.8140 since 1e.8000 solved the problem.) Since I don't have documentation for this register 1e.8000.3:0, I am using the constants without names, but my hypothesis is that this register selects PHY frequency. If in the future I have access to an oscilloscope able to handle these frequencies, I will try to test this hypothesis. Fixes: de776d0d316f ("net: dsa: mv88e6xxx: add support for mv88e6393x family") Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-12-01net: dsa: mv88e6xxx: Add fix for erratum 5.2 of 88E6393X familyMarek Behún1-0/+48
Add fix for erratum 5.2 of the 88E6393X (Amethyst) family: for 10gbase-r mode, some undocumented registers need to be written some special values. Fixes: de776d0d316f ("net: dsa: mv88e6xxx: add support for mv88e6393x family") Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-12-01net: dsa: mv88e6xxx: Save power by disabling SerDes trasmitter and receiverMarek Behún2-4/+45
Save power on 88E6393X by disabling SerDes receiver and transmitter after SerDes is SerDes is disabled. Signed-off-by: Marek Behún <kabel@kernel.org> Cc: stable@vger.kernel.org # de776d0d316f ("net: dsa: mv88e6xxx: add support for mv88e6393x family") Signed-off-by: David S. Miller <davem@davemloft.net>
2021-12-01net: dsa: mv88e6xxx: Drop unnecessary check in mv88e6393x_serdes_erratum_4_6()Marek Behún1-17/+11
The check for lane is unnecessary, since the function is called only with allowed lane argument. Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-12-01net: dsa: mv88e6xxx: Fix application of erratum 4.8 for 88E6393XMarek Behún1-20/+33
According to SERDES scripts for 88E6393X, erratum 4.8 has to be applied every time before SerDes is powered on. Split the code for erratum 4.8 into separate function and call it in mv88e6393x_serdes_power(). Fixes: de776d0d316f ("net: dsa: mv88e6xxx: add support for mv88e6393x family") Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-12-01drm/i915/dp: Perform 30ms delay after source OUI writeLyude Paul4-0/+21
While working on supporting the Intel HDR backlight interface, I noticed that there's a couple of laptops that will very rarely manage to boot up without detecting Intel HDR backlight support - even though it's supported on the system. One example of such a laptop is the Lenovo P17 1st generation. Following some investigation Ville Syrjälä did through the docs they have available to them, they discovered that there's actually supposed to be a 30ms wait after writing the source OUI before we begin setting up the rest of the backlight interface. This seems to be correct, as adding this 30ms delay seems to have completely fixed the probing issues I was previously seeing. So - let's start performing a 30ms wait after writing the OUI, which we do in a manner similar to how we keep track of PPS delays (e.g. record the timestamp of the OUI write, and then wait for however many ms are left since that timestamp right before we interact with the backlight) in order to avoid waiting any longer then we need to. As well, this also avoids us performing this delay on systems where we don't end up using the HDR backlight interface. V3: * Move last_oui_write into intel_dp V2: * Move panel delays into intel_pps Signed-off-by: Lyude Paul <lyude@redhat.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Fixes: 4a8d79901d5b ("drm/i915/dp: Enable Intel's HDR backlight interface (only SDR for now)") Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: <stable@vger.kernel.org> # v5.12+ Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211130212912.212044-1-lyude@redhat.com (cherry picked from commit c7c90b0b8418a97d3aa8b39aae1992908948efad) Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2021-12-01regulator: qcom-rpmh: Add support for PM8450 regulatorsVinod Koul1-0/+18
Add the rpmh regulators found in PM8450 PMIC Signed-off-by: Vinod Koul <vkoul@kernel.org> Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20211201072515.3968843-3-vkoul@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
2021-12-01gpio: dwapb: clarify usage of the register file versionAndy Shevchenko1-4/+6
First of all, it's obvious that different versions can't be provided simultaneously. Hence, versions can't be bit masks. Second, due to above we have to mask out the version field in the flags and only that can be evaluated against the certain version. Clarify all above by: - introducing GPIO_REG_OFFSET_V1 and GPIO_REG_OFFSET_MASK - replacing conditional to mask out bits and compare to a version Luckily there is no functional change, so no need to backport this. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Serge Semin <fancer.lancer@gmail.com> Reviewed-by: Bartosz Golaszewski <brgl@bgdev.pl>
2021-12-01gpio: ml-ioh: Change whitespace to match gpio-pch.cBjorn Helgaas1-4/+4
The ML IOH driver is very similar to the PCH driver. To make it more similar, tweak the whitespace in ioh_gpio_direction_output() and ioh_gpio_direction_input(). No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2021-12-01gpio: ml-ioh: Use BIT() to match gpio-pch.cBjorn Helgaas1-13/+13
The ML IOH driver is very similar to the PCH driver. To make it more similar, replace "1 << nr" with "BIT(nr)". No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2021-12-01gpio: ml-ioh: Cache &pdev->dev to reduce repetitionBjorn Helgaas1-11/+11
ioh_gpio_probe() repeats the "&pdev->dev" expression several times. Cache the result as "struct device *dev" to reduce the repetition. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2021-12-01gpio: pch: Cache &pdev->dev to reduce repetitionBjorn Helgaas1-10/+11
pch_gpio_probe() repeats the "&pdev->dev" expression several times. Cache the result as "struct device *dev" to reduce the repetition. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2021-12-01gpio: pch: Use .driver_data instead of checking Device IDs againBjorn Helgaas1-12/+9
Previously, pch_gpio_probe() tested the Device ID to determine the type of IOH. But the driver core has already matched the Device ID with one of the IDs in the pch_gpio_pcidev_id[] table, and we can supply the IOH type there as .driver_data. Use the pci_device_id.driver_data to learn the IOH type instead of testing the Device ID again. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2021-12-01drm/etnaviv: constify static struct cooling_opsRikard Falkeborn1-1/+1
The only usage of cooling_ops is to pass its address to thermal_of_cooling_device_register(), which takes a pointer to const struct thermal_cooling_device_ops as input. Make it const to allow the compiler to put it in read-only memory. Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
2021-12-01drm/etnaviv: use a 32 bit mask as coherent DMA maskMichael Walle1-2/+18
The STLB and the first command buffer (which is used to set up the TLBs) has a 32 bit size restriction in hardware. There seems to be no way to specify addresses larger than 32 bit. Keep it simple and restict the addresses to the lower 4 GiB range for all coherent DMA memory allocations. Please note, that platform_device_alloc() will initialize dev->dma_mask to point to pdev->platform_dma_mask, thus dma_set_mask() will work as expected. While at it, move the dma_mask setup code to the of_dma_configure() to keep all the DMA setup code next to each other. Suggested-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
2021-12-01drm/etnaviv: fix dma configuration of the virtual deviceMichael Walle1-7/+12
The DMA configuration of the virtual device is inherited from the first actual etnaviv device. Unfortunately, this doesn't work with an IOMMU: [ 5.191008] Failed to set up IOMMU for device (null); retaining platform DMA ops This is because there is no associated iommu_group with the device. The group is set in iommu_group_add_device() which is eventually called by device_add() via the platform bus: device_add() blocking_notifier_call_chain() iommu_bus_notifier() iommu_probe_device() __iommu_probe_device() iommu_group_get_for_dev() iommu_group_add_device() Move of_dma_configure() into the probe function, which is called after device_add(). Normally, the platform code will already call it itself if .of_node is set. Unfortunately, this isn't the case here. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
2021-12-01drm/etnaviv: use PLATFORM_DEVID_NONEMichael Walle1-1/+1
There is already a macro for the magic value. Use it. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
2021-12-01PCI: vmd: Clean up domain before enumerationNirmal Patel1-0/+37
During VT-d pass-through, the VMD driver occasionally fails to enumerate underlying NVMe devices when repetitive reboots are performed in the guest OS. The issue can be resolved by resetting VMD root ports for proper enumeration and triggering secondary bus reset which will also propagate reset through downstream bridges. Link: https://lore.kernel.org/r/20211116221136.85134-1-nirmal.patel@linux.intel.com Signed-off-by: Nirmal Patel <nirmal.patel@linux.intel.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Jon Derrick <jonathan.derrick@linux.dev>
2021-12-01eeprom: at24: remove struct at24_clientHeiner Kallweit1-35/+18
We use member client only to get a reference to the associated struct device, via &client->dev. However we can get the same reference from the associated regmap, via regmap_get_device(regmap). Therefore struct at24_client can be removed and replaced with a regmap pointer. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2021-12-01dma-buf: system_heap: Use 'for_each_sgtable_sg' in pages free flowGuangming1-1/+1
For previous version, it uses 'sg_table.nent's to traverse sg_table in pages free flow. However, 'sg_table.nents' is reassigned in 'dma_map_sg', it means the number of created entries in the DMA adderess space. So, use 'sg_table.nents' in pages free flow will case some pages can't be freed. Here we should use sg_table.orig_nents to free pages memory, but use the sgtable helper 'for each_sgtable_sg'(, instead of the previous rather common helper 'for_each_sg' which maybe cause memory leak) is much better. Fixes: d963ab0f15fb0 ("dma-buf: system_heap: Allocate higher order pages if available") Signed-off-by: Guangming <Guangming.Cao@mediatek.com> Reviewed-by: Robin Murphy <robin.murphy@arm.com> Cc: <stable@vger.kernel.org> # 5.11.* Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: John Stultz <john.stultz@linaro.org> Signed-off-by: Sumit Semwal <sumit.semwal@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20211126074904.88388-1-guangming.cao@mediatek.com
2021-12-01PCI: xilinx-nwl: Simplify code and fix a memory leakChristophe JAILLET1-23/+7
Allocate space for bitmap in struct nwl_msi at probe time instead of dynamically allocating the memory at runtime. This simplifies code (especially error handling paths) and avoid some open-coded arithmetic in allocator arguments. This also fixes a potential memory leak. The bitmap was never freed. It is now part of a managed resource. Link: https://lore.kernel.org/r/5483f10a44b06aad55728576d489adfa16c3be91.1636279388.git.christophe.jaillet@wanadoo.fr Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Krzysztof Wilczyński <kw@linux.com>
2021-12-01drm/i915/gem: Fix a NULL pointer dereference in igt_request_rewind()Zhou Qingyang1-0/+10
In igt_request_rewind(), mock_context(i915, "A") is assigned to ctx[0] and used in i915_gem_context_get_engine(). There is a dereference of ctx[0] in i915_gem_context_get_engine(), which could lead to a NULL pointer dereference on failure of mock_context(i915, "A") . So as mock_context(i915, "B"). Although this bug is not serious for it belongs to testing code, it is better to be fixed to avoid unexpected failure in testing. Fix this bugs by adding checks about ctx[0] and ctx[1]. This bug was found by a static analyzer. The analysis employs differential checking to identify inconsistent security operations (e.g., checks or kfrees) between two code paths and confirms that the inconsistent operations are not recovered in the current function or the callers, so they constitute bugs. Note that, as a bug found by static analysis, it can be a false positive or hard to trigger. Multiple researchers have cross-reviewed the bug. Builds with CONFIG_DRM_I915_SELFTEST=y show no new warnings, and our static analyzer no longer warns about this code. References: 591c0fb85d1c ("drm/i915: Exercise request cancellation using a mock selftest") [tursulin: Replaced fixes with references to avoid.] Signed-off-by: Zhou Qingyang <zhou1615@umn.edu> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211130141545.153899-1-zhou1615@umn.edu
2021-12-01drm/i915: Use per device iommu checkTvrtko Ursulin12-31/+25
With both integrated and discrete Intel GPUs in a system, the current global check of intel_iommu_gfx_mapped, as done from intel_vtd_active() may not be completely accurate. In this patch we add i915 parameter to intel_vtd_active() in order to prepare it for multiple GPUs and we also change the check away from Intel specific intel_iommu_gfx_mapped (global exported by the Intel IOMMU driver) to probing the presence of IOMMU on a specific device using device_iommu_mapped(). This will return true both for IOMMU pass-through and address translation modes which matches the current behaviour. If in the future we wanted to distinguish between these two modes we could either use iommu_get_domain_for_dev() and check for __IOMMU_DOMAIN_PAGING bit indicating address translation, or ask for a new API to be exported from the IOMMU core code. v2: * Check for dmar translation specifically, not just iommu domain. (Baolu) v3: * Go back to plain "any domain" check for now, rewrite commit message. v4: * Use device_iommu_mapped. (Robin, Baolu) Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: Lu Baolu <baolu.lu@linux.intel.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Cc: Robin Murphy <robin.murphy@arm.com> Acked-by: Robin Murphy <robin.murphy@arm.com> Reviewed-by: Lu Baolu <baolu.lu@linux.intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211126141424.493753-1-tvrtko.ursulin@linux.intel.com