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2021-09-14vduse: Cleanup the old kernel states after reset failureXie Yongji1-4/+2
We should cleanup the old kernel states e.g. interrupt callback no matter whether the userspace handle the reset correctly or not since virtio-vdpa can't handle the reset failure now. Otherwise, the old state might be used after reset which might break something, e.g. the old interrupt callback might be triggered by userspace after reset, which can break the virtio device driver. Signed-off-by: Xie Yongji <xieyongji@bytedance.com> Link: https://lore.kernel.org/r/20210906142158.181-1-xieyongji@bytedance.com Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Jason Wang <jasowang@redhat.com>
2021-09-14vduse: missing error code in vduse_init()Dan Carpenter1-1/+3
This should return -ENOMEM if alloc_workqueue() fails. Currently it returns success. Fixes: b66219796563 ("vduse: Introduce VDUSE - vDPA Device in Userspace") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Link: https://lore.kernel.org/r/20210907073223.GA18254@kili Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Xie Yongji <xieyongji@bytedance.com> Acked-by: Jason Wang <jasowang@redhat.com>
2021-09-14virtio: don't fail on !of_device_is_compatibleMichael S. Tsirkin1-1/+6
A recent change checking of_device_is_compatible on probe broke some powerpc/pseries setups. Apparently there virtio devices do not have a "compatible" property - they are matched by PCI vendor/device ids. Let's just skip of_node setup but proceed with initialization like we did previously. Fixes: 694a1116b405 ("virtio: Bind virtio device to device-tree node") Reported-by: Alexey Kardashevskiy <aik@ozlabs.ru> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Viresh Kumar <viresh.kumar@linaro.org> Tested-by: Guenter Roeck <linux@roeck-us.net> Acked-by: Jason Wang <jasowang@redhat.com> Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2021-09-14clk: mediatek: Add MT8195 apusys clock supportChun-Jie Chen2-1/+94
Add MT8195 apusys clock controller which provides PLLs in AI processor Unit. Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20210914021633.26377-25-chun-jie.chen@mediatek.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-09-14clk: mediatek: Add MT8195 imp i2c wrapper clock supportChun-Jie Chen2-1/+69
Add MT8195 imp i2c wrapper clock controllers which provide clock gate control in I2C IP blocks. Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20210914021633.26377-24-chun-jie.chen@mediatek.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-09-14clk: mediatek: Add MT8195 wpesys clock supportChun-Jie Chen2-1/+145
Add MT8195 wpesys clock controllers which provide clock gate control in Wrapping Engine. Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> Link: https://lore.kernel.org/r/20210914021633.26377-23-chun-jie.chen@mediatek.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-09-14clk: mediatek: Add MT8195 vppsys1 clock supportChun-Jie Chen2-1/+109
Add MT8195 vppsys1 clock controller which provides clock gate controller for Video Processor Pipe. Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20210914021633.26377-22-chun-jie.chen@mediatek.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-09-14clk: mediatek: Add MT8195 vppsys0 clock supportChun-Jie Chen2-1/+111
Add MT8195 vppsys0 clock controller which provides clock gate controller for Video Processor Pipe. Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20210914021633.26377-21-chun-jie.chen@mediatek.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-09-14clk: mediatek: Add MT8195 vencsys clock supportChun-Jie Chen2-1/+71
Add MT8195 vencsys clock controllers which provide clock gate control for video encoder. Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> Link: https://lore.kernel.org/r/20210914021633.26377-20-chun-jie.chen@mediatek.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-09-14clk: mediatek: Add MT8195 vdosys1 clock supportChun-Jie Chen2-1/+141
Add MT8195 vdosys1 clock controller which provides clock gate control in video system. This is integrated with mtk-mmsys driver which will populate device by platform_device_register_data to start vdosys clock driver. Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> Link: https://lore.kernel.org/r/20210914021633.26377-19-chun-jie.chen@mediatek.com Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-09-14clk: mediatek: Add MT8195 vdosys0 clock supportChun-Jie Chen2-1/+124
Add MT8195 vdosys0 clock controller which provides clock gate control in video system. This is integrated with mtk-mmsys driver which will populate device by platform_device_register_data to start vdosys clock driver. Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> Link: https://lore.kernel.org/r/20210914021633.26377-18-chun-jie.chen@mediatek.com Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-09-14clk: mediatek: Add MT8195 vdecsys clock supportChun-Jie Chen2-1/+106
Add MT8195 vdec clock controllers which provide clock gate control for video decoder. Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20210914021633.26377-17-chun-jie.chen@mediatek.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-09-14clk: mediatek: Add MT8195 scp adsp clock supportChun-Jie Chen2-1/+48
Add MT8195 scp adsp clock controller which provides clock gate control for Audio DSP. Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20210914021633.26377-16-chun-jie.chen@mediatek.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-09-14clk: mediatek: Add MT8195 mfgcfg clock supportChun-Jie Chen2-1/+48
Add MT8195 mfg clock controller which provides clock gate control for GPU. Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> Link: https://lore.kernel.org/r/20210914021633.26377-15-chun-jie.chen@mediatek.com Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-09-14clk: mediatek: Add MT8195 ipesys clock supportChun-Jie Chen2-1/+53
Add MT8195 ipesys clock controller which provides clock gate control for Image Process Engine. Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> Link: https://lore.kernel.org/r/20210914021633.26377-14-chun-jie.chen@mediatek.com Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-09-14clk: mediatek: Add MT8195 imgsys clock supportChun-Jie Chen2-1/+97
Add MT8195 imgsys clock controllers which provide clock gate control for image IP blocks. Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20210914021633.26377-13-chun-jie.chen@mediatek.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-09-14clk: mediatek: Add MT8195 ccusys clock supportChun-Jie Chen2-1/+51
Add MT8195 ccusys clock controller which provides clock gate control in Camera Computing Unit. Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20210914021633.26377-12-chun-jie.chen@mediatek.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-09-14clk: mediatek: Add MT8195 camsys clock supportChun-Jie Chen2-1/+144
Add MT8195 camsys clock controllers which provide clock gate control for camera IP blocks. Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20210914021633.26377-11-chun-jie.chen@mediatek.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-09-14clk: mediatek: Add MT8195 infrastructure clock supportChun-Jie Chen2-1/+207
Add MT8195 infrastructure clock controller which provides clock gate control for basic IP like pwm, uart, spi and so on. Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> Link: https://lore.kernel.org/r/20210914021633.26377-10-chun-jie.chen@mediatek.com Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-09-14clk: mediatek: Add MT8195 peripheral clock supportChun-Jie Chen2-1/+64
Add MT8195 peripheral clock controller which provides clock gate control for ethernet/flashif/pcie/ssusb. Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20210914021633.26377-9-chun-jie.chen@mediatek.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-09-14clk: mediatek: Add MT8195 topckgen clock supportChun-Jie Chen2-1/+1274
Add MT8195 topckgen clock controller which provides muxes, dividers to handle variety clock selection in other IP blocks. Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> Link: https://lore.kernel.org/r/20210914021633.26377-8-chun-jie.chen@mediatek.com Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-09-14clk: mediatek: Add MT8195 apmixedsys clock supportChun-Jie Chen3-0/+154
Add MT8195 apmixedsys clock controller which provides Plls generated from SoC 26m and ssusb clock gate control. Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20210914021633.26377-7-chun-jie.chen@mediatek.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-09-14clk: mediatek: Fix resource leak in mtk_clk_simple_probeChun-Jie Chen1-2/+10
Release clock data when clock driver probe fail to fix possible resource leak. Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20210914021633.26377-6-chun-jie.chen@mediatek.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-09-14clk: mediatek: Add API for clock resource recycleChun-Jie Chen2-0/+10
In order to avoid resource leak when fail clock registration appears, so adds the common interface to handle it. Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20210914021633.26377-5-chun-jie.chen@mediatek.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-09-14clk: mediatek: Fix corner case of tuner_en_regChun-Jie Chen1-1/+1
On MT8195, tuner_en_reg is moved to register offest 0x0. If we only judge by tuner_en_reg, it may lead to wrong address. Add tuner_en_bit to the check condition. And it has been confirmed, on all the MediaTek SoCs, bit0 of offset 0x0 is always occupied by clock square control. Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20210914021633.26377-4-chun-jie.chen@mediatek.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-09-14clk: qcom: mmcc-msm8998: Remove unnecessary fallbacks to global clocksMarijn Suijten1-57/+48
A previous patch removes the "xo" clock from the global namespace making it impossible to acquire by that ".name". The device-tree for msm8998 currently does not include an mmcc node but the dt-bindings for this compatible already require all these clocks, and the patch introducing this node [1] also includes them. [1]: https://patchwork.kernel.org/project/linux-arm-msm/patch/20210901183123.1087392-1-angelogioacchino.delregno@somainline.org/ Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Link: https://lore.kernel.org/r/20210911121340.261920-9-marijn.suijten@somainline.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-09-14clk: qcom: gpucc-msm8998: Remove unnecessary fallbacks to global clocksMarijn Suijten1-3/+2
A previous patch removes the "xo" clock from the global namespace making it impossible to acquire by that ".name". The device-tree for msm8998 already provides the "xo" and "gpll0" clock since the addition of the gpucc node making it unnecessary to have this fallback at all. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Link: https://lore.kernel.org/r/20210911121340.261920-8-marijn.suijten@somainline.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-09-14clk: qcom: mmcc-msm8998: Use ARRAY_SIZE for num_parentsMarijn Suijten1-39/+39
Where possible, use ARRAY_SIZE to determine the number of parents in clk_parent_data, instead of hardcoding it. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Link: https://lore.kernel.org/r/20210911121340.261920-6-marijn.suijten@somainline.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-09-14clk: qcom: gpucc-msm8998: Use ARRAY_SIZE for num_parentsMarijn Suijten1-4/+4
Where possible, use ARRAY_SIZE to determine the number of parents in clk_parent_data, instead of hardcoding it. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Link: https://lore.kernel.org/r/20210911121340.261920-5-marijn.suijten@somainline.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-09-14clk: qcom: gcc-msm8998: Remove transient global "xo" clockMarijn Suijten1-27/+30
Now that all clock controllers and the DSI PLL clocks rely on "xo" being passed in DT as phandle instead of looking it up by the global "xo" name this transient clock can be removed, leaving only the fixed-factor "xo_board" clock in DT. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Link: https://lore.kernel.org/r/20210911121340.261920-4-marijn.suijten@somainline.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-09-14clk: qcom: gcc-msm8998: Use parent_data/hws for internal clock relationsMarijn Suijten1-241/+281
Use parent_data and parent_hws to specify internal relations using pointers instead of names, and use .fw_name to retrieve external clocks from clock-names in the DT rather than the global clock tree. Note that this change relies on the "xo" and "sleep_clk" clocks to be provided in DT, as per the relevant qcom,gcc-mnsm8998.yaml dt-bindings. These clocks have been added in a prior patch [1]. [1]: https://lore.kernel.org/linux-arm-msm/20210911120101.248476-1-marijn.suijten@somainline.org/ Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Link: https://lore.kernel.org/r/20210911121340.261920-3-marijn.suijten@somainline.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-09-14clk: qcom: gcc-msm8998: Move parent names and mapping below GPLLsMarijn Suijten1-92/+92
Prepare for a future patch where we use .hw pointers to these GPLL clocks in the parent mapping instead of name references. This requires the GPLL clocks to be decared before parent_data arrays. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Link: https://lore.kernel.org/r/20210911121340.261920-2-marijn.suijten@somainline.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-09-14clk: qcom: kpss-xcc: Make use of the helper function devm_platform_ioremap_resource()Cai Huoqing1-3/+1
Use the devm_platform_ioremap_resource() helper instead of calling platform_get_resource() and devm_ioremap_resource() separately Signed-off-by: Cai Huoqing <caihuoqing@baidu.com> Link: https://lore.kernel.org/r/20210907084858.4101-1-caihuoqing@baidu.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-09-14clk: qcom: common: Make use of the helper function devm_platform_ioremap_resource()Cai Huoqing1-6/+2
Use the devm_platform_ioremap_resource() helper instead of calling platform_get_resource() and devm_ioremap_resource() separately Signed-off-by: Cai Huoqing <caihuoqing@baidu.com> Link: https://lore.kernel.org/r/20210907084851.4050-1-caihuoqing@baidu.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-09-14clk: qcom: a53-pll: Make use of the helper function devm_platform_ioremap_resource()Cai Huoqing1-3/+1
Use the devm_platform_ioremap_resource() helper instead of calling platform_get_resource() and devm_ioremap_resource() separately Signed-off-by: Cai Huoqing <caihuoqing@baidu.com> Link: https://lore.kernel.org/r/20210907084843.3999-1-caihuoqing@baidu.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-09-14soc: bcm63xx-power: Make use of the helper function devm_platform_ioremap_resource()Cai Huoqing1-3/+1
Use the devm_platform_ioremap_resource() helper instead of calling platform_get_resource() and devm_ioremap_resource() separately Signed-off-by: Cai Huoqing <caihuoqing@baidu.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2021-09-14soc: bcm: bcm-pmb: Make use of the helper function devm_platform_ioremap_resource()Cai Huoqing1-3/+1
Use the devm_platform_ioremap_resource() helper instead of calling platform_get_resource() and devm_ioremap_resource() separately Signed-off-by: Cai Huoqing <caihuoqing@baidu.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2021-09-14clk: qcom: gpucc-sdm660: Remove fallback to global clock namesMarijn Suijten1-5/+4
The necessary clocks for this driver are already fully specified in sdm630 DT under the .fw_name, and do not need an implicit fallback to their global name. Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Link: https://lore.kernel.org/r/20210829204822.289829-5-marijn.suijten@somainline.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-09-14clk: qcom: mmcc-sdm660: Use ARRAY_SIZE for num_parentsMarijn Suijten1-36/+36
Where possible, use ARRAY_SIZE to determine the number of parents in clk_parent_data, instead of hardcoding it. Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Link: https://lore.kernel.org/r/20210829204822.289829-4-marijn.suijten@somainline.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-09-14clk: qcom: gpucc-sdm660: Use ARRAY_SIZE for num_parentsMarijn Suijten1-3/+3
Where possible, use ARRAY_SIZE to determine the number of parents in clk_parent_data, instead of hardcoding it. Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Link: https://lore.kernel.org/r/20210829204822.289829-3-marijn.suijten@somainline.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-09-14clk: qcom: gcc-sdm660: Use ARRAY_SIZE for num_parentsMarijn Suijten1-40/+40
Where possible, use ARRAY_SIZE to determine the number of parents in clk_parent_data instead of hardcoding a number that relies on an array defined hundreds of lines above. Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Link: https://lore.kernel.org/r/20210829204822.289829-2-marijn.suijten@somainline.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-09-14drm/ttm: fix type mismatch error on sparc64Huang Rui1-1/+2
On sparc64, __fls() returns an "int", but the drm TTM code expected it to be "unsigned long" as on x86. As a result, on sparc (and arc, and m68k) you get build errors because 'min()' checks that the types match. As suggested by Linus, it can use min_t instead of min to force the type to be "unsigned int". Suggested-by: Linus Torvalds <torvalds@linux-foundation.org> Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexdeucher@gmail.com> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2021-09-14memblock: introduce saner 'memblock_free_ptr()' interfaceLinus Torvalds2-2/+2
The boot-time allocation interface for memblock is a mess, with 'memblock_alloc()' returning a virtual pointer, but then you are supposed to free it with 'memblock_free()' that takes a _physical_ address. Not only is that all kinds of strange and illogical, but it actually causes bugs, when people then use it like a normal allocation function, and it fails spectacularly on a NULL pointer: https://lore.kernel.org/all/20210912140820.GD25450@xsang-OptiPlex-9020/ or just random memory corruption if the debug checks don't catch it: https://lore.kernel.org/all/61ab2d0c-3313-aaab-514c-e15b7aa054a0@suse.cz/ I really don't want to apply patches that treat the symptoms, when the fundamental cause is this horribly confusing interface. I started out looking at just automating a sane replacement sequence, but because of this mix or virtual and physical addresses, and because people have used the "__pa()" macro that can take either a regular kernel pointer, or just the raw "unsigned long" address, it's all quite messy. So this just introduces a new saner interface for freeing a virtual address that was allocated using 'memblock_alloc()', and that was kept as a regular kernel pointer. And then it converts a couple of users that are obvious and easy to test, including the 'xbc_nodes' case in lib/bootconfig.c that caused problems. Reported-by: kernel test robot <oliver.sang@intel.com> Fixes: 40caa127f3c7 ("init: bootconfig: Remove all bootconfig data when the init memory is removed") Cc: Steven Rostedt <rostedt@goodmis.org> Cc: Mike Rapoport <rppt@kernel.org> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Ingo Molnar <mingo@kernel.org> Cc: Masami Hiramatsu <mhiramat@kernel.org> Cc: Vlastimil Babka <vbabka@suse.cz> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2021-09-14drm/amdgpu: use IS_ERR for debugfs APIsNirmoy Das2-8/+6
debugfs APIs returns encoded error so use IS_ERR for checking return value. v2: return PTR_ERR(ent) References: https://gitlab.freedesktop.org/drm/amd/-/issues/1686 Signed-off-by: Nirmoy Das <nirmoy.das@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-By: Shashank Sharma <shashank.sharma@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2021-09-14amd/display: downgrade validation failure log levelSimon Ser1-1/+2
In amdgpu_dm_atomic_check, dc_validate_global_state is called. On failure this logs a warning to the kernel journal. However warnings shouldn't be used for atomic test-only commit failures: user-space might be perfoming a lot of atomic test-only commits to find the best hardware configuration. Downgrade the log to a regular DRM atomic message. While at it, use the new device-aware logging infrastructure. This fixes error messages in the kernel when running gamescope [1]. [1]: https://github.com/Plagman/gamescope/issues/245 Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Simon Ser <contact@emersion.fr> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Harry Wentland <hwentlan@amd.com> Cc: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-09-14drm/amdgpu: fix use after free during BO moveChristian König1-9/+9
The memory backing old_mem is already freed at that point, move the check a bit more up. Signed-off-by: Christian König <christian.koenig@amd.com> Fixes: bfa3357ef9ab ("drm/ttm: allocate resource object instead of embedding it v2") Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1699 Acked-by: Nirmoy Das <nirmoy.das@amd.com> Reviewed-by: Michel Dänzer <mdaenzer@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2021-09-14drm/amd/pm: fix the issue of uploading powerplay tableKenneth Feng1-1/+1
fix the issue of uploading powerplay table due to the dependancy of rlc. Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Jack Gui <Jack.Gui@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2021-09-14drm/amd/amdgpu: Increase HWIP_MAX_INSTANCE to 10Ernst Sjöstrand1-1/+1
Seems like newer cards can have even more instances now. Found by UBSAN: array-index-out-of-bounds in drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c:318:29 index 8 is out of range for type 'uint32_t *[8]' Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1697 Cc: stable@vger.kernel.org Signed-off-by: Ernst Sjöstrand <ernstp@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-09-14drm/amdgpu: Fix a race of IB testxinhui pan1-2/+2
Direct IB submission should be exclusive. So use write lock. Signed-off-by: xinhui pan <xinhui.pan@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-09-14drm/amdgpu: VCN avoid memory allocation during IB testxinhui pan1-53/+44
alloc extra msg from direct IB pool. Signed-off-by: xinhui pan <xinhui.pan@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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