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2022-08-31Merge tag 'for-linus-2022083101' of git://git.kernel.org/pub/scm/linux/kernel/git/hid/hidLinus Torvalds13-34/+96
Pull HID fixes from Jiri Kosina: - NULL pointer dereference fix for Steam driver (Lee Jones) - memory leak fix for hidraw (Karthik Alapati) - regression fix for functionality of some UCLogic tables (Benjamin Tissoires) - a few new device IDs and device-specific quirks * tag 'for-linus-2022083101' of git://git.kernel.org/pub/scm/linux/kernel/git/hid/hid: HID: nintendo: fix rumble worker null pointer deref HID: intel-ish-hid: ipc: Add Meteor Lake PCI device ID HID: input: fix uclogic tablets HID: Add Apple Touchbar on T2 Macs in hid_have_special_driver list HID: add Lenovo Yoga C630 battery quirk HID: AMD_SFH: Add a DMI quirk entry for Chromebooks HID: thrustmaster: Add sparco wheel and fix array length hid: intel-ish-hid: ishtp: Fix ishtp client sending disordered message HID: ishtp-hid-clientHID: ishtp-hid-client: Fix comment typo HID: asus: ROG NKey: Ignore portion of 0x5a report HID: hidraw: fix memory leak in hidraw_release() HID: steam: Prevent NULL pointer dereference in steam_{recv,send}_report
2022-08-31Merge tag 'lsm-pr-20220829' of git://git.kernel.org/pub/scm/linux/kernel/git/pcmoore/lsmLinus Torvalds1-0/+6
Pull LSM support for IORING_OP_URING_CMD from Paul Moore: "Add SELinux and Smack controls to the io_uring IORING_OP_URING_CMD. These are necessary as without them the IORING_OP_URING_CMD remains outside the purview of the LSMs (Luis' LSM patch, Casey's Smack patch, and my SELinux patch). They have been discussed at length with the io_uring folks, and Jens has given his thumbs-up on the relevant patches (see the commit descriptions). There is one patch that is not strictly necessary, but it makes testing much easier and is very trivial: the /dev/null IORING_OP_URING_CMD patch." * tag 'lsm-pr-20220829' of git://git.kernel.org/pub/scm/linux/kernel/git/pcmoore/lsm: Smack: Provide read control for io_uring_cmd /dev/null: add IORING_OP_URING_CMD support selinux: implement the security_uring_cmd() LSM hook lsm,io_uring: add LSM hooks for the new uring_cmd file op
2022-08-31drm/i915/bios: Copy the whole MIPI sequence blockVille Syrjälä1-0/+7
Turns out the MIPI sequence block version number and new block size fields are considered part of the block header and are not included in the reported new block size field itself. Bump up the block size appropriately so that we'll copy over the last five bytes of the block as well. For this particular machine those last five bytes included parts of the GPIO op for the backlight on sequence, causing the backlight no longer to turn back on: Sequence 6 - MIPI_SEQ_BACKLIGHT_ON Delay: 20000 us - GPIO index 0, number 0, set 0 (0x00) + GPIO index 1, number 70, set 1 (0x01) Cc: stable@vger.kernel.org Fixes: e163cfb4c96d ("drm/i915/bios: Make copies of VBT data blocks") Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/6652 Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220829135834.8585-1-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2022-08-31drm/i915/bios: Dump PNPID and panel nameVille Syrjälä1-0/+23
Dump the panel PNPID and name from the VBT. Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220510104242.6099-16-ville.syrjala@linux.intel.com
2022-08-31gpio: realtek-otto: switch to 32-bit I/OSander Vanheule1-81/+85
By using 16-bit I/O on the GPIO peripheral, which is apparently not safe on MIPS, the IMR can end up containing garbage. This then results in interrupt triggers for lines that don't have an interrupt handler associated. The irq_desc lookup fails, and the ISR will not be cleared, keeping the CPU busy until reboot, or until another IMR operation restores the correct value. This situation appears to happen very rarely, for < 0.5% of IMR writes. Instead of using 8-bit or 16-bit I/O operations on the 32-bit memory mapped peripheral registers, switch to using 32-bit I/O only, operating on the entire bank for all single bit line settings. For 2-bit line settings, with 16-bit port values, stick to manual (un)packing. This issue has been seen on RTL8382M (HPE 1920-16G), RTL8391M (Netgear GS728TP v2), and RTL8393M (D-Link DGS-1210-52 F3, Zyxel GS1900-48). Reported-by: Luiz Angelo Daros de Luca <luizluca@gmail.com> # DGS-1210-52 Reported-by: Birger Koblitz <mail@birger-koblitz.de> # GS728TP Reported-by: Jan Hoffmann <jan@3e8.eu> # 1920-16G Fixes: 0d82fb1127fb ("gpio: Add Realtek Otto GPIO support") Signed-off-by: Sander Vanheule <sander@svanheule.net> Cc: Paul Cercueil <paul@crapouillou.net> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-08-31drm/i915/fence: replace BUG_ON() with BUILD_BUG_ON()Jani Nikula2-3/+5
Avoid BUG_ON(). Since __i915_sw_fence_init() is always called via a wrapper macro, we can replace it with a compile time BUILD_BUG_ON(). Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220830093411.1511040-5-jani.nikula@intel.com
2022-08-31drm/i915/perf: replace BUG_ON() with WARN_ON()Jani Nikula1-1/+2
Avoid BUG_ON(). Replace with WARN_ON() and early return. Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220830093411.1511040-4-jani.nikula@intel.com
2022-08-31drm/i915/pch: replace BUG_ON() with drm_WARN_ON()Jani Nikula1-1/+1
Avoid BUG_ON(). Replace with drm_WARN_ON(). Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220830093411.1511040-3-jani.nikula@intel.com
2022-08-31drm/i915/dpll: replace BUG_ON() with drm_WARN_ON()Jani Nikula1-2/+4
Avoid BUG_ON(). Actually check the dpll count and bail out loudly with drm_WARN_ON() from the loop before overflowing i915->dpll.shared_dplls[]. v2: Rebase Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220830093411.1511040-2-jani.nikula@intel.com
2022-08-31drm/i915/crt: remove BUG_ON()Jani Nikula1-2/+0
Avoid BUG_ON(). We don't have such checks on output type anywhere else either, so just remove. Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220830093411.1511040-1-jani.nikula@intel.com
2022-08-31gpio: imx-scu: add imx-scu GPIO driverShenwei Wang3-0/+144
The SCU firmware on i.MX8 platforms provides a set of APIs to control the GPIO PINs on the SCU domain. This patch implements the standard GPIO driver interface to access those PINs on the SCU domain over the SCU APIs. Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-08-31drm/i915/gmbus: mass dev_priv -> i915 renameJani Nikula1-134/+134
Now that gmbus no longer uses macros that assume dev_priv is implicitly available, mass rename dev_priv to i915 in gmbus code. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/fcf16a65f7975379a887ed57c623b25de7b344c8.1661855191.git.jani.nikula@intel.com
2022-08-31drm/i915/reg: stop using implicit dev_priv in DSPCLK_GATE_DJani Nikula6-13/+13
Remove the implicit dev_priv usage in DSPCLK_GATE_D register, and pass it as parameter. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/41ca83573ca2d94bea568058f8cb8c35e814f8b1.1661855191.git.jani.nikula@intel.com
2022-08-31drm/i915/gmbus: stop using implicit dev_priv in register definitionsJani Nikula2-34/+34
Since the beginning of time, we've implicitly assumed dev_priv is present as a local variable in many places. We've gone a long way in removing many of them, but the register macro definitions are the last holdout. Remove them from the gmbus macros. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/a4f482c1f523d7225420f8386f1eea6d639db843.1661855191.git.jani.nikula@intel.com
2022-08-31drm/i915/gmbus: add wrapper for gmbus mmio baseJani Nikula1-8/+9
Don't repeat the same thing so much. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/db360d824d47601d5ca843afa6f5d6ee17d0e514.1661855191.git.jani.nikula@intel.com
2022-08-31drm/i915/gmbus: whitespace cleanup in reg definitionsJani Nikula1-54/+63
Simple whitespace cleanup and comment movement. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/50df38c9f3e53dba64429b7eaa6c0d7bfaf74078.1661855191.git.jani.nikula@intel.com
2022-08-31drm/i915/gmbus: split out gmbus regs in a separate fileJani Nikula4-64/+74
Declutter i915_reg.h, and also observe very few places need the gmbus register defitions. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/820807f404e548ab365b934d44f01b306eaa28c2.1661855191.git.jani.nikula@intel.com
2022-08-31vfio/type1: Unpin zero pagesAlex Williamson1-0/+12
There's currently a reference count leak on the zero page. We increment the reference via pin_user_pages_remote(), but the page is later handled as an invalid/reserved page, therefore it's not accounted against the user and not unpinned by our put_pfn(). Introducing special zero page handling in put_pfn() would resolve the leak, but without accounting of the zero page, a single user could still create enough mappings to generate a reference count overflow. The zero page is always resident, so for our purposes there's no reason to keep it pinned. Therefore, add a loop to walk pages returned from pin_user_pages_remote() and unpin any zero pages. Cc: stable@vger.kernel.org Reported-by: Luboslav Pivarc <lpivarc@redhat.com> Reviewed-by: David Hildenbrand <david@redhat.com> Link: https://lore.kernel.org/r/166182871735.3518559.8884121293045337358.stgit@omen Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
2022-08-31drm/i915: move and group properties under display.propertiesJani Nikula4-11/+14
Move display property related members under drm_i915_private display sub-struct. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/14b14f871e322419b10166c1bd8a5a956f5430c8.1661779055.git.jani.nikula@intel.com
2022-08-31drm/i915: move atomic_helper under display sub-structJani Nikula3-12/+13
Move display atomic helper related members under drm_i915_private display sub-struct. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/1d864238a92a32d52ea70c0079c910cc90955324.1661779055.git.jani.nikula@intel.com
2022-08-31drm/i915: move quirks under display sub-structJani Nikula3-3/+6
Move display quirk related members under drm_i915_private display sub-struct. Prefer adding anonymous sub-structs even for single members that aren't our own structs. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/c4a1a5657023efe24a362c67daf79260f179f0eb.1661779055.git.jani.nikula@intel.com
2022-08-31drm/i915/quirks: abstract quirks further by making quirk ids an enumJani Nikula3-16/+23
Turn the quirk ids to enums instead of bits, and hide the masking inside intel_quirks.c. Define the enums in intel_quirks.h to declutter i915_drv.h while at it. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/60d8a20e1f8845b0bef53c2e32d524be888e426d.1661779055.git.jani.nikula@intel.com
2022-08-31drm/i915/quirks: abstract checking for display quirksJani Nikula6-9/+21
Add intel_has_quirk() for checking if a display quirk is present. Avoid accessing i915->quirks all over the place. v2: Rebase Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/74f954ca81a8068033141a15686dffd01ad9b0f9.1661779055.git.jani.nikula@intel.com
2022-08-31drm/i915: move and group modeset_wq and flip_wq under display.wqJani Nikula3-15/+18
Move display workqueue related members under drm_i915_private display sub-struct. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/f34f7fb45510e880ce0cc16cb2fbba72fbe94a1d.1661779055.git.jani.nikula@intel.com
2022-08-31drm/i915: move dbuf under display sub-structJani Nikula7-22/+22
Move display dbuf related members under drm_i915_private display sub-struct. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/3363a516c12bd8bfb240131e9eb9fc3a0f3057a3.1661779055.git.jani.nikula@intel.com
2022-08-31drm/i915: move fb_tracking under display sub-structJani Nikula5-44/+42
Move display frontbuffer tracking related members under drm_i915_private display sub-struct. Rename struct i915_frontbuffer_tracking to intel_frontbuffer_tracking while at it. FIXME: fb_tracking.lock mutex init should be moved away from i915_gem_init_early(). Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/a5444d0a373afca46da9a2f6e4db442af21b429b.1661779055.git.jani.nikula@intel.com
2022-08-31USB: serial: ch341: fix disabled rx timer on older devicesJohan Hovold1-1/+5
At least one older CH341 appears to have the RX timer enable bit inverted so that setting it disables the RX timer and prevents the FIFO from emptying until it is full. Only set the RX timer enable bit for devices with version newer than 0x27 (even though this probably affects all pre-0x30 devices). Reported-by: Jonathan Woithe <jwoithe@just42.net> Tested-by: Jonathan Woithe <jwoithe@just42.net> Link: https://lore.kernel.org/r/Ys1iPTfiZRWj2gXs@marvin.atrad.com.au Fixes: 4e46c410e050 ("USB: serial: ch341: reinitialize chip on reconfiguration") Cc: stable@vger.kernel.org # 4.10 Signed-off-by: Johan Hovold <johan@kernel.org>
2022-08-31USB: serial: ch341: fix lost character on LCR updatesJohan Hovold1-1/+9
Disable LCR updates for pre-0x30 devices which use a different (unknown) protocol for line control and where the current register write causes the next received character to be lost. Note that updating LCR using the INIT command has no effect on these devices either. Reported-by: Jonathan Woithe <jwoithe@just42.net> Tested-by: Jonathan Woithe <jwoithe@just42.net> Link: https://lore.kernel.org/r/Ys1iPTfiZRWj2gXs@marvin.atrad.com.au Fixes: 4e46c410e050 ("USB: serial: ch341: reinitialize chip on reconfiguration") Fixes: 55fa15b5987d ("USB: serial: ch341: fix baud rate and line-control handling") Cc: stable@vger.kernel.org # 4.10 Signed-off-by: Johan Hovold <johan@kernel.org>
2022-08-31pinctrl: imx8m: kconfig: Depends on SOC_IMX8MFrancesco Dolcini1-4/+4
Change PINCTRL_IMX8M* dependency from just ARCH_MXC to SOC_IMX8M, likewise is done for other PINCTRL_IMX* kconfig. This avoid polluting the config when SOC_IMX8M is not enabled. Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Link: https://lore.kernel.org/r/20220830142727.313080-1-francesco.dolcini@toradex.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-08-31pinctrl: amd: change dev_warn to dev_dbg for additional feature supportBasavaraj Natikar1-2/+2
Use dev_dbg instead of dev_warn for additional support of pinmux feature. Signed-off-by: Basavaraj Natikar <Basavaraj.Natikar@amd.com> Link: https://lore.kernel.org/r/20220830110525.1933198-1-Basavaraj.Natikar@amd.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-08-31net: hns3: net: hns3: add querying and setting fec off mode from firmwareGuangbin Huang3-12/+16
For some new devices, the FEC mode can not be set to OFF in speed 200G. In order to flexibly adapt to all types of devices, driver queries fec ability from firmware to decide whether OFF mode can be supported. Signed-off-by: Guangbin Huang <huangguangbin2@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-31net: hns3: add querying and setting fec llrs mode from firmwareHao Lan6-1/+22
This patch supports llrs fec mode in speed 200G for some new devices, and suppoprts querying llrs fec ability from firmware. Signed-off-by: Hao Lan <lanhao@huawei.com> Signed-off-by: Guangbin Huang <huangguangbin2@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-31net: hns3: add querying fec ability from firmwareGuangbin Huang2-9/+26
For some new devices, driver can queries fec ability from firmware to decide which FEC mode can be supported. If devices of old version which not support querying fec ability, driver sets fixed ability according to current speed. Signed-off-by: Guangbin Huang <huangguangbin2@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-31net: hns3: add getting capabilities of gro offload and fd from firmwareGuangbin Huang7-24/+42
As some new devices may not support GRO offload and flow table director, to support these devices, driver needs to querying capabilities of GRO offload and flow table director from firmware. Whether the driver supports these two features depends on capabilities. For old device of version HNAE3_DEVICE_VERSION_V2, driver sets their capabilities of these two features to fixed value. Setting default features of netdev and debugfs also need to identify whether support these two features. Signed-off-by: Guangbin Huang <huangguangbin2@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-31soc: mediatek: pm-domains: Simplify some error messageChristophe JAILLET1-3/+3
dev_err_probe() already prints the error code in a human readable way, so there is no need to duplicate it as a numerical value at the end of the message. Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Link: https://lore.kernel.org/r/e6ba80d8e27fdb2b1527c7eae6687e481960c81d.1659735996.git.christophe.jaillet@wanadoo.fr Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-08-31net: thunderbolt: Update module description with mention of USB4Mika Westerberg1-2/+3
It is Thunderbolt/USB4 now so reflect that in the module description too to avoid any confusion. No functional changes. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-31net: thunderbolt: Enable full end-to-end flow controlMika Westerberg1-9/+20
USB4NET protocol allows the networking drivers to take advantage of end-to-end flow control supported by the USB4 host interface. This should prevent the receiving side from dropping network packets. In adddition add a module parameter that can be used to turn this off just in case it causes problems. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-31thunderbolt: Add back Intel Falcon Ridge end-to-end flow control workaroundMika Westerberg1-7/+42
As we are now enabling full end-to-end flow control to the Thunderbolt networking driver, in order for it to work properly on second generation Thunderbolt hardware (Falcon Ridge), we need to add back the workaround that was removed with commit 53f13319d131 ("thunderbolt: Get rid of E2E workaround"). However, this time we only apply it for Falcon Ridge controllers as a form of an additional quirk. For non-Falcon Ridge this does nothing. While there fix a typo 'reqister' -> 'register' in the comment. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-31thunderbolt: Show link type for XDomain connections tooMika Westerberg4-8/+12
Following what we do for routers already, extend this to XDomain connections as well. This will show in sysfs whether the link is in USB4 or Thunderbolt mode. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-31net: thunderbolt: Enable DMA paths only after rings are enabledMika Westerberg1-11/+17
If the other host starts sending packets early on it is possible that we are still in the middle of populating the initial Rx ring packets to the ring. This causes the tbnet_poll() to mess over the queue and causes list corruption. This happens specifically when connected with macOS as it seems start sending various IP discovery packets as soon as its side of the paths are configured. To prevent this we move the DMA path enabling to happen after we have primed the Rx ring. This makes sure no incoming packets can arrive before we are ready to handle them. Fixes: e69b6c02b4c3 ("net: Add support for networking over Thunderbolt cable") Cc: stable@vger.kernel.org Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-31ethernet: rocker: fix sleep in atomic context bug in neigh_timer_handlerDuoming Zhou1-1/+1
The function neigh_timer_handler() is a timer handler that runs in an atomic context. When used by rocker, neigh_timer_handler() calls "kzalloc(.., GFP_KERNEL)" that may sleep. As a result, the sleep in atomic context bug will happen. One of the processes is shown below: ofdpa_fib4_add() ... neigh_add_timer() (wait a timer) neigh_timer_handler() neigh_release() neigh_destroy() rocker_port_neigh_destroy() rocker_world_port_neigh_destroy() ofdpa_port_neigh_destroy() ofdpa_port_ipv4_neigh() kzalloc(sizeof(.., GFP_KERNEL) //may sleep This patch changes the gfp_t parameter of kzalloc() from GFP_KERNEL to GFP_ATOMIC in order to mitigate the bug. Fixes: 00fc0c51e35b ("rocker: Change world_ops API and implementation to be switchdev independant") Signed-off-by: Duoming Zhou <duoming@zju.edu.cn> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-31USB: serial: cp210x: add Decagon UCA device idJohan Hovold1-0/+1
Add the device id for Decagon Devices USB Cable Adapter. Link: https://lore.kernel.org/r/trinity-819f9db2-d3e1-40e9-a669-9c245817c046-1661523546680@msvc-mesg-web108 Cc: stable@vger.kernel.org Signed-off-by: Johan Hovold <johan@kernel.org>
2022-08-31gpio/rockchip: Convert to generic_handle_domain_irq()Jeffy Chen1-16/+5
Follow commit dbd1c54fc820 ("gpio: Bulk conversion to generic_handle_domain_irq()"). Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-08-31drm/i915: move and group fdi members under display.fdiJani Nikula4-10/+12
Move display fdi related members under drm_i915_private display sub-struct. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/b66fe7cf2c6f9e5b7bbfcaff40400492ac706721.1661779055.git.jani.nikula@intel.com
2022-08-31drm/i915: move and group power related members under display.powerJani Nikula8-110/+111
Move display power related members under drm_i915_private display sub-struct. Arguably chv_phy_control and chv_phy_assert could be placed in a phy substruct, but they are only used in the power code. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/57bfa82f6fe85a775f80c398b2a7dff77b9452b0.1661779055.git.jani.nikula@intel.com
2022-08-31drm/i915: move fbc to display.fbcJani Nikula5-8/+7
Move display FBC related members under drm_i915_private display sub-struct. Pointers and arrays of pointers to structs that we defined are fine without a sub-struct wrapping. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/1151469ec13d392df86b72a375f490fd70a3257a.1661779055.git.jani.nikula@intel.com
2022-08-31drm/i915: move vbt to display.vbtJani Nikula15-187/+188
Move display VBT related members under drm_i915_private display sub-struct. v2: Rebase Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/db4b648b201ea0b79654fec2028120999a735db0.1661779055.git.jani.nikula@intel.com
2022-08-31drm/i915: move mipi_mmio_base to display.dsiJani Nikula4-98/+102
Move display DSI related members under drm_i915_private display sub-struct. Prefer adding anonymous sub-structs even for single members that aren't our own structs. Abstract mmio base member access in register definitions in a macro. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/dc7c5a871fe558a809ea943eca5c71dfff1740a8.1661779055.git.jani.nikula@intel.com
2022-08-31pinctrl: aspeed: Force to disable the function's signalBilly Tsai1-10/+1
When the driver want to disable the signal of the function, it doesn't need to query the state of the mux function's signal on a pin. The condition below will miss the disable of the signal: Ball | Default | P0 Signal | P0 Expression | Other -----+---------+-----------+-----------------------------+---------- E21 GPIOG0 SD2CLK SCU4B4[16]=1 & SCU450[1]=1 GPIOG0 -----+---------+-----------+-----------------------------+---------- B22 GPIOG1 SD2CMD SCU4B4[17]=1 & SCU450[1]=1 GPIOG1 -----+---------+-----------+-----------------------------+---------- Assume the register status like below: SCU4B4[16] == 1 & SCU4B4[17] == 1 & SCU450[1]==1 After the driver set the Ball E21 to the GPIOG0: SCU4B4[16] == 0 & SCU4B4[17] == 1 & SCU450[1]==0 When the driver want to set the Ball B22 to the GPIOG1, the condition of the SD2CMD will be false causing SCU4B4[17] not to be cleared. Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com> Acked-by: Andrew Jeffery <andrew@aj.id.au> Link: https://lore.kernel.org/r/20220818101839.28860-1-billy_tsai@aspeedtech.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-08-31phy: lan966x: add support for QUSGMIIMaxime Chevallier1-0/+3
Makes so that the serdes driver also takes QUSGMII in consideration. It's configured exactly as QSGMII as far as the serdes driver is concerned. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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