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2022-08-22drm/lcdif: Clean up debug prints and commentsMarek Vasut1-1/+1
Update debug print to report bridge timings over connector ones. Drop missed comment commit from mxsfb. Acked-by: Sam Ravnborg <sam@ravnborg.org> Reviewed-by: Liu Ying <victor.liu@nxp.com> Reported-by: Liu Ying <victor.liu@oss.nxp.com> Tested-by: Martyn Welch <martyn.welch@collabora.com> Fixes: 9db35bb349a0e ("drm: lcdif: Add support for i.MX8MP LCDIF variant") Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexander Stein <alexander.stein@ew.tq-group.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Liu Ying <victor.liu@nxp.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Marek Vasut <marex@denx.de> Cc: Martyn Welch <martyn.welch@collabora.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Robby Cai <robby.cai@nxp.com> Cc: Sam Ravnborg <sam@ravnborg.org> Cc: Stefan Agner <stefan@agner.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20220819140852.255187-3-marex@denx.de
2022-08-22drm/lcdif: Consistently use plain timingsMarek Vasut1-4/+4
Drop the crtc_ prefix from mode, consistently use the plain one. Acked-by: Sam Ravnborg <sam@ravnborg.org> Reviewed-by: Liu Ying <victor.liu@nxp.com> Reported-by: Liu Ying <victor.liu@oss.nxp.com> Tested-by: Martyn Welch <martyn.welch@collabora.com> Fixes: 9db35bb349a0e ("drm: lcdif: Add support for i.MX8MP LCDIF variant") Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexander Stein <alexander.stein@ew.tq-group.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Liu Ying <victor.liu@nxp.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Marek Vasut <marex@denx.de> Cc: Martyn Welch <martyn.welch@collabora.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Robby Cai <robby.cai@nxp.com> Cc: Sam Ravnborg <sam@ravnborg.org> Cc: Stefan Agner <stefan@agner.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20220819140852.255187-2-marex@denx.de
2022-08-22drm/lcdif: Clean up headersMarek Vasut3-4/+2
Drop unneeded headers, sort rest alphabetically, no functional change. Acked-by: Sam Ravnborg <sam@ravnborg.org> Reviewed-by: Liu Ying <victor.liu@nxp.com> Reported-by: Liu Ying <victor.liu@oss.nxp.com> Tested-by: Martyn Welch <martyn.welch@collabora.com> Fixes: 9db35bb349a0e ("drm: lcdif: Add support for i.MX8MP LCDIF variant") Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexander Stein <alexander.stein@ew.tq-group.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Liu Ying <victor.liu@nxp.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Marek Vasut <marex@denx.de> Cc: Martyn Welch <martyn.welch@collabora.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Robby Cai <robby.cai@nxp.com> Cc: Sam Ravnborg <sam@ravnborg.org> Cc: Stefan Agner <stefan@agner.ch> Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220819140852.255187-1-marex@denx.de
2022-08-22Merge tag 'gvt-fixes-2022-08-22' of https://github.com/intel/gvt-linux into drm-intel-fixesRodrigo Vivi5-7/+8
gvt-fixes-2022-08-22 - CometLake regression fix in mmio table rework (Alex) - misc kernel doc and typo fixes Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> From: Zhenyu Wang <zhenyuw@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220822031215.GJ1089@zhen-hp.sh.intel.com
2022-08-22net: prestera: cache port state for non-phylink ports tooMaksym Glubokiy1-19/+17
Port event data must stored to port-state cache regardless of whether the port uses phylink or not since this data is used by ethtool. Fixes: 52323ef75414 ("net: marvell: prestera: add phylink support") Signed-off-by: Oleksandr Mazur <oleksandr.mazur@plvision.eu> Signed-off-by: Maksym Glubokiy <maksym.glubokiy@plvision.eu> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-22net: freescale: xgmac: Do not dereference fwnode in struct devicezhaoxiao1-1/+1
In order to make the underneath API easier to change in the future, prevent users from dereferencing fwnode from struct device. Instead, use the specific dev_fwnode() API for that. Signed-off-by: zhaoxiao <zhaoxiao@uniontech.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-22null_blk: Modify the behavior of null_map_queues()Bart Van Assche1-1/+3
Instead of returning -EINVAL if an internal inconsistency is detected, fall back to a single submission queue. This patch prepares for changing the return value of the .map_queues() callbacks into void. Cc: Christoph Hellwig <hch@lst.de> Cc: Keith Busch <kbusch@kernel.org> Signed-off-by: Bart Van Assche <bvanassche@acm.org> Reviewed-by: Chaitanya Kulkarni <kch@nvidia.com> Link: https://lore.kernel.org/r/20220815170043.19489-2-bvanassche@acm.org Signed-off-by: Jens Axboe <axboe@kernel.dk>
2022-08-22block/rnbd-srv: Add event tracing supportSantosh Pradhan4-7/+241
Add event tracing mechanism for following routines: - create_sess() - destroy_sess() - process_rdma() - process_msg_sess_info() - process_msg_open() - process_msg_close() How to use: 1. Load the rnbd_server module 2. cd /sys/kernel/debug/tracing 3. If all the events need to be enabled: echo 1 > events/rnbd_srv/enable 4. OR only speific routine/event needs to be enabled e.g. echo 1 > events/rnbd_srv/create_sess/enable 5. cat trace 5. Run some workload which can trigger create_sess() routine/event Signed-off-by: Santosh Pradhan <santosh.pradhan@ionos.com> Signed-off-by: Jack Wang <jinpu.wang@ionos.com> Signed-off-by: Md Haris Iqbal <haris.iqbal@ionos.com> Link: https://lore.kernel.org/r/20220818105551.110490-2-haris.iqbal@ionos.com Signed-off-by: Jens Axboe <axboe@kernel.dk>
2022-08-22nfc: pn533: Fix use-after-free bugs caused by pn532_cmd_timeoutDuoming Zhou1-0/+1
When the pn532 uart device is detaching, the pn532_uart_remove() is called. But there are no functions in pn532_uart_remove() that could delete the cmd_timeout timer, which will cause use-after-free bugs. The process is shown below: (thread 1) | (thread 2) | pn532_uart_send_frame pn532_uart_remove | mod_timer(&pn532->cmd_timeout,...) ... | (wait a time) kfree(pn532) //FREE | pn532_cmd_timeout | pn532_uart_send_frame | pn532->... //USE This patch adds del_timer_sync() in pn532_uart_remove() in order to prevent the use-after-free bugs. What's more, the pn53x_unregister_nfc() is well synchronized, it sets nfc_dev->shutting_down to true and there are no syscalls could restart the cmd_timeout timer. Fixes: c656aa4c27b1 ("nfc: pn533: add UART phy driver") Signed-off-by: Duoming Zhou <duoming@zju.edu.cn> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-22drm/ttm: Switch to using the new res callbackArunpravin Paneer Selvam2-47/+15
Apply new intersect and compatible callback instead of having a generic placement range verfications. v2: Added a separate callback for compatiblilty checks (Christian) v3: Cleanups and removal of workarounds Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Arunpravin Paneer Selvam <Arunpravin.PaneerSelvam@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220820073304.178444-6-Arunpravin.PaneerSelvam@amd.com
2022-08-22drm/nouveau: Implement intersect/compatible functionsArunpravin Paneer Selvam3-0/+59
Implemented a new intersect and compatible callback function fetching the start offset from struct ttm_resource. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Arunpravin Paneer Selvam <Arunpravin.PaneerSelvam@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220820073304.178444-5-Arunpravin.PaneerSelvam@amd.com
2022-08-22drm/i915: Implement intersect/compatible functionsArunpravin Paneer Selvam2-40/+74
Implemented a new intersect and compatible callback function fetching start offset from drm buddy allocator. v3: move the bits that are specific to buddy_man (Matthew) v4: consider the block size /range (Matthew) Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Arunpravin Paneer Selvam <Arunpravin.PaneerSelvam@amd.com> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Reviewed-by: Christian König <christian.koenig@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220820073304.178444-4-Arunpravin.PaneerSelvam@amd.com
2022-08-22drm/amdgpu: Implement intersect/compatible functionsArunpravin Paneer Selvam2-0/+106
Implemented a new intersect and compatible callback function fetching start offset from backend drm buddy allocator. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Arunpravin Paneer Selvam <Arunpravin.PaneerSelvam@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220820073304.178444-3-Arunpravin.PaneerSelvam@amd.com
2022-08-22drm/ttm: Implement intersect/compatible functionsArunpravin Paneer Selvam1-0/+33
Implemented a new intersect and compatible callback functions to ttm range manager fetching start offset from drm mm range allocator. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Arunpravin Paneer Selvam <Arunpravin.PaneerSelvam@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220820073304.178444-2-Arunpravin.PaneerSelvam@amd.com
2022-08-22drm/ttm: Add new callbacks to ttm res mgrArunpravin Paneer Selvam2-7/+79
We are adding two new callbacks to ttm resource manager function to handle intersection and compatibility of placement and resources. v2: move the amdgpu and ttm_range_manager changes to separate patches (Christian) v3: rename "intersect" to "intersects" (Matthew) v4: move !place check to the !res if and return false in ttm_resource_compatible() function (Christian) v5: move bits of code from patch number 6 to avoid temporary driver breakup (Christian) Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Arunpravin Paneer Selvam <Arunpravin.PaneerSelvam@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220820073304.178444-1-Arunpravin.PaneerSelvam@amd.com
2022-08-22r8152: fix the RX FIFO settings when suspendingHayes Wang1-0/+10
The RX FIFO would be changed when suspending, so the related settings have to be modified, too. Otherwise, the flow control would work abnormally. BugLink: https://bugzilla.kernel.org/show_bug.cgi?id=216333 Reported-by: Mark Blakeney <mark.blakeney@bullet-systems.net> Fixes: cdf0b86b250f ("r8152: fix a WOL issue") Signed-off-by: Hayes Wang <hayeswang@realtek.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-22r8152: fix the units of some registers for RTL8156AHayes Wang1-15/+2
The units of PLA_RX_FIFO_FULL and PLA_RX_FIFO_EMPTY are 16 bytes. Fixes: 195aae321c82 ("r8152: support new chips") Signed-off-by: Hayes Wang <hayeswang@realtek.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-22spi: intel: 64k erase is supported from Canon Lake and beyondMika Westerberg1-0/+1
The hardware sequencer in Intel Canon Lake and beyond supports also 64k erase command. The SPI-NOR core uses SFDP (Serial Flash Discovery Parameter) to figure out what the chip actually supports and only issues 64k erase if it is supported. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Link: https://lore.kernel.org/r/20220816125537.89389-1-mika.westerberg@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-08-22spi: intel: Add support for second flash chipMika Westerberg1-16/+147
Intel SPI flash controller has been supporting two chip selects long time already even if the most common configuration is to have a single flash chip for the BIOS and related data. This adds support for the second chip select if we find out that there are two flash components (this information is available in the mandatory flash descriptor on the first chip). The second chip is exposed as is without any partition information. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Link: https://lore.kernel.org/r/20220816130818.89600-1-mika.westerberg@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-08-22regulator: core: Remove "ramp_delay not set" debug messageChristian Kohlschütter1-3/+1
This message shows up occasionally but in bursts (seen up to 30 times per second on my ODROID N2+). According to Matthias Kaehlcke's comment in 'regulator: core: silence warning: "VDD1: ramp_delay not set"', this message should have been removed after restructuring previous code that assumed that ramp_delay being zero in that function was an error. Link: https://lore.kernel.org/lkml/625675256c0d75805f088b4be17a3308dc1b7ea4.1477571498.git.hns@goldelico.com/T/ Signed-off-by: Christian Kohlschütter <christian@kohlschutter.com> Link: https://lore.kernel.org/r/20220820131420.16608-1-christian@kohlschutter.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-08-22spi: cadence-quadspi: Disable irqs during indirect readsNiravkumar L Rabara1-4/+34
On architecture where reading the SRAM is slower than the pace at controller fills it, with interrupt enabled while reading from SRAM FIFO causes unwanted interrupt storm to CPU. The inner "bytes to read" loop never exits and waits for the completion so it is enough to only enable the watermark interrupt when we are out of bytes to read, which only happens when we start the transfer (waiting for the FIFO to fill up initially) if the SRAM is slow. So only using read watermark interrupt, as the current implementation doesn't utilize the SRAM full and indirect complete read interrupt. And disable all the read interrupts while reading from SRAM. Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com> Link: https://lore.kernel.org/r/20220813042616.1372110-1-niravkumar.l.rabara@intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-08-22regulator: core: Clean up on enable failureAndrew Halaney1-2/+7
If regulator_enable() fails, enable_count is incremented still. A consumer, assuming no matching regulator_disable() is necessary on failure, will then get this error message upon regulator_put() since enable_count is non-zero: [ 1.277418] WARNING: CPU: 3 PID: 1 at drivers/regulator/core.c:2304 _regulator_put.part.0+0x168/0x170 The consumer could try to fix this in their driver by cleaning up on error from regulator_enable() (i.e. call regulator_disable()), but that results in the following since regulator_enable() failed and didn't increment user_count: [ 1.258112] unbalanced disables for vreg_l17c [ 1.262606] WARNING: CPU: 4 PID: 1 at drivers/regulator/core.c:2899 _regulator_disable+0xd4/0x190 Fix this by decrementing enable_count upon failure to enable. With this in place, just the reason for failure to enable is printed as expected and developers can focus on the root cause of their issue instead of thinking their usage of the regulator consumer api is incorrect. For example, in my case: [ 1.240426] vreg_l17c: invalid input voltage found Fixes: 5451781dadf8 ("regulator: core: Only count load for enabled consumers") Signed-off-by: Andrew Halaney <ahalaney@redhat.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Brian Masney <bmasney@redhat.com> Link: https://lore.kernel.org/r/20220819194336.382740-1-ahalaney@redhat.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-08-22net: lan966x: Extend MAC to support also lag interfaces.Horatiu Vultur3-16/+119
Extend MAC support to support also lag interfaces: 1. In case an entry is learned on a port that is part of lag interface, then notify the upper layers that the entry is learned on the bond interface 2. If a port leaves the bond and the port is the first port in the lag group, then it is required to update all MAC entries to change the destination port. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-22net: lan966x: Extend FDB to support also lagHoratiu Vultur2-0/+31
Offload FDB entries when the original device is a lag interface. Because all the ports under the lag have the same chip id, which is the chip id of first port, then add the entries only for the first port. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-22net: lan966x: Add lag support for lan966xHoratiu Vultur5-20/+443
Add link aggregation hardware offload support for lan966x Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-22net: lan966x: Extend lan966x_foreign_bridging_checkHoratiu Vultur1-8/+24
Extend lan966x_foreign_bridging_check to check also if the upper interface is a lag device. Don't allow a lan966x port to be part of a lag if it has foreign interfaces. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-22net: lan966x: Expose lan966x_switchdev_nb and lan966x_switchdev_blocking_nbHoratiu Vultur2-4/+4
Expose lan966x_switchdev_nb and lan966x_switchdev_blocking_nb to the lan966x_main.h file because they will be needed by the lag driver. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-22net: lan966x: Flush fdb workqueue when port is leaving a bridge.Horatiu Vultur3-7/+10
Whenever a port leaves a bridge, flush the workqueue of the FDB work. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-22net: lan966x: Split lan966x_fdb_event_workHoratiu Vultur1-52/+66
Split the function lan966x_fdb_event_work. One case for when the orig_dev is a bridge and one case when orig_dev is lan966x port. This is preparation for lag support. There is no functional change. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-22net: lan966x: Add registers used to configure lag interfacesHoratiu Vultur1-0/+45
Add the registers used by lan966x to configure the lag interface. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-22tsnep: Record RX queueGerhard Engleder2-1/+5
Other drivers record RX queue so it should make sense to do that also. Signed-off-by: Gerhard Engleder <gerhard@engleder-embedded.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-22tsnep: Support full DMA maskGerhard Engleder1-0/+7
DMA addresses up to 64bit are supported by the device. Configure DMA mask according to the capabilities of the device. Signed-off-by: Gerhard Engleder <gerhard@engleder-embedded.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-22tsnep: Improve TX length handlingGerhard Engleder1-11/+21
TX length can by calculated more efficient during map and unmap of fragments. Another reason is that, by moving TX statistic counting to tsnep_tx_poll() it can be used there for XDP too. Signed-off-by: Gerhard Engleder <gerhard@engleder-embedded.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-22tsnep: Add loopback supportGerhard Engleder1-17/+54
Add support for NETIF_F_LOOPBACK feature. Loopback mode is used for testing. Signed-off-by: Gerhard Engleder <gerhard@engleder-embedded.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-22tsnep: Fix TSNEP_INFO_TX_TIME register defineGerhard Engleder1-2/+1
Fixed register define is not used, but register definition shall be kept in sync. Fixes: 403f69bbdbad ("tsnep: Add TSN endpoint Ethernet MAC driver") Signed-off-by: Gerhard Engleder <gerhard@engleder-embedded.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-22net: lan966x: Add QUSGMII support for lan966xMaxime Chevallier4-7/+26
The Lan996x controller supports the QUSGMII mode, which is very similar to QSGMII in the way it's configured and the autonegociation capababilities it provides. This commit adds support for that mode, treating it most of the time like QSGMII, making sure that we do configure the PCS how we should. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-22net: phy: Add helper to derive the number of ports from a phy modeMaxime Chevallier1-0/+52
Some phy modes such as QSGMII multiplex several MAC<->PHY links on one single physical interface. QSGMII used to be the only one supported, but other modes such as QUSGMII also carry multiple links. This helper allows getting the number of links that are multiplexed on a given interface. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-22net: phy: Introduce QUSGMII PHY modeMaxime Chevallier1-0/+3
The QUSGMII mode is a derivative of Cisco's USXGMII standard. This standard is pretty similar to SGMII, but allows for faster speeds, and has the build-in bits for Quad and Octa variants (like QSGMII). The main difference with SGMII/QSGMII is that USXGMII/QUSGMII re-uses the preamble to carry various information, named 'Extensions'. As of today, the USXGMII standard only mentions the "PCH" extension, which is used to convey timestamps, allowing in-band signaling of PTP timestamps without having to modify the frame itself. This commit adds support for that mode. When no extension is in use, it behaves exactly like QSGMII, although it's not compatible with QSGMII. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-22net: ethernet: ti: davinci_mdio: Add workaround for errata i2329Ravi Gunasekaran1-11/+231
On the CPSW and ICSS peripherals, there is a possibility that the MDIO interface returns corrupt data on MDIO reads or writes incorrect data on MDIO writes. There is also a possibility for the MDIO interface to become unavailable until the next peripheral reset. The workaround is to configure the MDIO in manual mode and disable the MDIO state machine and emulate the MDIO protocol by reading and writing appropriate fields in MDIO_MANUAL_IF_REG register of the MDIO controller to manipulate the MDIO clock and data pins. More details about the errata i2329 and the workaround is available in: https://www.ti.com/lit/er/sprz487a/sprz487a.pdf Add implementation to disable MDIO state machine, configure MDIO in manual mode and achieve MDIO read and writes via MDIO Bitbanging Signed-off-by: Ravi Gunasekaran <r-gunasekaran@ti.com> Reported-by: kernel test robot <lkp@intel.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-22net: phy: realtek: add support for RTL8211F(D)(I)-VD-CGClark Wang1-12/+32
RTL8211F(D)(I)-VD-CG is the pin-to-pin upgrade chip from RTL8211F(D)(I)-CG. Add new PHY ID for this chip. It does not support RTL8211F_PHYCR2 anymore, so remove the w/r operation of this register. Signed-off-by: Clark Wang <xiaoning.wang@nxp.com> Signed-off-by: Wei Fang <wei.fang@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-22mmc: core: Fix inconsistent sd3_bus_mode at UHS-I SD voltage switch failureAdrian Hunter1-26/+16
If re-initialization results is a different signal voltage, because the voltage switch failed previously, but not this time (or vice versa), then sd3_bus_mode will be inconsistent with the card because the SD_SWITCH command is done only upon first initialization. Fix by always reading SD_SWITCH information during re-initialization, which also means it does not need to be re-read later for the 1.8V fixup workaround. Note, brief testing showed SD_SWITCH took about 1.8ms to 2ms which added about 1% to 1.5% to the re-initialization time, so it's not particularly significant. Reported-by: Seunghui Lee <sh043.lee@samsung.com> Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Reviewed-by: Seunghui Lee <sh043.lee@samsung.com> Tested-by: Seunghui Lee <sh043.lee@samsung.com> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20220815073321.63382-3-adrian.hunter@intel.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2022-08-22mmc: core: Fix UHS-I SD 1.8V workaround branchAdrian Hunter1-3/+3
When introduced, upon success, the 1.8V fixup workaround in mmc_sd_init_card() would branch to practically the end of the function, to a label named "done". Unfortunately, perhaps due to the label name, over time new code has been added that really should have come after "done" not before it. Let's fix the problem by moving the label to the correct place and rename it "cont". Fixes: 045d705dc1fb ("mmc: core: Enable the MMC host software queue for the SD card") Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Reviewed-by: Seunghui Lee <sh043.lee@samsung.com> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20220815073321.63382-2-adrian.hunter@intel.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2022-08-22drm/i915/dsc/mtl: Enable alternate ICH methodVandita Kulkarni2-0/+3
DSC 1.2 is supported from MTL, hence program ICH accordingly. Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com> Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220817124516.284456-2-jani.nikula@intel.com
2022-08-22drm/i915/dsc/mtl: Update the DSC minor versionVandita Kulkarni1-4/+14
From MTL onwards we support DSC 1.2, since there is hardcoding to minor version 1, update it. Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com> Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220817124516.284456-1-jani.nikula@intel.com
2022-08-22thunderbolt: Add support for Intel Meteor LakeMika Westerberg3-0/+12
Intel Meteor Lake has the same integrated Thunderbolt/USB4 controller as Intel Alder Lake. Add the Intel Meteor Lake PCI IDs to the driver list of supported devices. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2022-08-22thunderbolt: Add comment where Thunderbolt 4 PCI IDs startMika Westerberg1-0/+1
This makes it consistent with the previous generations. No functional impact. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2022-08-22drm/i915/display: avoid warnings when registering dual panel backlightArun R Murthy1-14/+12
Commit 20f85ef89d94 ("drm/i915/backlight: use unique backlight device names") added support for multiple backlight devices on dual panel systems, but did so with error handling on -EEXIST from backlight_device_register(). Unfortunately, that triggered a warning in dmesg all the way down from sysfs_add_file_mode_ns() and sysfs_warn_dup(). Instead of optimistically always attempting to register with the default name ("intel_backlight", which we have to retain for backward compatibility), check if a backlight device with the name exists first, and, if so, use the card and connector based name. v2: reworked on top of the patch commit 20f85ef89d94 ("drm/i915/backlight: use unique backlight device names") v3: fixed the ref count leak(Jani N) Fixes: 20f85ef89d94 ("drm/i915/backlight: use unique backlight device names") Signed-off-by: Arun R Murthy <arun.r.murthy@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220808035750.3111046-1-arun.r.murthy@intel.com
2022-08-22parisc: ccio-dma: Handle kmalloc failure in ccio_init_resources()Li Qiong1-3/+8
As the possible failure of the kmalloc(), it should be better to fix this error path, check and return '-ENOMEM' error code. Signed-off-by: Li Qiong <liqiong@nfschina.com> Signed-off-by: Helge Deller <deller@gmx.de>
2022-08-22parisc: led: Move from strlcpy with unused retval to strscpyWolfram Sang1-1/+1
Follow the advice of the below link and prefer 'strscpy' in this subsystem. Conversion is 1:1 because the return value is not used. Generated by a coccinelle script. Link: https://lore.kernel.org/r/CAHk-=wgfRnXz0W3D37d01q3JFkr_i_uTL=V6A6G1oUZcprmknw@mail.gmail.com/ Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Helge Deller <deller@gmx.de>
2022-08-22parisc: ccio-dma: Fix typo in commentJason Wang1-1/+1
The double `was' is duplicated in the comment, remove one. Signed-off-by: Jason Wang <wangborong@cdjrlc.com> Signed-off-by: Helge Deller <deller@gmx.de>
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