aboutsummaryrefslogtreecommitdiffstats
path: root/drivers
AgeCommit message (Collapse)AuthorFilesLines
2021-03-18ionic: update ethtool support bits for BASETShannon Nelson2-0/+10
Add support in get_link_ksettings for a couple of new BASET connections. Signed-off-by: Shannon Nelson <snelson@pensando.io> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-18ionic: fix unchecked referenceShannon Nelson1-1/+1
We can get to the counter without going through the pointer that the robot complained about. Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Shannon Nelson <snelson@pensando.io> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-18ionic: simplify the intr_index use in txq_initShannon Nelson1-4/+2
The qcq->intr.index was set when the queue was allocated, there is no need to reach around to find it. Signed-off-by: Shannon Nelson <snelson@pensando.io> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-18ionic: code cleanup detailsShannon Nelson3-32/+25
Catch a couple of missing macro name uses, fix a couple of misspellings, etc. Signed-off-by: Shannon Nelson <snelson@pensando.io> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-18net: ocelot: support multiple bridgesVladimir Oltean1-36/+36
The ocelot switches are a bit odd in that they do not have an STP state to put the ports into. Instead, the forwarding configuration is delayed from the typical port_bridge_join into stp_state_set, when the port enters the BR_STATE_FORWARDING state. I can only guess that the implementation of this quirk is the reason that led to the simplification of the driver such that only one bridge could be offloaded at a time. We can simplify the data structures somewhat, and introduce a per-port bridge device pointer and STP state, similar to how the LAG offload works now (there we have a per-port bonding device pointer and TX enabled state). This allows offloading multiple bridges with relative ease, while still keeping in place the quirk to delay the programming of the PGIDs. We actually need this change now because we need to remove the bogus restriction from ocelot_bridge_stp_state_set that ocelot->bridge_mask needs to contain BIT(port), otherwise that function is a no-op. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-18net: ocelot: Fix deletetion of MRP entries from MAC tableHoratiu Vultur1-2/+2
When a MRP ring was deleted or disabled, the driver was iterating over the ports to detect if any other MPR rings exists and in case it didn't exist it would delete the MAC table entry. But the problem was that it used the last iterated port to delete the MAC table entry and this could be a NULL port. The fix consists of using the port on which the function was called. Fixes: 7c588c3e96e9733a ("net: ocelot: Extend MRP") Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-18net: lapbether: Close the LAPB device before its underlying Ethernet device closesXie He1-2/+2
When a virtual LAPB device's underlying Ethernet device closes, the LAPB device is also closed. However, currently the LAPB device is closed after the Ethernet device closes. It would be better to close it before the Ethernet device closes. This would allow the LAPB device to transmit a last frame to notify the other side that it is disconnecting. Signed-off-by: Xie He <xie.he.0141@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-18octeontx2-af: Remove redundant initialization of pointer pfvfColin Ian King1-1/+1
The pointer pfvf is being initialized with a value that is never read and it is being updated later with a new value. The initialization is redundant and can be removed. Addresses-Coverity: ("Unused value") Fixes: 56bcef528bd8 ("octeontx2-af: Use npc_install_flow API for promisc and broadcast entries") Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-18net: cdc_ncm: drop redundant driver-data assignmentJohan Hovold1-1/+0
The driver data for the data interface has already been set by usb_driver_claim_interface() so drop the subsequent redundant assignment. Note that this also avoids setting the driver data three times in case of a combined interface. Signed-off-by: Johan Hovold <johan@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-18nfc/fdp: Simplify the return expression of fdp_nci_open()zuoqilin1-4/+1
Simplify the return expression. Signed-off-by: zuoqilin <zuoqilin@yulong.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-18of: of_net: Provide function name and param descriptionLee Jones1-0/+3
Fixes the following W=1 kernel build warning(s): drivers/of/of_net.c:104: warning: Function parameter or member 'np' not described in 'of_get_mac_address' drivers/of/of_net.c:104: warning: expecting prototype for mac(). Prototype was for of_get_mac_address() instead Cc: Andrew Lunn <andrew@lunn.ch> Cc: Heiner Kallweit <hkallweit1@gmail.com> Cc: Russell King <linux@armlinux.org.uk> Cc: Rob Herring <robh+dt@kernel.org> Cc: Frank Rowand <frowand.list@gmail.com> Cc: netdev@vger.kernel.org Cc: devicetree@vger.kernel.org Signed-off-by: Lee Jones <lee.jones@linaro.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-18stmmac: intel: Add PSE and PCH PTP clock source selectionWong, Vee Khee3-0/+56
Intel mGbE variant implemented in EHL and TGL can be set to select different clock frequency based on GPO bits in MAC_GPIO_STATUS register. We introduce a new "void (*ptp_clk_freq_config)(void *priv)" in platform data so that if a platform is required to configure the frequency of clock source, in this case Intel mGBE does, the platform-specific configuration of the PTP clock setting is done when stmmac_ptp_register() is called. Signed-off-by: Wong, Vee Khee <vee.khee.wong@intel.com> Signed-off-by: Voon Weifeng <weifeng.voon@intel.com> Co-developed-by: Ong Boon Leong <boon.leong.ong@intel.com> Signed-off-by: Ong Boon Leong <boon.leong.ong@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-18Merge tag 'drm-fixes-2021-03-19' of git://anongit.freedesktop.org/drm/drmLinus Torvalds8-53/+79
Pull drm fixes from Dave Airlie: "Regular fixes pull, pretty small set of fixes, a couple of i915 and amdgpu, one ttm, one nouveau and one omap. Probably smaller than usual for this time, so we'll see if something pops up next week or if this will continue to stay small. Summary: ttm: - Make ttm_bo_unpin() not wraparound on too many unpins omap: - Fix coccicheck warning in omap amdgpu: - DCN 3.0 gamma fixes - DCN 2.1 corrupt screen fix i915: - Workaround async flip + VT-d frame corruption on HSW/BDW - Fix NMI watchdog crash due to uninitialized OA buffer use on gen12+ nouveau: - workaround oops with bo syncing" * tag 'drm-fixes-2021-03-19' of git://anongit.freedesktop.org/drm/drm: nouveau: Skip unvailable ttm page entries drm/amd/display: Remove MPC gamut remap logic for DCN30 drm/amd/display: Correct algorithm for reversed gamma drm/omap: dsi: fix unsigned expression compared with zero i915/perf: Start hrtimer only if sampling the OA buffer drm/i915: Workaround async flip + VT-d corruption on HSW/BDW drm/amd/display: Copy over soc values before bounding box creation drm/ttm: make ttm_bo_unpin more defensive
2021-03-19nouveau: Skip unvailable ttm page entriesTobias Klausmann1-0/+8
Starting with commit f295c8cfec833c2707ff1512da10d65386dde7af ("drm/nouveau: fix dma syncing warning with debugging on.") the following oops occures: BUG: kernel NULL pointer dereference, address: 0000000000000000 #PF: supervisor read access in kernel mode #PF: error_code(0x0000) - not-present page PGD 0 P4D 0 Oops: 0000 [#1] PREEMPT SMP PTI CPU: 6 PID: 1013 Comm: Xorg.bin Tainted: G E 5.11.0-desktop-rc0+ #2 Hardware name: Acer Aspire VN7-593G/Pluto_KLS, BIOS V1.11 08/01/2018 RIP: 0010:nouveau_bo_sync_for_device+0x40/0xb0 [nouveau] Call Trace: nouveau_bo_validate+0x5d/0x80 [nouveau] nouveau_gem_ioctl_pushbuf+0x662/0x1120 [nouveau] ? nouveau_gem_ioctl_new+0xf0/0xf0 [nouveau] drm_ioctl_kernel+0xa6/0xf0 [drm] drm_ioctl+0x1f4/0x3a0 [drm] ? nouveau_gem_ioctl_new+0xf0/0xf0 [nouveau] nouveau_drm_ioctl+0x50/0xa0 [nouveau] __x64_sys_ioctl+0x7e/0xb0 do_syscall_64+0x33/0x80 entry_SYSCALL_64_after_hwframe+0x44/0xae ---[ end trace ccfb1e7f4064374f ]--- RIP: 0010:nouveau_bo_sync_for_device+0x40/0xb0 [nouveau] The underlying problem is not introduced by the commit, yet it uncovered the underlying issue. The cited commit relies on valid pages. This is not given for due to some bugs. For now, just warn and work around the issue by just ignoring the bad ttm objects. Below is some debug info gathered while debugging this issue: nouveau 0000:01:00.0: DRM: ttm_dma->num_pages: 2048 nouveau 0000:01:00.0: DRM: ttm_dma->pages is NULL nouveau 0000:01:00.0: DRM: ttm_dma: 00000000e96058e7 nouveau 0000:01:00.0: DRM: ttm_dma->page_flags: nouveau 0000:01:00.0: DRM: ttm_dma: Populated: 1 nouveau 0000:01:00.0: DRM: ttm_dma: No Retry: 0 nouveau 0000:01:00.0: DRM: ttm_dma: SG: 256 nouveau 0000:01:00.0: DRM: ttm_dma: Zero Alloc: 0 nouveau 0000:01:00.0: DRM: ttm_dma: Swapped: 0 Signed-off-by: Tobias Klausmann <tobias.klausmann@freenet.de> Signed-off-by: Dave Airlie <airlied@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210313222159.3346-1-tobias.klausmann@freenet.de
2021-03-19Merge tag 'drm-intel-fixes-2021-03-18' of git://anongit.freedesktop.org/drm/drm-intel into drm-fixesDave Airlie3-10/+42
drm/i915 fixes for v5.12-rc4: - Workaround async flip + VT-d frame corruption on HSW/BDW - Fix NMI watchdog crash due to uninitialized OA buffer use on gen12+ Signed-off-by: Dave Airlie <airlied@redhat.com> From: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/87blbg8y5t.fsf@intel.com
2021-03-19Merge tag 'amd-drm-fixes-5.12-2021-03-18' of https://gitlab.freedesktop.org/agd5f/linux into drm-fixesDave Airlie3-40/+25
amdgpu: - DCN 3.0 gamma fixes - DCN 2.1 corrupt screen fix Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210318042858.3810-1-alexander.deucher@amd.com
2021-03-19Merge tag 'drm-misc-fixes-2021-03-18' of git://anongit.freedesktop.org/drm/drm-misc into drm-fixesDave Airlie1-3/+4
drm-misc-fixes for v5.12-rc4: - Make ttm_bo_unpin() not wraparound on too many unpins. - Fix coccicheck warning in omap. Signed-off-by: Dave Airlie <airlied@redhat.com> From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/a0e13bbb-6ba6-ff24-4db8-0e02e605de18@linux.intel.com
2021-03-18net: dsa: mv88e6xxx: Offload bridge broadcast flooding flagTobias Waldekranz1-1/+70
These switches have two modes of classifying broadcast: 1. Broadcast is multicast. 2. Broadcast is its own unique thing that is always flooded everywhere. This driver uses the first option, making sure to load the broadcast address into all active databases. Because of this, we can support per-port broadcast flooding by (1) making sure to only set the subset of ports that have it enabled whenever joining a new bridge or VLAN, and (2) by updating all active databases whenever the setting is changed on a port. Signed-off-by: Tobias Waldekranz <tobias@waldekranz.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-18net: dsa: mv88e6xxx: Offload bridge learning flagTobias Waldekranz3-8/+52
Allow a user to control automatic learning per port. Many chips have an explicit "LearningDisable"-bit that can be used for this, but we opt for setting/clearing the PAV instead, as it works on all devices at least as far back as 6083. Signed-off-by: Tobias Waldekranz <tobias@waldekranz.com> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-18net: dsa: mv88e6xxx: Flood all traffic classes on standalone portsTobias Waldekranz1-6/+2
In accordance with the comment in dsa_port_bridge_leave, standalone ports shall be configured to flood all types of traffic. This change aligns the mv88e6xxx driver with that policy. Previously a standalone port would initially not egress any unknown traffic, but after joining and then leaving a bridge, it would. This does not matter that much since we only ever send FROM_CPUs on standalone ports, but it seems prudent to make sure that the initial values match those that are applied after a bridging/unbridging cycle. Signed-off-by: Tobias Waldekranz <tobias@waldekranz.com> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-18net: dsa: mv88e6xxx: Use standard helper for broadcast addressTobias Waldekranz1-1/+3
Use the conventional declaration style of a MAC address in the kernel (u8 addr[ETH_ALEN]) for the broadcast address, then set it using the existing helper. Signed-off-by: Tobias Waldekranz <tobias@waldekranz.com> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-18net: dsa: mv88e6xxx: Remove some bureaucracy around querying the VTUTobias Waldekranz1-25/+20
The hardware has a somewhat quirky protocol for reading out the VTU entry for a particular VID. But there is no reason why we cannot create a better API for ourselves in the driver. Signed-off-by: Tobias Waldekranz <tobias@waldekranz.com> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-18net: dsa: mv88e6xxx: Provide generic VTU iteratorTobias Waldekranz1-36/+64
Move the intricacies of correctly iterating over the VTU to a common implementation. Signed-off-by: Tobias Waldekranz <tobias@waldekranz.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-18net: dsa: mv88e6xxx: Avoid useless attempts to fast-age LAGsTobias Waldekranz1-0/+7
When a port is a part of a LAG, the ATU will create dynamic entries belonging to the LAG ID when learning is enabled. So trying to fast-age those out using the constituent port will have no effect. Unfortunately the hardware does not support move operations on LAGs so there is no obvious way to transform the request to target the LAG instead. Instead we document this known limitation and at least avoid wasting any time on it. Signed-off-by: Tobias Waldekranz <tobias@waldekranz.com> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-18net: ipa: relax 64-bit build requirementAlex Elder2-3/+9
We currently assume the IPA driver is built only for a 64 bit kernel. When this constraint was put in place it eliminated some do_div() calls, replacing them with the "/" and "%" operators. We now only use these operations on u32 and size_t objects. In a 32-bit kernel build, size_t will be 32 bits wide, so there remains no reason to use do_div() for divide and modulo. A few recent commits also fix some code that assumes that DMA addresses are 64 bits wide. With that, we can get rid of the 64-bit build requirement. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-18net: ipa: fix table alignment requirementAlex Elder1-8/+12
We currently have a build-time check to ensure that the minimum DMA allocation alignment satisfies the constraint that IPA filter and route tables must point to rules that are 128-byte aligned. But what's really important is that the actual allocated DMA memory has that alignment, even if the minimum is smaller than that. Remove the BUILD_BUG_ON() call checking against minimim DMA alignment and instead verify at rutime that the allocated memory is properly aligned. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-18net: ipa: use upper_32_bits()Alex Elder1-8/+6
Use upper_32_bits() to extract the high-order 32 bits of a DMA address. This avoids doing a 32-position shift on a DMA address if it happens not to be 64 bits wide. Use lower_32_bits() to extract the low-order 32 bits (because that's what it's for). Suggested-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Alex Elder <elder@linaro.org> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-18net: ipa: fix assumptions about DMA address sizeAlex Elder1-6/+8
Some build time checks in ipa_table_validate_build() assume that a DMA address is 64 bits wide. That is more restrictive than it has to be. A route or filter table is 64 bits wide no matter what the size of a DMA address is on the AP. The code actually uses a pointer to __le64 to access table entries, and a fixed constant IPA_TABLE_ENTRY_SIZE to describe the size of those entries. Loosen up two checks so they still verify some requirements, but such that they do not assume the size of a DMA address is 64 bits. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-18s390/qeth: remove RX VLAN filter stubs in L3 driverJulian Wiedmann1-24/+1
The callbacks have been slimmed down to a level where they no longer do any actual work. So stop pretending that we support the NETIF_F_HW_VLAN_CTAG_FILTER feature. Signed-off-by: Julian Wiedmann <jwi@linux.ibm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-18s390/qeth: enable napi_consume_skb() for pending TX buffersJulian Wiedmann1-4/+4
Pending TX buffers are completed from the same NAPI code as normal TX buffers. Pass the NAPI budget to qeth_tx_complete_buf() so that the freeing of the completed skbs can be deferred. Signed-off-by: Julian Wiedmann <jwi@linux.ibm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-18s390/qeth: allocate initial TX Buffer structs with GFP_KERNELJulian Wiedmann1-4/+6
qeth_init_qdio_out_buf() is typically called during initialization, and the GFP_ATOMIC is only needed for a very specific & rare case during TX completion. Allow callers to specify a gfp mask, so that the initialization path can select GFP_KERNEL. While at it also clarify the function name. Signed-off-by: Julian Wiedmann <jwi@linux.ibm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-18Merge tag 'omap-for-v5.12/fixes-rc1-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixesArnd Bergmann3-5/+11
Fixes for omaps for v5.12-rc cycle Regression fixes for multiple issues found mostly caused by recent changes to drop legacy platform data and and starting to use the new prm driver reset controller: - Fix ocp interconnect bus access error reporting for omap_l3_noc by setting IRQF_NO_THREAD - Fix changed mmc slot order regression by adding mmc aliases for am335x - Fix dra7 reboot regression caused by invalid pcie reset map - Fix smartreflex init regression caused by dropped legacy data - Fix ti-sysc driver warning on unbind if reset is not deasserted - Fix flakey reset deassert for dra7 iva * tag 'omap-for-v5.12/fixes-rc1-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: soc: ti: omap-prm: Fix occasional abort on reset deassert for dra7 iva bus: ti-sysc: Fix warning on unbind if reset is not deasserted ARM: OMAP2+: Fix smartreflex init regression after dropping legacy data soc: ti: omap-prm: Fix reboot issue with invalid pcie reset map for dra7 ARM: dts: am33xx: add aliases for mmc interfaces bus: omap_l3_noc: mark l3 irqs as IRQF_NO_THREAD Link: https://lore.kernel.org/r/pull-1614868603-800959@atomide.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-03-18net: move the xps maps to an arrayAntoine Tenart1-1/+1
Move the xps maps (xps_cpus_map and xps_rxqs_map) to an array in net_device. That will simplify a lot the code removing the need for lots of if/else conditionals as the correct map will be available using its offset in the array. This should not modify the xps maps behaviour in any way. Suggested-by: Alexander Duyck <alexander.duyck@gmail.com> Signed-off-by: Antoine Tenart <atenart@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-18interconnect: Fix kerneldoc warningGeorgi Djakov1-1/+1
Fix the following warning: drivers/interconnect/bulk.c:63: warning: expecting prototype for icc_bulk_set(). Prototype was for icc_bulk_set_bw() instead Link: https://lore.kernel.org/r/20210318163415.30941-1-georgi.djakov@linaro.org Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2021-03-18net: dsa: bcm_sf2: fix BCM4908 RGMII reg(s)Rafał Miłecki2-4/+8
BCM4908 has only 1 RGMII reg for controlling port 7. Fixes: 73b7a6047971 ("net: dsa: bcm_sf2: support BCM4908's integrated switch") Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-18net: dsa: bcm_sf2: add function finding RGMII registerRafał Miłecki2-9/+42
Simple macro like REG_RGMII_CNTRL_P() is insufficient as: 1. It doesn't validate port argument 2. It doesn't support chipsets with non-lineral RGMII regs layout Missing port validation could result in getting register offset from out of array. Random memory -> random offset -> random reads/writes. It affected e.g. BCM4908 for REG_RGMII_CNTRL_P(7). Fixes: a78e86ed586d ("net: dsa: bcm_sf2: Prepare for different register layouts") Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-18net: dsa: b53: mmap: Add device tree supportÁlvaro Fernández Rojas1-0/+55
Add device tree support to b53_mmap.c while keeping platform devices support. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-18net: stmmac: Add EST errors into ethtool statisticOng Boon Leong6-4/+28
Below EST errors are added into ethtool statistic: 1) Constant Gate Control Error (CGCE): The counter "mtl_est_cgce" increases everytime CGCE interrupt is triggered. 2) Head-of-Line Blocking due to Scheduling (HLBS): The counter "mtl_est_hlbs" increases everytime HLBS interrupt is triggered. 3) Head-of-Line Blocking due to Frame Size (HLBF): The counter "mtl_est_hlbf" increases everytime HLBF interrupt is triggered. 4) Base Time Register error (BTRE): The counter "mtl_est_btre" increases everytime BTRE interrupt is triggered but BTRL not reaches maximum value of 15. 5) Base Time Register Error Loop Count (BTRL) reaches maximum value: The counter "mtl_est_btrlm" increases everytime BTRE interrupt is triggered and BTRL value reaches maximum value of 15. Please refer to MTL_EST_STATUS register in DesignWare Cores Ethernet Quality-of-Service Databook for more detail explanation. Signed-off-by: Ong Boon Leong <boon.leong.ong@intel.com> Signed-off-by: Voon Weifeng <weifeng.voon@intel.com> Co-developed-by: Mohammad Athari Bin Ismail <mohammad.athari.ismail@intel.com> Signed-off-by: Mohammad Athari Bin Ismail <mohammad.athari.ismail@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-18net: stmmac: EST interrupts handling and error reportingVoon Weifeng4-0/+114
Enabled EST related interrupts as below: 1) Constant Gate Control Error (CGCE) 2) Head-of-Line Blocking due to Scheduling (HLBS) 3) Head-of-Line Blocking due to Frame Size (HLBF). 4) Base Time Register error (BTRE) 5) Switch to S/W owned list Complete (SWLC) For HLBS, the user will get the info of all the queues that shows this error. For HLBF, the user will get the info of all the queue with the latest frame size which causes the error. Frame size 0 indicates no error. The ISR handling takes place when EST feature is enabled by user. Signed-off-by: Voon Weifeng <weifeng.voon@intel.com> Signed-off-by: Ong Boon Leong <boon.leong.ong@intel.com> Co-developed-by: Mohammad Athari Bin Ismail <mohammad.athari.ismail@intel.com> Signed-off-by: Mohammad Athari Bin Ismail <mohammad.athari.ismail@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-18net: marvell: Remove reference to CONFIG_MV64X60Christophe Leroy2-3/+3
Commit 92c8c16f3457 ("powerpc/embedded6xx: Remove C2K board support") removed last selector of CONFIG_MV64X60. As it is not a user selectable config item, all references to it are stale. Remove them. Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-18net: stmmac: add RX frame steering based on VLAN priority in tc flowerOng Boon Leong1-2/+63
We extend tc flower to support configuration of VLAN priority-based RX frame steering hardware offloading. To map VLAN <PCP> to Traffic Class <TC>: $ tc filter add dev <IFNAME> parent ffff: protocol 802.1Q flower \ vlan_prio <PCP> hw_tc <TC> Note: <TC> < N whereby "tc qdisc ... num_tc N ..." To delete all tc flower configurations: $ tc qdisc delete dev <IFNAME> ingress Signed-off-by: Ong Boon Leong <boon.leong.ong@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-18net: stmmac: restructure tc implementation for RX VLAN Priority steeringOng Boon Leong1-2/+22
The current tc_add_flow() and tc_del_flow() use hardware L3 & L4 filters as offloading. The number of L3/L4 filters is read from L3L4FNUM field from MAC_HW_Feature1 register and is used to alloc priv->tc_entries[]. For RX frame steering based on VLAN priority offloading, we use MAC_RXQ_CTRL2 & MAC_RXQ_CTRL3 registers and all VLAN priority level can be configured independent from L3 & L4 filters. Signed-off-by: Ong Boon Leong <boon.leong.ong@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-18octeontx2-af: Fix uninitialized variable warningSubbaraya Sundeep1-1/+1
Initialize l4_key_offset variable to fix uninitialized variable compiler warning. Fixes: b9b7421a01d8 ("octeontx2-af: Support ESP/AH RSS hashing") Signed-off-by: Subbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: Hariprasad Kelam <hkelam@marvell.com> Signed-off-by: Sunil Kovvuri Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-18octeontx2-af: fix infinite loop in unmapping NPC counterHariprasad Kelam1-1/+1
unmapping npc counter works in a way by traversing all mcam entries to find which mcam rule is associated with counter. But loop cursor variable 'entry' is not incremented before checking next mcam entry which resulting in infinite loop. This in turn hogs the kworker thread forever and no other mbox message is processed by AF driver after that. Fix this by updating entry value before checking next mcam entry. Fixes: a958dd59f9ce ("octeontx2-af: Map or unmap NPC MCAM entry and counter") Signed-off-by: Hariprasad Kelam <hkelam@marvell.com> Signed-off-by: Sunil Kovvuri Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-18octeontx2-pf: Clear RSS enable flag on interace downGeetha sowjanya1-0/+5
RSS configuration can not be get/set when interface is in down state as they required mbox communication. RSS enable flag status is used for set/get configuration. Current code do not clear the RSS enable flag on interface down which lead to mbox error while trying to set/get RSS configuration. Fixes: 85069e95e531 ("octeontx2-pf: Receive side scaling support") Signed-off-by: Geetha sowjanya <gakula@marvell.com> Signed-off-by: Hariprasad Kelam <hkelam@marvell.com> Signed-off-by: Sunil Kovvuri Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-18octeontx2-af: Fix irq free in rvu teardownGeetha sowjanya1-2/+4
Current devlink code try to free already freed irqs as the irq_allocate flag is not cleared after free leading to kernel crash while removing rvu driver. The patch fixes the irq free sequence and clears the irq_allocate flag on free. Fixes: 7304ac4567bc ("octeontx2-af: Add mailbox IRQ and msg handlers") Signed-off-by: Geetha sowjanya <gakula@marvell.com> Signed-off-by: Hariprasad Kelam <hkelam@marvell.com> Signed-off-by: Sunil Kovvuri Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-18octeontx2-af: Return correct CGX RX fifo sizeSubbaraya Sundeep3-6/+22
CGX receive buffer size is a constant value and cannot be read from CGX0 block always since CGX0 may not enabled everytime. Hence return CGX receive buffer size from first enabled CGX block instead of CGX0. Fixes: 6e54e1c5399a ("octeontx2-af: cn10K: MTU configuration") Signed-off-by: Subbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: Hariprasad Kelam <hkelam@marvell.com> Signed-off-by: Sunil Kovvuri Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-18octeontx2-af: Remove TOS field from MKEX TXSubbaraya Sundeep1-2/+0
The MKEX profile describes what packet fields need to be extracted from the input packet and how to place those packet fields in the output key for MCAM matching. The MKEX profile can be in a way where higher layer packet fields can overwrite lower layer packet fields in output MCAM Key. Hence MKEX profile is always ensured that there are no overlaps between any of the layers. But the commit 42006910b5ea ("octeontx2-af: cleanup KPU config data") introduced TX TOS field which overlaps with DMAC in MCAM key. This led to AF driver returning error when TX rule is installed with DMAC as match criteria since DMAC gets overwritten and cannot be supported. This patch fixes the issue by removing TOS field from MKEX TX profile. Fixes: 42006910b5ea ("octeontx2-af: cleanup KPU config data") Signed-off-by: Subbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: Hariprasad Kelam <hkelam@marvell.com> Signed-off-by: Sunil Kovvuri Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-18octeontx2-af: Formatting debugfs entry rsrc_alloc.Rakesh Babu1-17/+29
With the existing rsrc_alloc's format, there is misalignment for the pcifunc entries whose VF's index is a double digit. This patch fixes this. pcifunc NPA NIX0 NIX1 SSO GROUP SSOWS TIM CPT0 CPT1 REE0 REE1 PF0:VF0 8 5 PF0:VF1 9 3 PF0:VF10 18 10 PF0:VF11 19 8 PF0:VF12 20 11 PF0:VF13 21 9 PF0:VF14 22 12 PF0:VF15 23 10 PF1 0 0 Fixes: 23205e6d06d4 ("octeontx2-af: Dump current resource provisioning status") Signed-off-by: Rakesh Babu <rsaladi2@marvell.com> Signed-off-by: Hariprasad Kelam <hkelam@marvell.com> Signed-off-by: Sunil Kovvuri Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-18octeontx2-pf: Do not modify number of rulesSubbaraya Sundeep1-1/+3
In the ETHTOOL_GRXCLSRLALL ioctl ethtool uses below structure to read number of rules from the driver. struct ethtool_rxnfc { __u32 cmd; __u32 flow_type; __u64 data; struct ethtool_rx_flow_spec fs; union { __u32 rule_cnt; __u32 rss_context; }; __u32 rule_locs[0]; }; Driver must not modify rule_cnt member. But currently driver modifies it by modifying rss_context. Hence fix it by using a local variable. Fixes: 81a4362016e7 ("octeontx2-pf: Add RSS multi group support") Signed-off-by: Subbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: Hariprasad Kelam <hkelam@marvell.com> Signed-off-by: Sunil Kovvuri Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Copyright © 1996 – 2026 Jason A. Donenfeld. All Rights Reverse Engineered.