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path: root/include/asm-blackfin/bfin-global.h (follow)
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2007-12-23[Blackfin] arch: Clean up dump_bfin_memRobin Getz1-1/+1
Clean up dump_bfin_mem so that it will display content from the kernel, as well as l1 instruction, when deferred HW errors happen, print out the last frame info if it makes sense. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-11-21Blackfin arch: split apart dump_bfin_regs and merge/remove show_regs from process.c, which was largely duplicatedMike Frysinger1-1/+2
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-11-21Blackfin arch: rename _return_from_exception to _bfin_return_from_exception and export itMike Frysinger1-0/+1
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-11-18Blackfin arch: remove dump_thread()Adrian Bunk1-1/+0
The only user is the a.out support. It was therefore removed prior to the blackfin merge from all architectures not supporting a.out. Currently, Blackfin doesn't suppport a.out. Signed-off-by: Adrian Bunk <bunk@kernel.org> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-10-29Blackfin arch: ensure that speculative loads of bad pointers don't cause us to do bad things.Robin Getz1-0/+1
Fix/change formatting of a few more things. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-10-21Blackfin arch: add functions for converting between sclks and usecsMike Frysinger1-0/+2
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-10-21Blackfin arch: use "char bfin_board_name[]" rather than "char *bfin_board_name" per discussion on lkml as the former uses less storageMike Frysinger1-1/+1
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-07-25Blackfin arch: Initialize the exception vectors early in the boot processBernd Schmidt1-0/+1
Initialize the exception vectors early in the boot process, so that CPLB faults can be handled when memory protection is enabled. Signed-off-by: Bernd Schmidt <bernd.schmidt@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-06-21Blackfin arch: defines and provides entry points for certain user space functions at fixed addressesBernd Schmidt1-0/+12
This patch defines (and provides) entry points for certain user space functions at fixed addresses. The Blackfin has no usable atomic instructions, but we can ensure that these code sequences appear atomic from a user space point of view by detecting when we're in the process of executing them during the interrupt handler return path. This allows much more efficient pthread lock implementations than the bfin_spinlock syscall we're currently using. Also provided is a small sys_rt_sigreturn stub which can be used by the signal handler setup code. The signal.c part will be committed separately. Signed-off-by: Bernd Schmidt <bernd.schmidt@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-05-21Blackfin arch: cache SWRST value at bootup so other things like watchdog can non-destructively query itMike Frysinger1-0/+1
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07blackfin architectureBryan Wu1-0/+120
This adds support for the Analog Devices Blackfin processor architecture, and currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561 (Dual Core) devices, with a variety of development platforms including those avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP, BF561-EZKIT), and Bluetechnix! Tinyboards. The Blackfin architecture was jointly developed by Intel and Analog Devices Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in December of 2000. Since then ADI has put this core into its Blackfin processor family of devices. The Blackfin core has the advantages of a clean, orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC (Multiply/Accumulate), state-of-the-art signal processing engine and single-instruction, multiple-data (SIMD) multimedia capabilities into a single instruction-set architecture. The Blackfin architecture, including the instruction set, is described by the ADSP-BF53x/BF56x Blackfin Processor Programming Reference http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf The Blackfin processor is already supported by major releases of gcc, and there are binary and source rpms/tarballs for many architectures at: http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete documentation, including "getting started" guides available at: http://docs.blackfin.uclinux.org/ which provides links to the sources and patches you will need in order to set up a cross-compiling environment for bfin-linux-uclibc This patch, as well as the other patches (toolchain, distribution, uClibc) are actively supported by Analog Devices Inc, at: http://blackfin.uclinux.org/ We have tested this on LTP, and our test plan (including pass/fails) can be found at: http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel [m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files] Signed-off-by: Bryan Wu <bryan.wu@analog.com> Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl> Signed-off-by: Aubrey Li <aubrey.li@analog.com> Signed-off-by: Jie Zhang <jie.zhang@analog.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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