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The ARM clock is a virtual clock feeding the ARM partition of
the SoC. It controls multiple other clocks to ensure the right
sequencing when cpufreq changes the CPU clock rate.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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This is the bypass clock used to feed the ARM partition
while we reprogram PLL1 to another rate.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Pull "Second Round of Renesas ARM Based SoC DT Updates for v3.19" from Simon Horman:
* Add labels for LEDs on kzm9g-reference and koelsch
* Add Sound support to r8a7790/lager and r8a7791/koelsch
* Add IIC DMA nodes to r8a7790 and r8a7791
* Use SoC-specific IIC compatible properties on sh73a0 and r8a73a4
* Add SGX, MMP and VSP1 clocks to r8a7794
* Add USBDMAC{0,1} clocks to r8a7790 and r8a7791
* tag 'renesas-dt2-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (29 commits)
ARM: shmobile: r8a7791: add USBDMAC{0,1} clocks to device tree
ARM: shmobile: r8a7790: add USBDMAC{0,1} clocks to device tree
ARM: shmobile: r8a7794: Add MMP and VSP1 clocks to device tree
ARM: shmobile: r8a7794: Add SGX clock to device tree
ARM: shmobile: koelsch: add Volume Ramp usage on comment
ARM: shmobile: lager: add Volume Ramp usage on comment
ARM: shmobile: r8a7791: add DMA nodes for IIC
ARM: shmobile: r8a7790: add DMA nodes for IIC
ARM: shmobile: kzm9g-reference dts: Add labels for the LEDs
ARM: shmobile: koelsch dts: Add labels for the LEDs
ARM: shmobile: sh73a0 dtsi: Add SoC-specific IIC compatible properties
ARM: shmobile: r8a73a4 dtsi: Add SoC-specific IIC compatible properties
ARM: shmobile: koelsch: Sound DMA support via DVC on DTS
ARM: shmobile: koelsch: Sound DMA support via SRC on DTS
ARM: shmobile: koelsch: Sound DMA support via BUSIF on DTS
ARM: shmobile: koelsch: Sound DMA support on DTS
ARM: shmobile: koelsch: Sound PIO support on DTS
ARM: shmobile: koelsch: fixup I2C2 clock frequency
ARM: shmobile: lager: Sound DMA support via DVC on DTS
ARM: shmobile: lager: Sound DMA support via SRC on DTS
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Pull "STi DT updates for v3.19, round 2" from Maxime Coquelin:
Highlights:
-----------
- Refactor STiH407 SoC and board to add STiH410 SoC support
- Add USB support to STiH416 SoC
* tag 'sti-dt-for-v3.19-2' of git://git.stlinux.com/devel/kernel/linux-sti:
ARM: STi: DT: STiH416: Change miphy356 node name to phy@fe382000
ARM: STi: DT: STih407: STih410: Add clk_ignore_unused to kernel bootargs
ARM: STi: DT: STiH410: Add STiH410 SoC and b2120 board support.
ARM: STi: DT: STih407: Abstract common dt nodes into shared files.
ARM: STi: DT: STiH410: Add pinctl config for usb controllers.
ARM: STi: DT: STiH410: Add defines for STiH410 DT clocks
ARM: STi: DT: STiH416: Add DT nodes for the ehci and ohci usb controllers.
ARM: STi: DT: STiH416: Add DT node for the stih415/6 usb2 phy
ARM: STi: DT: STiH416: Add pinctl setup for usb controllers.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Pull "Renesas ARM Based SoC DT Updates for v3.19" from Simon Horman:
* Add Add SoC-specific SATA compatible property to r8a7779
* Enable DMA for MMCIF on r8a7791 and r8a7790
* Enable USB-PHY, HS-USB and USB3.0 on r8a7791 and r8a7790
* Enable TMU timer via DT on r8a7778
* Enable CMT timer via DT on r8a73a4
* Add MMP and {SR}GX clocks to r8a7791 and r8a7790
* Correct scifa2 clock index on r8a7740
* Add missing INTCA for irqpin on r8a7740
* tag 'renesas-dt-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (34 commits)
ARM: shmobile: r8a7779 dtsi: Add SoC-specific SATA compatible property
ARM: shmobile: r8a7791: Reference DMA channels in MMCIF DT node
ARM: shmobile: r8a7790: Reference DMA channels in MMCIF DT nodes
ARM: shmobile: r8a7791: Add MMCIF0 DT node
ARM: shmobile: r8a7790: Rename mmcif node to mmc
ARM: shmobile: r8a7778: Add SoC-specific TMU compatible property
ARM: shmobile: r8a73a4: Add SoC-specific CMT compatible property
ARM: shmobile: henninger: enable HS-USB
ARM: shmobile: koelsch: enable HS-USB
ARM: shmobile: r8a7791: add HS-USB device node
ARM: shmobile: lager: enable HS-USB
ARM: shmobile: r8a7790: add HS-USB device node
ARM: shmobile: r8a7791: add USB3.0 device node
ARM: shmobile: lager: enable USB3.0
ARM: shmobile: r8a7790: add USB3.0 device node
ARM: shmobile: r8a7794: Add arch_timer to device tree
ARM: shmobile: bockw-reference: Initialise TMU device using DT
ARM: shmobile: r8a7778: Add TMU nodes
ARM: shmobile: armadillo800eva dts: Enable TMU0
ARM: shmobile: r8a7740 dtsi: Add TMU0 and TMU1 device nodes
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Although most clock outputs are the same as stih407 SoC, stih410
also has some additional new clock outputs.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
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There is a duplication in a clock name for apq8084 platform that causes
the following warning: "RBCPR_CLK_SRC" redefined
Resolve this by adding a MMSS_ prefix to this clock and making its name
coherent with msm8974 platform.
Fixes: 2b46cd23a5a2 ("clk: qcom: Add APQ8084 Multimedia Clock Controller (MMCC) support")
Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
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It adds the DT support for mmp2 clock subsystem.
Signed-off-by: Chao Xie <chao.xie@marvell.com>
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
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It adds the DT support for pxa910 clock subsystem.
Signed-off-by: Chao Xie <chao.xie@marvell.com>
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
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It adds the DT support for pxa168 clock subsystem.
Signed-off-by: Chao Xie <chao.xie@marvell.com>
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
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Instantiate the two Audio DMA controllers in the r8a7791 device tree.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
[geert: corrected spelling of audmac1]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Instantiate the two Audio DMA controllers in the r8a7790 device tree.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
[geert: corrected spelling of audmac1]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Merge "STi DT updates for v3.19, round 1" from Maxime Coquelin:
Highlights:
-----------
- Add SDHCI support for STiH41x B2020 boards
- Add reset controllers to STiH407 SoC
- Add MiPHY & SATA support to STiH416
- Add Thermal supportto STiH416
- Add Clock support to STiH407 SoC
This tag also includes STiH407 bindings definitions for reset controller.
* tag 'sti-dt-for-v3.19-1' of git://git.stlinux.com/devel/kernel/linux-sti:
ARM: STi: DT: STiH407: Fix: clk-tmds-hdmi clock is missing
ARM: STi: DT: STiH407: Add all defines for STiH407 DT clocks
ARM: STi: DT: STiH407: 407 DT Entry for clockgenA9
ARM: STi: DT: STiH407: 407 DT Entry for clockgen D0/D2/D3
ARM: STi: DT: STiH407: 407 DT Entry for clockgen C0
ARM: STi: DT: STiH407: 407 DT Entry for clockgen A0
ARM: DT: STi: STiH416: Add DT node for ST's SATA device
ARM: DT: STi: STiH416: Add DT node for MiPHY365x
ARM: STi: DT: STiH416: Supply Thermal Controller Device Tree nodes
ARM: STi: DT: Enable second sdhci controller for stih416 b2020 boards.
ARM: STi: DT: Enable mmc0 for both stih415 and stih416 SoCs
ARM: STi: DT: Add sdhci controller for stih415
ARM: STi: DT: Add sdhci pin configuration for stih415
ARM: STi: DT: Add sdhci controller for stih416
ARM: STi: DT: Add sdhci pins for stih416
ARM: sti: Add STiH407 reset controller support.
ARM: sti: Add STiH407 Kconfig entry to select STIH407_RESET
ARM: STi: DT: STiH41x: Convert all uppercase non-defines to lowercase
reset: stih407: Add reset controllers DT bindings
Signed-off-by: Olof Johansson <olof@lixom.net>
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So far, the required PLL's (PLL1/PLL2/PLL5) have been initialized
by boot loader and the kernel code defined fixed rates according
to those default configurations. Beginning with the USB PLL7 the
code started to initialize the PLL's itself (using imx_clk_pllv3).
However, since commit dc4805c2e78ba5a22ea1632f3e3e4ee601a1743b
(ARM: imx: remove ENABLE and BYPASS bits from clk-pllv3 driver)
imx_clk_pllv3 no longer takes care of the ENABLE and BYPASS bits,
hence the USB PLL were not configured correctly anymore.
This patch not only fixes those USB PLL's, but also makes use of
the imx_clk_pllv3 for all PLL's and alignes the code with the PLL
support of the i.MX6 series.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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This patch adds all clock defines for clockgen C0,D0,D2 and D3
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
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Add clock support for the ADC interface in Exynos7.
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
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Add clock support for the watchdog timer, pwm timer and thermal
management unit IPs in Exynos7.
Signed-off-by: Naveen Krishna Ch <naveenkrishna.ch@gmail.com>
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
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Add clock support for the RTC block in Exynos7.
Signed-off-by: Naveen Krishna Ch <naveenkrishna.ch@gmail.com>
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
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Exynos7 supports 3 MMC channels, add the MMC gate clocks to
support them.
Signed-off-by: Naveen Krishna Ch <naveenkrishna.ch@gmail.com>
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
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Exynos7 supports 12 I2C channels, add the I2C gate clocks to
support them.
Signed-off-by: Naveen Krishna Ch <naveenkrishna.ch@gmail.com>
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
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Add initial clock support for Exynos7 SoC which is required
to bring up platforms based on Exynos7.
Signed-off-by: Naveen Krishna Ch <naveenkrishna.ch@gmail.com>
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Reviewed-by: Thomas Abraham <thomas.ab@samsung.com>
Tested-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
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Patch adds DT entries for clockgen C0
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: Olivier Bideau <olivier.bideau@st.com>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
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This patch adds clock driver of Exynos4415 SoC based on Cortex-A9 using
common clock framework. The CMU (Clock Management Unit) of Exynos4415
controls PLLs(Phase Locked Loops) and generates system clocks for CPU,
busses and function clocks for individual IPs.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
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Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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This clock drives the INTCA irqpin controller modules.
Before, it was assumed enabled by the bootloader or reset state.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: devicetree@vger.kernel.org
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Fix a typo error, the "emi" names refer to the eim clocks.
The change fixes typo in EIM and EIM_SLOW pre-output dividers and
selectors clock names. Notably EIM_SLOW clock itself is named correctly.
Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
[vladimir_zapolskiy@mentor.com: ported to v3.17]
Signed-off-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com>
Cc: Sascha Hauer <kernel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Pull clock tree updates from Mike Turquette:
"The clk tree changes for 3.18 are dominated by clock drivers. Mostly
fixes and enhancements to existing drivers as well as new drivers.
This tag contains a bit more arch code than I usually take due to some
OMAP2+ changes. Additionally it contains the restart notifier
handlers which are merged as a dependency into several trees.
The PXA changes are the only messy part. Due to having a stable tree
I had to revert one patch and follow up with one more fix near the tip
of this tag. Some dead code is introduced but it will soon become
live code after 3.18-rc1 is released as the rest of the PXA family is
converted over to the common clock framework.
Another trend in this tag is that multiple vendors have started to
push the complexity of changing their CPU frequency into the clock
driver, whereas this used to be done in CPUfreq drivers.
Changes to the clk core include a generic gpio-clock type and a
clk_set_phase() function added to the top-level clk.h api. Due to
some confusion on the fbdev mailing list the kernel boot parameters
documentation was updated to further explain the clk_ignore_unused
parameter, which is often required by users of the simplefb driver.
Finally some fixes to the locking around the clock debugfs stuff was
done to prevent deadlocks when interacting with other subsystems."
* tag 'clk-for-linus-3.18' of git://git.linaro.org/people/mike.turquette/linux: (99 commits)
clk: pxa clocks build system fix
Revert "arm: pxa: Transition pxa27x to clk framework"
clk: samsung: register restart handlers for s3c2412 and s3c2443
clk: rockchip: add restart handler
clk: rockchip: rk3288: i2s_frac adds flag to set parent's rate
doc/kernel-parameters.txt: clarify clk_ignore_unused
arm: pxa: Transition pxa27x to clk framework
dts: add devicetree bindings for pxa27x clocks
clk: add pxa27x clock drivers
arm: pxa: add clock pll selection bits
clk: dts: document pxa clock binding
clk: add pxa clocks infrastructure
clk: gpio-gate: Ensure gpiod_ APIs are prototyped
clk: ti: dra7-atl-clock: Mark the device as pm_runtime_irq_safe
clk: ti: LLVMLinux: Move __init outside of type definition
clk: ti: consider the fact that of_clk_get() might return an error
clk: ti: dra7-atl-clock: fix a memory leak
clk: ti: change clock init to use generic of_clk_init
clk: hix5hd2: add I2C clocks
clk: hix5hd2: add watchdog0 clocks
...
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Pull MFD updates from Lee Jones:
"Changes to existing drivers:
- DT clean-ups in da9055-core, max14577, rn5t618, arizona, hi6421, stmpe, twl4030
- Export symbols for use in modules in max14577
- Plenty of static code analysis/Coccinelle fixes throughout the SS
- Regmap clean-ups in arizona, wm5102, wm5110, da9052, tps65217, rk808
- Remove unused/duplicate code in da9052, 88pm860x, ti_ssp, lpc_sch, arizona
- Bug fixes in ti_am335x_tscadc, da9052, ti_am335x_tscadc, rtsx_pcr
- IRQ fixups in arizona, stmpe, max14577
- Regulator related changes in axp20x
- Pass DMA coherency information from parent => child in MFD core
- Rename DT document files for consistency
- Add ACPI support to the MFD core
- Add Andreas Werner to MAINTAINERS for MEN F21BMC
New drivers/supported devices:
- New driver for MEN 14F021P00 Board Management Controller
- New driver for Ricoh RN5T618 PMIC
- New driver for Rockchip RK808
- New driver for HiSilicon Hi6421 PMIC
- New driver for Qualcomm SPMI PMICs
- Add support for Intel Braswell in lpc_ich
- Add support for Intel 9 Series PCH in lpc_ich
- Add support for Intel Quark ILB in lpc_sch"
[ Delayed to after the poweer/reset pull due to Kconfig problems with
recursive Kconfig select/depends-on chains. - Linus ]
* tag 'mfd-for-linus-3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (79 commits)
mfd: cros_ec: wait for completion of commands that return IN_PROGRESS
i2c: i2c-cros-ec-tunnel: Set retries to 3
mfd: cros_ec: move locking into cros_ec_cmd_xfer
mfd: cros_ec: stop calling ->cmd_xfer() directly
mfd: cros_ec: Delay for 50ms when we see EC_CMD_REBOOT_EC
MAINTAINERS: Adds Andreas Werner to maintainers list for MEN F21BMC
mfd: arizona: Correct mask to allow setting micbias external cap
mfd: Add ACPI support
Revert "mfd: wm5102: Manually apply register patch"
mfd: ti_am335x_tscadc: Update logic in CTRL register for 5-wire TS
mfd: dt-bindings: atmel-gpbr: Rename doc file to conform to naming convention
mfd: dt-bindings: qcom-pm8xxx: Rename doc file to conform to naming convention
mfd: Inherit coherent_dma_mask from parent device
mfd: Document DT bindings for Qualcomm SPMI PMICs
mfd: Add support for Qualcomm SPMI PMICs
mfd: dt-bindings: pm8xxx: Add new compatible string
mfd: axp209x: Drop the parent supplies field
mfd: twl4030-power: Use 'ti,system-power-controller' as alternative way to support system power off
mfd: dt-bindings: twl4030-power: Use the standard property to mark power control
mfd: syscon: Add Atmel GPBR DT bindings documention
...
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Add a the common code used by all PXA variants.
This is the first step in the transition from architecture defined
clocks (in arch/arm/mach-pxa) towards clock framework. The goal is to
have the same features (and not all the features) of the existing
clocks, and enable the transition of PXA to device-tree.
All PXA rely on a "CKEN" type clock, which :
- has a gate (bit in CKEN register)
- is generated from a PLL, generally divided
- has an alternate low power clock
Each variant will specialize the CKEN clock :
- pxa25x have no low power clock
- pxa27x in low power use always the 13 MHz ring oscillator
- pxa3xx in low power have specific dividers for each clock
The device-tree provides a list of CLK_* (ex: CLK_USB or CLK_I2C) to get
a handle on the clock. While pxa-clock.h will describe all the clocks of
all the variants, each variant will only use a subset of it.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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Samsung clock patches for v3.18
1) non-critical fixes (without the need to push to stable)
fa0111be4ff3 clk: samsung: exynos4: remove duplicate div_core2 divider clock instantiation
b511593d7165 clk: samsung: exynos4: fix g3d clocks
c14254300131 clk: samsung: exynos4: add missing smmu_g2d clock and update comments
22842d244af3 clk: samsung: exynos5260: fix typo in clock name
e82ba578ccde clk: samsung: exynos3250: fix width field of mout_mmc0/1
59037b92f440 clk: samsung: exynos3250: fix width and shift of div_spi0_isp clock
5ce37f266650 clk: samsung: exynos3250: fix mout_cam_blk parent list
2) Clock driver extensions
07ccf02ba5c3 dt-bindings: clk: samsung: Document the DMC domain of Exynos3250 CMU
d0e73eaf1925 ARM: dts: exynos3250: Add CMU node for DMC domain clocks
e3c3f19bc618 clk: samsung: exynos3250: Register DMC clk provider
4676f0aab9dc clk: samsung: exynos4: add support for MOUT_HDMI and MOUT_MIXER clocks
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Hisilicon HiX5HD2 clock updates for 3.18-v2
- Add I2C clocks
- Add watchdog clocks
- Add sd clocks
- Add complex clock implementation to support sata, usb and ethernet
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hix5hd2 add I2C clocks (I2C0~i2C5)
Signed-off-by: Wei Yan <sledge.yanwei@huawei.com>
Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
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hix5hd2 add watchdog0 clocks
Signed-off-by: Guoxiong Yan <yanguoxiong@huawei.com>
Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
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Signed-off-by: Jiancheng Xue <xuejiancheng@huawei.com>
Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
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Support clk of sata, usb and ethernet
Signed-off-by: Jiancheng Xue <xuejiancheng@huawei.com>
Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
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CPU clock handling for Rockchip SoCs
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Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Doug Anderson <dianders@chromium.org>
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Tegra clk updates for 3.18
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Add device tree bindings documentation and a header file
for rockchip's RK808 pmic.
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Zhang Qing <zhangqing@rock-chips.com>
Tested-by: Heiko <heiko@sntech.de>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
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Michael Turquette
Lucas Stach
Arnd Bergmann
Yoshifumi Hosoya
Kouei Abe
Peter Griffin
Georgi Djakov
Chao Xie
Kuninori Morimoto
Olof Johansson
Stefan Agner
Koji Matsuoka
Gabriel FERNANDEZ
Abhilash Kesavan
Naveen Krishna Ch
Chanwoo Choi
Geert Uytterhoeven
Steve Longerbeam
Linus Torvalds
Robert Jarzmik
Wei Yan
Guoxiong Yan
Jiancheng Xue
Zhangfei Gao
Heiko Stuebner
Chris Zhong