aboutsummaryrefslogtreecommitdiffstats
path: root/include/dt-bindings/clock
AgeCommit message (Collapse)AuthorFilesLines
2014-01-12powerpc/512x: clk: support MPC5121/5123/5125 SoC variantsGerhard Sittig1-1/+8
improve the common clock support code for MPC512x - expand the CCM register set declaration with MPC5125 related registers (which reside in the previously "reserved" area) - tell the MPC5121, MPC5123, and MPC5125 SoC variants apart, and derive the availability of components and their clocks from the detected SoC (MBX, AXE, VIU, SPDIF, PATA, SATA, PCI, second FEC, second SDHC, number of PSC components, type of NAND flash controller, interpretation of the CPMF bitfield, PSC/CAN mux0 stage input clocks, output clocks on SoC pins) - add backwards compatibility (allow operation against a device tree which lacks clock related specs) for MPC5125 FECs, too telling SoC variants apart and adjusting the clock tree's generation occurs at runtime, a common generic binary supports all of the chips the MPC5125 approach to the NFC clock (one register with two counters for the high and low periods of the clock) is not implemented, as there are no users and there is no common implementation which supports this kind of clock -- the new implementation would be unused and could not get verified, so it shall wait until there is demand Signed-off-by: Gerhard Sittig <gsi@denx.de> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Anatolij Gustschin <agust@denx.de>
2014-01-12dts: mpc512x: introduce dt-bindings/clock/ headerGerhard Sittig1-0/+69
introduce a dt-bindings/ header file for MPC512x clocks, providing symbolic identifiers for those SoC clocks which clients will reference from their device tree nodes Cc: Rob Herring <rob.herring@calxeda.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Ian Campbell <ian.campbell@citrix.com> Cc: devicetree@vger.kernel.org Reviewed-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Gerhard Sittig <gsi@denx.de> Signed-off-by: Anatolij Gustschin <agust@denx.de>
2014-01-08Merge tag 'renesas-dt-fixes-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dtOlof Johansson2-26/+0
From Simon Horman: Renesas ARM Based SoC DT Fixes for v3.14 Revert the addition of SSI clocks to DT for the r8a7790 (R-Car H2) and r8a7791 (R-Car M2) SoCs. Unfortunately these patches prevent booting the r8a7790-based Lager board and r8a7791-based Koelsch board to the point where a serial output is available. A solution to this problem is being sought but has not yet been finalised so in the mean time revert the changes. * tag 'renesas-dt-fixes-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: Revert "ARM: shmobile: r8a7791: Add SSI clocks in device tree" Revert "ARM: shmobile: r8a7790: Add SSI clocks in device tree" Signed-off-by: Olof Johansson <olof@lixom.net>
2014-01-08clk: exynos5250: add clock ID for div_pcm0Andrew Bresticker1-0/+1
There is no gate for the PCM clock input to the AudioSS block, so the parent of sclk_pcm is div_pcm0. Add a clock ID for it so that we can reference it in device trees. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Acked-by: Mike Turquette <mturquette@linaro.org> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Tomasz Figa <t.figa@samsung.com>
2014-01-08ARM: exynos5440: create a DT header defining CLK IDsAndrzej Hajda1-0/+42
The patch adds header file defining clock IDs. This allows to use macros instead of magic numbers in DT bindings. Signed-off-by: Andrzej Hajda <a.hajda-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org> Signed-off-by: Kyungmin Park <kyungmin.park-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org> Acked-by: Mike Turquette <mturquette@linaro.org> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Tomasz Figa <t.figa@samsung.com>
2014-01-08ARM: exynos5420: create a DT header defining CLK IDsAndrzej Hajda1-0/+188
The patch adds header file defining clock IDs. This allows to use macros instead of magic numbers in DT bindings. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Mike Turquette <mturquette@linaro.org> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Tomasz Figa <t.figa@samsung.com>
2014-01-08ARM: exynos5250: create a DT header defining CLK IDsAndrzej Hajda1-0/+159
The patch adds header file defining clock IDs. This allows to use macros instead of magic numbers in DT bindings. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Mike Turquette <mturquette@linaro.org> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Tomasz Figa <t.figa@samsung.com>
2014-01-08ARM: exynos4: create a DT header defining CLK IDsAndrzej Hajda1-0/+244
The patch adds header file defining clock IDs. This allows to use macros instead of magic numbers in DT bindings. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Mike Turquette <mturquette@linaro.org> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Tomasz Figa <t.figa@samsung.com>
2014-01-03Merge tag 'renesas-dt3-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dtOlof Johansson2-0/+244
From Simon Horman: Third Round of Renesas ARM Based SoC DT Updates for v3.14 * r8a7791 (R-Car M2) and r8a7790 (R-Car H2) SoCSs - Add SSI, QSPI and MSIOF clocks in device tree r8a7791 (R-Car M2) based Koelsch and r8a7790 (R-Car H2) based Lager boards - Remove reference DTS - Specify external clock frequency in DT - Sync non-reference DTS with referene DTS - Add clocks to DTS * r8a7740 (R-Mobile A1) based Armadillo board - Add gpio-keys device - Add PWM backlight enable GPIO - Add PWM backlight power supply * r8a73a0 (SH-Mobile AG5), r8a7740 (R-Mobile A1) and r8a73a4 (SH-Mobile APE6) SoCs - Specify PFC interrupts in DT * tag 'renesas-dt3-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (72 commits) ARM: shmobile: r8a7791: Add SSI clocks in device tree ARM: shmobile: r8a7790: Add SSI clocks in device tree ARM: shmobile: r8a7791: Add QSPI module clock in device tree ARM: shmobile: r8a7790: Add QSPI module clock in device tree ARM: shmobile: r8a7791: Add MSIOF clocks in device tree ARM: shmobile: r8a7790: Add MSIOF clocks in device tree ARM: shmobile: Remove Koelsch reference DTS ARM: shmobile: Remove Lager reference DTS ARM: shmobile: koelsch: Specify external clock frequency in DT ARM: shmobile: lager: Specify external clock frequency in DT ARM: shmobile: Sync Koelsch DTS with Koelsch reference DTS ARM: shmobile: Sync Lager DTS with Lager reference DTS ARM: shmobile: r8a7791: Add clocks ARM: shmobile: r8a7790: Reference clocks ARM: shmobile: r8a7790: Add clocks ARM: shmobile: armadillo: dts: Add gpio-keys device ARM: shmobile: sh73a0: Specify PFC interrupts in DT ARM: shmobile: r8a7740: Specify PFC interrupts in DT ARM: shmobile: r8a73a4: Specify PFC interrupts in DT ARM: shmobile: armadillo: dts: Add PWM backlight enable GPIO ... Signed-off-by: Olof Johansson <olof@lixom.net>
2014-01-02Merge tag 'imx-soc-3.14' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/socOlof Johansson3-2/+211
From Shawn Guo: i.MX SoC changes for 3.14: - Add the initial i.MX50 SoC support - Support device tree boot for i.MX35 - Move imx5 clock driver to use macros for clock ID - Some random updates and non-critical fixes on clock drivers - A few defconfig updates and minor cleanups * tag 'imx-soc-3.14' of git://git.linaro.org/people/shawnguo/linux-2.6: (37 commits) ARM: imx: improve the comment of CCM lpm SW workaround ARM: imx: improve status check of clock gate ARM: imx: add necessary interface for pfd ARM: imx_v6_v7_defconfig: Select CONFIG_REGULATOR_PFUZE100 ARM: imx_v6_v7_defconfig: Select MX35 and MX50 device tree support ARM: imx: Add cpu frequency scaling support ARM i.MX35: Add devicetree support. ARM: imx: update imx_v6_v7_defconfig ARM: imx6sl: Add missing spba clock to clock tree ARM: imx6sl: Add missing pll4_audio_div to the clock tree ARM: imx6: Derive spdif clock from pll3_pfd3_454m ARM: imx: use __initconst for const init definition ARM i.MX5: fix obvious typo in ldb_di0_gate clk definition ARM i.MX5: set CAN peripheral clock to 24 MHz parent ARM: imx: pllv1: Fix PLL calculation for i.MX27 ARM i.MX5: fix "shift" value for lp_apm_sel on i.MX50 and i.MX53 ARM: imx: imx53: Add SATA PHY clock ARM: imx_v6_v7_defconfig: Enable STMPE touchscreen ARM: imx: rename IMX6SL_CLK_CLK_END to IMX6SL_CLK_END ARM: imx: select PINCTRL at sub-architecure level ... Signed-off-by: Olof Johansson <olof@lixom.net>
2013-12-31ARM: imx6sl: Add missing spba clock to clock treeNicolin Chen1-1/+2
We are missing spba clock in imx6sl's clock tree, thus add it. Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-12-31ARM: imx6sl: Add missing pll4_audio_div to the clock treeNicolin Chen1-1/+2
There's a dividor for pll4_audio clock missing in clock tree, thus add it. Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-12-31ARM: imx: imx53: Add SATA PHY clockMarek Vasut1-1/+2
Add SATA PHY clock which are derived from the USB PHY1 clock. Note that this patch derives the SATA PHY clock from USB PHY1 clock gate so that the SATA driver can ungate both the SATA PHY clock and USB PHY1 clock for the SATA to work correctly. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Richard Zhu <r65037@freescale.com> Cc: Tejun Heo <tj@kernel.org> Cc: Linux-IDE <linux-ide@vger.kernel.org> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-12-31ARM: imx: rename IMX6SL_CLK_CLK_END to IMX6SL_CLK_ENDShawn Guo1-1/+1
The macro name IMX6SL_CLK_CLK_END is a little insane. Rename it to IMX6SL_CLK_END. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-12-31ARM: imx5: introduce DT includes for clock providerLucas Stach1-0/+202
Use clock defines in order to make devicetrees more human readable. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-12-29Merge tag 'renesas-soc2-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/socOlof Johansson2-0/+205
From Simon Horman: Second Round of Renesas ARM Based SoC Updates for v3.14 * Global - Add select MIGHT_HAVE_PCI for PCI-AHB bridge code * r7s72100 SoC (RZ/A1H) - clks: remove duplicated clock from r7s72100 * R-Car Gen 2: r8a7791 (R-Car M2) and r8a7790 (R-Car H2) * Initialize CCF before clock sources * Do not setup timer in non-secure mode * r8a7791 (R-Car M2) - Conditionally select MICREL_PHY - Add clock index macros for DT sources - Add Ether clock * r8a7790 (R-Car H2) - Add clock index macros for DT sources - Add I2C support * r8a7778 (R-Car M1) - Add USB Func DMAEngine support - camera-rcar header cleanup - Add SSIx DMAEngine support * sh73a0 (SH-Mobile AG5) - Add FSI clock support for DT * tag 'renesas-soc2-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: arm: shmobile: clks: remove duplicated clock from r7s72100 ARM: shmobile: koelsch: Conditionally select MICREL_PHY ARM: shmobile: rcar-gen2: Initialize CCF before clock sources ARM: shmobile: r8a7791: Add clock index macros for DT sources ARM: shmobile: r8a7790: Add clock index macros for DT sources ARM: shmobile: Add select MIGHT_HAVE_PCI for PCI-AHB bridge code ARM: shmobile: r8a7778: add USB Func DMAEngine support ARM: rcar-gen2: Do not setup timer in non-secure mode ARM: shmobile: r8a7791: add Ether clock ARM: shmobile: r8a7778: camera-rcar header cleanup ARM: shmobile: sh73a0: add FSI clock support for DT ARM: shmobile: r8a7790: add I2C support ARM: shmobile: r8a7778: add SSIx DMAEngine support Signed-off-by: Olof Johansson <olof@lixom.net>
2013-12-26Revert "ARM: shmobile: r8a7791: Add SSI clocks in device tree"Simon Horman1-13/+0
This reverts commit b652896b02df3dfde3a68957cce01f2aa4585842. Unfortunately this commit prevents multiplatform from booting to the point where a serial console is available. Revert it while a solution is sought. Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-12-26Revert "ARM: shmobile: r8a7790: Add SSI clocks in device tree"Simon Horman1-13/+0
This reverts commit 6dea2c1ebc6fc43852fd6125d75a75da223ff707. Unfortunately this commit prevents multiplatform from booting to the point where a serial console is available. Revert it while a solution is sought. Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-12-24ARM: shmobile: r8a7791: Add SSI clocks in device treeLaurent Pinchart1-0/+13
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-12-24ARM: shmobile: r8a7790: Add SSI clocks in device treeLaurent Pinchart1-0/+13
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-12-24ARM: shmobile: r8a7791: Add QSPI module clock in device treeLaurent Pinchart1-0/+1
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-12-24ARM: shmobile: r8a7790: Add QSPI module clock in device treeLaurent Pinchart1-0/+1
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-12-24ARM: shmobile: r8a7791: Add MSIOF clocks in device treeLaurent Pinchart1-0/+5
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-12-24ARM: shmobile: r8a7790: Add MSIOF clocks in device treeLaurent Pinchart1-0/+6
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-12-19ARM: shmobile: r8a7791: Add clock index macros for DT sourcesLaurent Pinchart1-0/+105
Add macros usable by device tree sources to reference r8a7791 clocks by index. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-12-19ARM: shmobile: r8a7790: Add clock index macros for DT sourcesLaurent Pinchart1-0/+100
Add macros usable by device tree sources to reference r8a7790 clocks by index. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-12-12Merge tag 'clk-hisilicon' of git://git.kernel.org/pub/scm/linux/kernel/git/hzhuang1/linux into clk-next-hisiliconMike Turquette1-0/+152
2013-12-11clk: tegra: remove bogus PCIE_XCLKStephen Warren2-2/+2
The "pcie_xclk" clock is not actually a clock at all, but rather a reset domain. Now that the custom Tegra module reset API has been removed, we can remove the definition of any "clocks" that existed solely to support it. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Acked-By: Peter De Schrijver <pdeschrijver@nvidia.com>
2013-12-09ARM: imx: Add DMAMUX clock for Vybrid vf610 SoCJingchang Lu1-1/+5
Signed-off-by: Jingchang Lu <b35083@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-12-04clk: hisilicon: add common clock supportHaojian Zhuang1-0/+152
Enable common clock driver of Hi3620 SoC. clkgate-seperated driver is used to support the clock gate that enable/disable/status registers are seperated. Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
2013-11-26clk: tegra124: Add support for Tegra124 clocksPeter De Schrijver1-0/+341
Implement clock support for Tegra124. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
2013-11-26ARM: tegra30: add missing CLK IDsPeter De Schrijver1-1/+9
The Tegra30 clock bindings lack few IDs for audio and clk_out muxes. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
2013-11-26clk: tegra114: Rename gr_2d/gr_3d to gr2d/gr3dThierry Reding1-2/+2
These clocks were named gr2d and gr3d on Tegra20 and Tegra30, so use the same names on Tegra114 for consistency. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com>
2013-11-25ARM: tegra114: add missing clocks to bindingPeter De Schrijver1-2/+2
commit 992bb598f690542a2f539fd12a42b960b7692025 forgot to move dfll_soc and dfll_ref to include/dt-bindings/clock/tegra114-car.h. Add them again in this patch as TEGRA114_CLK_DFLL_SOC and TEGRA114_CLK_DFLL_REF. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
2013-11-04clk: new driver for efm32 SoCUwe Kleine-König1-0/+42
This patch adds support for the clocks provided by the Clock Management Unit of Energy Micro's efm32 Giant Gecko SoCs including device tree bindings. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-09Merge tag 'clk-for-linus-3.12' of git://git.linaro.org/people/mturquette/linuxLinus Torvalds1-0/+178
Pull clock framework changes from Michael Turquette: "The common clk framework changes for 3.12 are dominated by clock driver patches, both new drivers and fixes to existing. A high percentage of these are for Samsung platforms like Exynos. Core framework fixes and some new features like automagical clock re-parenting round out the patches" * tag 'clk-for-linus-3.12' of git://git.linaro.org/people/mturquette/linux: (102 commits) clk: only call get_parent if there is one clk: samsung: exynos5250: Simplify registration of PLL rate tables clk: samsung: exynos4: Register PLL rate tables for Exynos4x12 clk: samsung: exynos4: Register PLL rate tables for Exynos4210 clk: samsung: exynos4: Reorder registration of mout_vpllsrc clk: samsung: pll: Add support for rate configuration of PLL46xx clk: samsung: pll: Use new registration method for PLL46xx clk: samsung: pll: Add support for rate configuration of PLL45xx clk: samsung: pll: Use new registration method for PLL45xx clk: samsung: exynos4: Rename exynos4_plls to exynos4x12_plls clk: samsung: exynos4: Remove checks for DT node clk: samsung: exynos4: Remove unused static clkdev aliases clk: samsung: Modify _get_rate() helper to use __clk_lookup() clk: samsung: exynos4: Use separate aliases for cpufreq related clocks clocksource: samsung_pwm_timer: Get clock from device tree ARM: dts: exynos4: Specify PWM clocks in PWM node pwm: samsung: Update DT bindings documentation to cover clocks clk: Move symbol export to proper location clk: fix new_parent dereference before null check clk: wm831x: Initialise wm831x pointer on init ...
2013-08-05clk: samsung: Add clock driver for S3C64xx SoCsTomasz Figa1-0/+178
This patch adds new, Common Clock Framework-based clock driver for Samsung S3C64xx SoCs. The driver is just added, without actually letting the platforms use it yet, since this requires more intermediate steps. Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-07-15ARM: imx: fix vf610 enet module clock selectionShawn Guo1-1/+3
The fec/enet driver calculates MDC rate with the formula below. ref_freq / ((MII_SPEED + 1) x 2) The ref_freq here is the fec internal module clock, which is missing from clk-vf610 clock driver right now. And clk-vf610 driver mistakenly supplies RMII clock (50 MHz) as the source to fec. This results in the situation that fec driver gets ref_freq as 50 MHz, while physically it runs at 66 MHz (fec module clock physically sources from ipg which runs at 66 MHz). That's why software expects MDC runs at 2.5 MHz, while the measurement tells it runs at 3.3 MHz. And this causes the PHY KSZ8041 keeps swithing between Full and Half mode as below. libphy: 400d0000.etherne:00 - Link is Up - 100/Full libphy: 400d0000.etherne:00 - Link is Up - 100/Half libphy: 400d0000.etherne:00 - Link is Up - 100/Full libphy: 400d0000.etherne:00 - Link is Up - 100/Half libphy: 400d0000.etherne:00 - Link is Up - 100/Full libphy: 400d0000.etherne:00 - Link is Up - 100/Half Add the missing module clock for ENET0 and ENET1, and correct the clock supplying in device tree to fix above issue. Thanks to Alison Wang <b18965@freescale.com> for debugging the issue. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-20Merge tag 'imx-soc-3.11' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/dtArnd Bergmann2-0/+311
This is a dependency for imx/dt Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-06-17ARM: imx: add VF610 clock supportJingchang Lu1-0/+163
Add clock support for Vybrid VF610. It uses dtc macro support to define all clock IDs in vf610-clock.h to keep clock IDs coherence between kernel and DT. Signed-off-by: Jingchang Lu <b35083@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-17ARM: imx: add clock support for imx6slShawn Guo1-0/+148
Add clock support for i.MX6 SoloLite. It uses the dtc marco support to define all clock IDs in imx6sl-clock.h, which will be included by both clock driver and device tree sources, so that the data will stay sync all the time between kernel and DT. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-05-28ARM: tegra114: create a DT header defining CLK IDsHiroshi Doyu1-0/+342
Create a header file to define the clock IDs used by the Tegra114 clock binding. Remove the list of definitions from the binding documentation, and refer the reader to the header file. This will allow the same header to be used by both device tree files, and drivers implementing this binding, which guarantees that the two stay in sync. This also makes device trees more readable by using names instead of magic numbers. Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> [swarren, add header to clock/ instead of clk/ to match binding location] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-28ARM: tegra30: create a DT header defining CLK IDsHiroshi Doyu1-0/+265
Create a header file to define the clock IDs used by the Tegra30 clock binding. Remove the list of definitions from the binding documentation, and refer the reader to the header file. This will allow the same header to be used by both device tree files, and drivers implementing this binding, which guarantees that the two stay in sync. This also makes device trees more readable by using names instead of magic numbers. Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> [swarren, add header to clock/ instead of clk/ to match binding location] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-28ARM: tegra20: create a DT header defining CLK IDsHiroshi Doyu1-0/+158
Create a header file to define the clock IDs used by the Tegra20 clock binding. Remove the list of definitions from the binding documentation, and refer the reader to the header file. This will allow the same header to be used by both device tree files, and drivers implementing this binding, which guarantees that the two stay in sync. This also makes device trees more readable by using names instead of magic numbers. Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> [swarren, add header to clock/ instead of clk/ to match binding location] Signed-off-by: Stephen Warren <swarren@nvidia.com>
Copyright © 1996 – 2026 Jason A. Donenfeld. All Rights Reverse Engineered.