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2016-07-15Revert "clk: gxbb: expose CLKID_MMC_PCLK"Michael Turquette1-1/+0
This reverts commit e16fb2e6355c1c1b41623af9e01ada196e2af098. Updated documentation from the chip vendor reveals that this clock is not required for correct operation of the MMC controller. As such, do not expose it to DT. Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2016-07-15ARM: dts: r8a7792: remove ADSP clockSergei Shtylyov1-1/+0
Simon Horman told me that R8A7792 has ADSP clock based on an incorrect table in the most recent R-Car gen2 manual. But when I received that manual I discovered that this is false: R8A7792 is the only Gen 2 SoC that doesn't have ADSP at all. Accordingly remove the ADSP clock from DT for the r8a7792. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-07-14Merge tag 'sti-late-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti into next/lateArnd Bergmann1-0/+4
Merge "STi late updates for v4.8" from Patrice Chotard: - Add STi DT critical clocks declaration - Remove SPI hack wich has dependecy with critical clocks These 2 STi DT patches and SPI hack MUST be applied after patches contained into Stephen Boyd's branch clk-next/clk-st-critical. This to ensure not to break SPI. * tag 'sti-late-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti: spi: st-ssc4: Remove 'no clocking' hack ARM: sti: stih410-clocks: Identify critical clocks ARM: sti: stih407-family: Supply defines for CLOCKGEN A0 clk: st: clkgen-pll: Detect critical clocks clk: st: clkgen-fsyn: Detect critical clocks clk: st: clk-flexgen: Detect critical clocks
2016-07-14Merge branch 'reset/for-4.8-2' into next/dtArnd Bergmann2-0/+385
Merging this in avoids a build error that was missed earlier: In file included from ../arch/arm/boot/dts/meson8b-mxq.dts:48:0: ../arch/arm/boot/dts/meson8b.dtsi:49:53: fatal error: dt-bindings/reset/amlogic,meson8b-reset.h: No such file or directory * reset/for-4.8-2: dt-bindings: reset: Add bindings for the Meson SoC Reset Controller reset: Add support for the Amlogic Meson SoC Reset Controller reset: Return -ENOTSUPP when not configured reset: oxnas: Use devm register API and get rid of platform remove reset: fix Kconfig menu to include reset drivers in sub-menu reset: zynq: use devm_reset_controller_register() reset: socfpga: use devm_reset_controller_register() reset: sunxi: use devm_reset_controller_register() reset: pistachio: use devm_reset_controller_register() reset: ath79: use devm_reset_controller_register() reset: add devm_reset_controller_register API
2016-07-12ARM: sti: stih407-family: Supply defines for CLOCKGEN A0Lee Jones1-0/+4
There are 2 LMI clocks generated by CLOCKGEN A0. We wish to control them individually and need to use these indexes to do so. Signed-off-by: Lee Jones <lee.jones@linaro.org>
2016-07-08Merge branch 'clk-sunxi-ng' into clk-nextMichael Turquette2-0/+248
2016-07-08clk: sunxi-ng: Add H3 clocksMaxime Ripard2-0/+248
Add the list of clocks and resets found in the H3 CCU. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-14-maxime.ripard@free-electrons.com
2016-07-07Merge branch 'clk-s905' into clk-nextMichael Turquette1-0/+1
2016-07-07clk: gxbb: expose CLKID_MMC_PCLKKevin Hilman1-0/+1
The MMC_PCLK is needed for the SD/eMMC driver, expose to DT (and comment out in clk driver) Signed-off-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160707033837.20029-1-khilman@baylibre.com
2016-07-07Merge tag 'reset-for-4.8-3' of git://git.pengutronix.de/git/pza/linux into next/driversArnd Bergmann2-0/+46
Merge "Reset controller changes for v4.8, part 3" from Philipp Zabel: - change request API to be more explicit about the difference between exclusive and shared resets (the former guarantee the reset line is asserted immediately when reset_control_assert is called, the latter are refcounted and do not guarantee this). - add Hisilicon hi6220 media subsystem reset controller support - add TI SYSCON based reset controller support * tag 'reset-for-4.8-3' of git://git.pengutronix.de/git/pza/linux: reset: add TI SYSCON based reset driver Documentation: dt: reset: Add TI syscon reset binding reset: hisilicon: Add hi6220 media subsystem reset support reset: hisilicon: Change to syscon register access arm64: dts: hi6220: Add media subsystem reset dts reset: hisilicon: Add media reset controller binding reset: TRIVIAL: Add line break at same place for similar APIs reset: Supply *_shared variant calls when using *_optional APIs reset: Supply *_shared variant calls when using of_* API reset: Ensure drivers are explicit when requesting reset lines reset: Reorder inline reset_control_get*() wrappers
2016-07-06Merge tag 'v4.8-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dtOlof Johansson1-0/+15
Audio support and spi-flash on rk3288-veyron Chromedevices as well as i2s and ethernet support on rk3228/rk3229 devices and a dts file for the rk3229 eval board. * tag 'v4.8-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: ARM: dts: rockchip: add support rk3229 evb board ARM: dts: rockchip: add GMAC nodes for RK322x SoCs ARM: dts: rockchip: add i2s nodes for RK322x SoCs ARM: dts: rockchip: rename rk3228.dtsi to rk322x.dtsi clk: rockchip: add clock-ids for rk3228 MAC clocks clk: rockchip: add clock-ids for rk3228 audio clocks ARM: dts: rockchip: rename i2s model for Veyron devices ARM: dts: rockchip: move rk3288 io-domain nodes to the grf ARM: dts: rockchip: Enable analog audio on rk3288-veyron chromebooks ARM: dts: rockchip: Add shared file for audio on rk3288-veyron boards ARM: dts: rockchip: add SPI flash node for rk3288-veyron Signed-off-by: Olof Johansson <olof@lixom.net>
2016-07-06Merge tag 'renesas-dt2-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dtOlof Johansson2-0/+129
Second Round of Renesas ARM Based SoC DT Updates for v4.8 * Use APMU on R-Car Gen2 and provide SMP for r8a7793 SoC * Update console parameters to uniformly use chosen/stdout-path, serial0, not provide kernel unnecessary command line parameters * Add DU pins to silk board * Add support for blanche/r8a7792 * Name pfc subnodes after device name * tag 'renesas-dt2-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (41 commits) ARM: dts: r8a7792: add SMP support ARM: dts: r8a7793: Add APMU node and second CPU core ARM: dts: r8a7791: Add APMU node ARM: dts: r8a7790: Add APMU nodes devicetree: bindings: Renesas APMU and SMP Enable method ARM: dts: kzm9g: Update console parameters ARM: dts: kzm9d: Update console parameters ARM: dts: marzen: Add serial port config to chosen/stdout-path ARM: dts: genmai: Update console parameters ARM: dts: armadillo800eva: Update console parameters ARM: dts: r8a7792: add JPU support ARM: dts: r8a7792: add JPU clocks ARM: dts: silk: add DU pins ARM: dts: blanche: add Ethernet support ARM: dts: blanche: initial device tree ARM: dts: blanche: document Blanche board ARM: dts: r8a7792: add IRQC support ARM: dts: r8a7792: add [H]SCIF support ARM: dts: r8a7792: add SYS-DMAC support ARM: dts: r8a7792: initial SoC device tree ... Signed-off-by: Olof Johansson <olof@lixom.net>
2016-07-06Merge branch 'clk-lpc32xx' into clk-nextMichael Turquette1-0/+1
2016-07-06clk: lpc32xx: allow peripheral clock selection in device treeSylvain Lemieux1-0/+1
This patch add the support to select the peripheral clock (PERIPH) as a parent clock source using the "assigned-clock-parents" parameter in the device tree. Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com> Acked-by: Vladimir Zapolskiy <vz@mleia.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/1464982475-24738-1-git-send-email-slemieux.tyco@gmail.com
2016-07-05includes: dt-bindings: Add STM32F746 pinctrl DT bindingsAlexandre TORGUE1-0/+1324
Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com> Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-07-04Merge tag 'keystone_dts_for_4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into next/dtOlof Johansson1-0/+39
ARM: Keystone DTS update for 4.8 - Pinmux entries for K2G - PCI DTS entry fixup * tag 'keystone_dts_for_4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone: ARM: dts: k2g-evm: Add pinmuxing for UART0 ARM: dts: keystone: Header file for pinctrl constants ARM: dts: k2g: Add pinctrl support ARM: dts: keystone-k2l: Add pinctrl node ARM: dts: keystone: add interrupt property to PCI controller bindings ARM: dts: keystone: remove bogus IO resource entry from PCI binding Signed-off-by: Olof Johansson <olof@lixom.net>
2016-07-01Merge tag 'v4.8-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-nextStephen Boyd1-0/+15
Pull rockchip clk driver updates from Heiko Stuebner: Placeholder for the rk3399 watchdog pclk, some newly exported rk3228 clockids and a small fix for the not yet used spdif to displayport clock on the rk3399. * tag 'v4.8-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: clk: rockchip: fix incorrect rk3399 spdif-DPTX divider bits clk: rockchip: export rk3228 MAC clocks clk: rockchip: rename rk3228 sclk_macphy_50m to sclk_mac_extclk clk: rockchip: export rk3228 audio clocks clk: rockchip: include rk3228 downstream muxes into fractional dividers clk: rockchip: fix incorrect rk3228 clock registers clk: rockchip: add clock-ids for rk3228 MAC clocks clk: rockchip: add clock-ids for rk3228 audio clocks clk: rockchip: add a dummy clock for the watchdog pclk on rk3399
2016-07-01Merge tag 'tegra-for-4.8-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into clk-nextStephen Boyd1-1/+1
Pull tegra clk driver updates from Thierry Reding: Fixes and enhancements mostly for Tegra210 clocks that allow DSI and HDMI to work on Tegra X1. There's also a refactoring, including fixes, the USB PLL. * tag 'tegra-for-4.8-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: clk: tegra: Initialize UTMI PLL when enabling PLLU clk: tegra: Micro-optimize Tegra210 clock setup clk: tegra: Make sor_safe the parent of dpaux and dpaux1 clk: tegra: Mark timer clock as critical clk: tegra: Enable sor1 and sor1_src on Tegra210 clk: tegra: Squash sor1 safe/brick/src into a single mux clk: tegra: Disable spread spectrum on pll_d2 clk: tegra: Fixup post dividers on Tegra210
2016-06-30Merge branch 'clk-hi6220-rtc' into clk-nextStephen Boyd1-2/+3
* clk-hi6220-rtc: clk: hi6220: Add RTC clock for pl031
2016-06-30clk: hi6220: Add RTC clock for pl031Zhangfei Gao1-2/+3
Adds clk support for the pl031 RTC on hi6220 Cc: Michael Turquette <mturquette@baylibre.com> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Wei Xu <xuwei5@hisilicon.com> Cc: Guodong Xu <guodong.xu@linaro.org> Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org> [jstultz: Forward ported, tweaked commit description] Signed-off-by: John Stultz <john.stultz@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-06-29Documentation: dt: reset: Add TI syscon reset bindingAndrew F. Davis1-0/+38
Add TI syscon reset controller binding. This will hook to the reset framework and use syscon/regmap to set reset bits. This allows reset control of individual SoC subsytems and devices with memory-mapped reset registers in a common register memory space. Signed-off-by: Andrew F. Davis <afd@ti.com> Signed-off-by: Suman Anna <s-anna@ti.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2016-06-29arm64: dts: hi6220: Add media subsystem reset dtsXinliang Liu1-0/+8
Add media subsystem reset dts support. Signed-off-by: Chen Feng <puck.chen@hisilicon.com> Signed-off-by: Xinliang Liu <xinliang.liu@linaro.org> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2016-06-28Merge tag 'clk-renesas-for-v4.8-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-nextStephen Boyd1-0/+69
Pull support for Renesas R-car M3-W from Geert Uytterhoeven: Add initial support for the Clock Pulse Generator and Module Standby and Software Reset modules on the Renesas R-Car M3-W SoC: - Basic core clocks, - SCIF2 (console) module clock, - INTC-AP (GIC) module clock. * tag 'clk-renesas-for-v4.8-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers: clk: renesas: cpg-mssr: Add support for R-Car M3-W clk: renesas: cpg-mssr: Extract common R-Car Gen3 support code clk: renesas: Add r8a7796 CPG Core Clock Definitions clk: renesas: cpg-mssr: Document r8a7796 support
2016-06-24ARM: dts: r8a7792: add JPU clocksSergei Shtylyov1-0/+1
Add JPU clock and its parent, M2 clock to the R8A7792 device tree. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-06-22Merge remote-tracking branch 'clk/clk-s905' into clk-nextMichael Turquette2-1/+15
2016-06-22clk: gxbb: add AmLogic GXBB clk controller driverMichael Turquette1-0/+12
The gxbb clock controller is the primary clock generation unit for the AmLogic GXBB SoC. It is clocked by a fixed 24MHz xtal, contains several PLLs and the usual post-dividers, muxes, dividers and leaf gates that are fed into various IP blocks in the SoC. Tested-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2016-06-22clk: meson8b: clean up composite clocksMichael Turquette1-1/+3
Remove the composite clock registration function and helpers. Replace unnecessary configuration struct with static initialization of the desired clock type. To preserve git bisect this patch also flips the switch and starts using of_clk_add_hw_provider instead of the deprecated meson_clk_register_clks method. As a byproduct clk.c can be deleted. Tested-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2016-06-22clk: rockchip: add clock-ids for rk3228 MAC clocksXing Zheng1-0/+11
This patch exports related MAC clocks for dts reference. Signed-off-by: Xing Zheng <zhengxing@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-06-22clk: rockchip: add clock-ids for rk3228 audio clocksXing Zheng1-0/+4
This patch exports related i2s/spdif clocks for dts reference. Signed-off-by: Xing Zheng <zhengxing@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-06-21dt-bindings: mediatek: add descriptions for mediatek mt2701 iommu and smiHonghui Zhang1-0/+85
This patch defines the local arbitor port IDs for mediatek SoC MT2701 and add descriptions of binding for mediatek generation one iommu and smi. Signed-off-by: Honghui Zhang <honghui.zhang@mediatek.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Joerg Roedel <jroedel@suse.de>
2016-06-20leds: pca9532: Add device tree supportPhil Reid1-0/+18
This patch adds basic device tree support for the pca9532 LEDs. Signed-off-by: Phil Reid <preid@electromag.com.au> Signed-off-by: Jacek Anaszewski <j.anaszewski@samsung.com>
2016-06-17clk: tegra: Enable sor1 and sor1_src on Tegra210Thierry Reding1-1/+1
Make the sor1 and sor1_src clocks available on Tegra210. They will be used by the display driver to support HDMI and DP. Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-06-16ARM: dts: r8a7792: add power domain index macrosSergei Shtylyov1-0/+26
Add macros usable by the device tree sources to reference R8A7792 SYSC power domains by index. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-06-16ARM: dts: r8a7792: add clock index macrosSergei Shtylyov1-0/+102
Add macros usable by the device tree sources to reference the R8A7792 clocks by index. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-06-14Merge tag 'reset-for-4.8-2' of git://git.pengutronix.de/git/pza/linux into next/driversOlof Johansson2-0/+385
Reset controller changes for v4.8, part 2 - add Amlogic Meson SoC Reset Controller driver * tag 'reset-for-4.8-2' of git://git.pengutronix.de/git/pza/linux: dt-bindings: reset: Add bindings for the Meson SoC Reset Controller reset: Add support for the Amlogic Meson SoC Reset Controller Signed-off-by: Olof Johansson <olof@lixom.net>
2016-06-13Merge tag 'renesas-dt-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dtOlof Johansson1-1/+0
Renesas ARM Based SoC DT Updates for v4.8 * Fix W=1 dtc warnings * Reverence both DMA controllers on R-Car Gen 2 SoCs * Remove nonexistent thermal sensor clock from r8a7794 SoC * Correct unit names for cpu nodes on r8a7790 SoC * Add MMCIF0 to r8a7793 SoC * RTS/CTS hardware flow control for kzm9g and bockw boards * tag 'renesas-dt-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (30 commits) ARM: dts: silk: Fix W=1 dtc warnings ARM: dts: porter: Fix W=1 dtc warnings ARM: dts: marzen: Fix W=1 dtc warnings ARM: dts: lager: Fix W=1 dtc warnings ARM: dts: kzm9g: Fix W=1 dtc warnings ARM: dts: kzm9d: Fix W=1 dtc warnings ARM: dts: koelsch: Fix W=1 dtc warnings ARM: dts: gose: Fix W=1 dtc warnings ARM: dts: genmai: Fix W=1 dtc warnings ARM: dts: bockw: Fix W=1 dtc warnings ARM: dts: armadillo800eva: Fix W=1 dtc warnings ARM: dts: ape6evm: Fix W=1 dtc warnings ARM: dts: sh73a0: Fix W=1 dtc warnings ARM: dts: r8a7794: Fix W=1 dtc warnings ARM: dts: r8a7793: Fix W=1 dtc warnings ARM: dts: r8a7791: Fix W=1 dtc warnings ARM: dts: r8a7790: Fix W=1 dtc warnings ARM: dts: r8a7778: Fix W=1 dtc warnings ARM: dts: r8a7740: Fix W=1 dtc warnings ARM: dts: r8a73a4: Fix W=1 dtc warnings ... Signed-off-by: Olof Johansson <olof@lixom.net>
2016-06-10clk: samsung: exynos5433: Add CLK_IGNORE_UNUSED flag to PCIE deviceJaehoon Chung1-1/+2
This patch adds the CLK_IGNORE_UNUSED flag for PCI Express's clocks which need to remain enabled. The 'pcie' gate clock definition is also added. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> [s.nawrocki@samsung.com: edited the patch's summary] Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2016-06-09ARM: dts: keystone: Header file for pinctrl constantsLokesh Vutla1-0/+39
The pinctrl IP used in some of the Keystone 2 devices differ vs other TI SoCs. Therefore, create a Keystone specific pinctrl header. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
2016-06-06clk: renesas: Add r8a7796 CPG Core Clock DefinitionsGeert Uytterhoeven1-0/+69
Add all R-Car M3-W Clock Pulse Generator Core Clock Outputs, as listed in Table 8.2b ("List of Clocks [R-Car M3-W]") of the R-Car Gen3 datasheet (rev. 0.51 + Errata for Rev051 Mar 31 2016). Note that internal CPG clocks (S0, S1, S2, S3, SDSRC, and SSPSRC) are not included, as they are used as internal clock sources only, and never referenced from DT. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Simon Horman <horms+renesas@verge.net.au>
2016-06-06soc: renesas: Add r8a7796 SYSC PM Domain Binding DefinitionsGeert Uytterhoeven1-0/+36
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-06-02dt-bindings: clock: Add watchdog and SSS clock IDs to Exynos5410Krzysztof Kozlowski1-0/+2
Add IDs for watchdog and Security SubSystem to Exynos5410. Use the same number as for Exynos5420 just in case in future these drivers were merged. Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2016-06-01dt-bindings: clock: Add TMU clock ID to Exynos5410Krzysztof Kozlowski1-0/+1
Add ID for TMU clock to Exynos5410. Use the same number as for Exynos5420 just in case in future these drivers were merged. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2016-06-01dt-bindings: reset: Add bindings for the Meson SoC Reset ControllerNeil Armstrong2-0/+385
Add DT bindings for the Meson SoC Reset Controller documentation and the associated include file. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2016-05-30dt-bindings: clock: Add I2C, HSI2C and RTC clock IDs to Exynos5410Krzysztof Kozlowski1-0/+9
Add IDs for I2C, USI (HSI2C) and RTC clocks to Exynos5410. Use the same number as for Exynos5420 just in case in future these drivers are merged. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2016-05-30dt-bindings: clock: Add PWM and USB clock IDs to Exynos5410Krzysztof Kozlowski1-0/+10
Add IDs for PWM and USB clocks to Exynos5410. Use the same number as for Exynos5420 just in case in future these drivers were merged. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2016-05-30dt-bindings: clock: Add license and reformat Exynos5410 clock IDsKrzysztof Kozlowski1-22/+32
Add license and copyrights (file introduced in 2014) to header with Exynos5410 clock IDs. Additionally reformat it to improve readability. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2016-05-30ARM: dts: r8a7794: Remove nonexistent thermal sensor clockGeert Uytterhoeven1-1/+0
According to the latest information, there is no thermal IP block present on the r8a7794 SoC. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-05-26Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linuxLinus Torvalds1-0/+1
Pull thermal management updates from Zhang Rui: - Introduce generic ADC thermal driver, based on OF thermal (Laxman Dewangan) - Introduce new thermal driver for Tango chips (Marc Gonzalez) - Rockchip driver support for RK3399, RK3366, and some fixes (Caesar Wang, Elaine Zhang and Shawn Lin) - Add CPU power cooling model to Mediatek thermal driver (Dawei Chien) - Wider usage of dev_thermal_zone_of_sensor_register (Eduardo Valentin) - TI thermal driver gained a new maintainer (Keerthy). - Enabled powerclamp driver by checking CPU feature and package cstate counter instead of CPU whitelist (Jacob Pan) - Various fixes on thermal governor, OF thermal, Tegra, and RCAR * 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux: (50 commits) thermal: tango: initialize TEMPSI_CFG thermal: rockchip: use the usleep_range instead of udelay thermal: rockchip: add the notes for better reading thermal: rockchip: Support RK3366 SoCs in the thermal driver thermal: rockchip: handle the power sequence for tsadc controller thermal: rockchip: update the tsadc table for rk3399 thermal: rockchip: fixes the code_to_temp for tsadc driver thermal: rockchip: disable thermal->clk in err case thermal: tegra: add Tegra132 specific SOC_THERM driver thermal: fix ptr_ret.cocci warnings thermal: mediatek: Add cpu dynamic power cooling model. thermal: generic-adc: Add ADC based thermal sensor driver thermal: generic-adc: Add DT binding for ADC based thermal sensor thermal: tegra: fix static checker warning thermal: tegra: mark PM functions __maybe_unused thermal: add temperature sensor support for tango SoC thermal: hisilicon: fix IRQ imbalance enabling thermal: hisilicon: support to use any sensor thermal: rcar: Remove binding docs for r8a7794 thermal: tegra: add PM support ...
2016-05-23Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linuxLinus Torvalds1-1/+2
Pull drm updates from Dave Airlie: "Here's the main drm pull request for 4.7, it's been a busy one, and I've been a bit more distracted in real life this merge window. Lots more ARM drivers, not sure if it'll ever end. I think I've at least one more coming the next merge window. But changes are all over the place, support for AMD Polaris GPUs is in here, some missing GM108 support for nouveau (found in some Lenovos), a bunch of MST and skylake fixes. I've also noticed a few fixes from Arnd in my inbox, that I'll try and get in asap, but I didn't think they should hold this up. New drivers: - Hisilicon kirin display driver - Mediatek MT8173 display driver - ARC PGU - bitstreamer on Synopsys ARC SDP boards - Allwinner A13 initial RGB output driver - Analogix driver for DisplayPort IP found in exynos and rockchip DRM Core: - UAPI headers fixes and C++ safety - DRM connector reference counting - DisplayID mode parsing for Dell 5K monitors - Removal of struct_mutex from drivers - Connector registration cleanups - MST robustness fixes - MAINTAINERS updates - Lockless GEM object freeing - Generic fbdev deferred IO support panel: - Support for a bunch of new panels i915: - VBT refactoring - PLL computation cleanups - DSI support for BXT - Color manager support - More atomic patches - GEM improvements - GuC fw loading fixes - DP detection fixes - SKL GPU hang fixes - Lots of BXT fixes radeon/amdgpu: - Initial Polaris support - GPUVM/Scheduler/Clock/Power improvements - ASYNC pageflip support - New mesa feature support nouveau: - GM108 support - Power sensor support improvements - GR init + ucode fixes. - Use GPU provided topology information vmwgfx: - Add host messaging support gma500: - Some cleanups and fixes atmel: - Bridge support - Async atomic commit support fsl-dcu: - Timing controller for LCD support - Pixel clock polarity support rcar-du: - Misc fixes exynos: - Pipeline clock support - Exynoss4533 SoC support - HW trigger mode support - export HDMI_PHY clock - DECON5433 fixes - Use generic prime functions - use DMA mapping APIs rockchip: - Lots of little fixes vc4: - Render node support - Gamma ramp support - DPI output support msm: - Mostly cleanups and fixes - Conversion to generic struct fence etnaviv: - Fix for prime buffer handling - Allow hangcheck to be coalesced with other wakeups tegra: - Gamme table size fix" * 'drm-next' of git://people.freedesktop.org/~airlied/linux: (1050 commits) drm/edid: add displayid detailed 1 timings to the modelist. (v1.1) drm/edid: move displayid validation to it's own function. drm/displayid: Iterate over all DisplayID blocks drm/edid: move displayid tiled block parsing into separate function. drm: Nuke ->vblank_disable_allowed drm/vmwgfx: Report vmwgfx version to vmware.log drm/vmwgfx: Add VMWare host messaging capability drm/vmwgfx: Kill some lockdep warnings drm/nouveau/gr/gf100-: fix race condition in fecs/gpccs ucode drm/nouveau/core: recognise GM108 chipsets drm/nouveau/gr/gm107-: fix touching non-existent ppcs in attrib cb setup drm/nouveau/gr/gk104-: share implementation of ppc exception init drm/nouveau/gr/gk104-: move rop_active_fbps init to nonctx drm/nouveau/bios/pll: check BIT table version before trying to parse it drm/nouveau/bios/pll: prevent oops when limits table can't be parsed drm/nouveau/volt/gk104: round up in gk104_volt_set drm/nouveau/fb/gm200: setup mmu debug buffer registers at init() drm/nouveau/fb/gk20a,gm20b: setup mmu debug buffer registers at init() drm/nouveau/fb/gf100-: allocate mmu debug buffers drm/nouveau/fb: allow chipset-specific actions for oneinit() ...
2016-05-20Merge tag 'staging-4.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/stagingLinus Torvalds1-0/+16
Pull staging and IIO driver updates from Greg KH: "Here's the big staging and iio driver update for 4.7-rc1. I think we almost broke even with this release, only adding a few more lines than we removed, which isn't bad overall given that there's a bunch of new iio drivers added. The Lustre developers seem to have woken up from their sleep and have been doing a great job in cleaning up the code and pruning unused or old cruft, the filesystem is almost readable :) Other than that, just a lot of basic coding style cleanups in the churn. All have been in linux-next for a while with no reported issues" * tag 'staging-4.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging: (938 commits) Staging: emxx_udc: emxx_udc: fixed coding style issue staging/gdm724x: fix "alignment should match open parenthesis" issues staging/gdm724x: Fix avoid CamelCase staging: unisys: rename misleading var ii with frag staging: unisys: visorhba: switch success handling to error handling staging: unisys: visorhba: main path needs to flow down the left margin staging: unisys: visorinput: handle_locking_key() simplifications staging: unisys: visorhba: fail gracefully for thread creation failures staging: unisys: visornic: comment restructuring and removing bad diction staging: unisys: fix format string %Lx to %llx for u64 staging: unisys: remove unused struct members staging: unisys: visorchannel: correct variable misspelling staging: unisys: visorhba: replace functionlike macro with function staging: dgnc: Need to check for NULL of ch staging: dgnc: remove redundant condition check staging: dgnc: fix 'line over 80 characters' staging: dgnc: clean up the dgnc_get_modem_info() staging: lustre: lnet: enable configuration per NI interface staging: lustre: o2iblnd: properly set ibr_why staging: lustre: o2iblnd: remove last of kiblnd_tunables_fini ...
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