| Age | Commit message (Collapse) | Author | Files | Lines |
|---|
|
This patch updated Kconfig for langwell otg transceiver driver.
Add ipc driver(INTEL_SCU_IPC) as a dependency. Driver version is
updated too.
Signed-off-by: Hao Wu <hao.wu@intel.com>
Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
|
|
This adds support for the USB transceiver driver in the Langwell chipset used
on the Intel MID platforms. It folds up the original patch set which includes
basic support for the device, PHY low power mode (Please notice that there is
a limitation, after we drive VBus down, 2ms delay is required from SCU FW to
sync up OTGSC register with USBCFG register), software timers (the hardware
timers do not work in low power mode), HNP, SRP.
Signed-off-by: Hao Wu <hao.wu@intel.com>
Signed-off-by: Alek Du <alek.du@intel.com>
Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
|
|
This reverts commit 453f77558810ffa669ed5a510a7173ec49def396.
The driver should not have been accepted as the MSRT code is not
in the main kernel yet, which this depends on.
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
Cc: Hao Wu <hao.wu@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
|
|
Description:
This driver is used for Intel Langwell* USB OTG controller in Intel
Moorestown* platform. It tries to implement host/device role switch
according to OTG spec. The actual hsot and device functions are
accomplished in modified EHCI driver and Intel Langwell USB OTG client
controller driver.
* Langwell and Moorestown are names used in development. They are not
approved official name.
Note:
This patch is the first version Intel Langwell USB OTG Transceiver
driver. The development is not finished, and the bug fixing is on going
for some hardware and software issues. The main purpose of this
submission is for code view.
Supported features:
- Data-line Pulsing SRP
- Support HNP to switch roles
- PCI D0/D3 power management support
Known issues:
- HNP is only tested with another Moorestown platform.
- PCI D0/D3 power management support is not fully tested.
- VBus Pulsing SRP is not support in current version.
Signed-off-by: Hao Wu <hao.wu@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
|
Hao Wu
Greg Kroah-Hartman