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2019-06-12gpio: omap: constify register tablesRussell King1-1/+1
We must never alter the register tables; these are read-only as far as the driver is concerned. Constify these tables. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-06-12iommu: Introduce IOMMU_RESV_DIRECT_RELAXABLE reserved memory regionsEric Auger1-0/+6
Introduce a new type for reserved region. This corresponds to directly mapped regions which are known to be relaxable in some specific conditions, such as device assignment use case. Well known examples are those used by USB controllers providing PS/2 keyboard emulation for pre-boot BIOS and early BOOT or RMRRs associated to IGD working in legacy mode. Since commit c875d2c1b808 ("iommu/vt-d: Exclude devices using RMRRs from IOMMU API domains") and commit 18436afdc11a ("iommu/vt-d: Allow RMRR on graphics devices too"), those regions are currently considered "safe" with respect to device assignment use case which requires a non direct mapping at IOMMU physical level (RAM GPA -> HPA mapping). Those RMRRs currently exist and sometimes the device is attempting to access it but this has not been considered an issue until now. However at the moment, iommu_get_group_resv_regions() is not able to make any difference between directly mapped regions: those which must be absolutely enforced and those like above ones which are known as relaxable. This is a blocker for reporting severe conflicts between non relaxable RMRRs (like MSI doorbells) and guest GPA space. With this new reserved region type we will be able to use iommu_get_group_resv_regions() to enumerate the IOVA space that is usable through the IOMMU API without introducing regressions with respect to existing device assignment use cases (USB and IGD). Signed-off-by: Eric Auger <eric.auger@redhat.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
2019-06-12iommu: Add recoverable fault reportingJean-Philippe Brucker1-0/+19
Some IOMMU hardware features, for example PCI PRI and Arm SMMU Stall, enable recoverable I/O page faults. Allow IOMMU drivers to report PRI Page Requests and Stall events through the new fault reporting API. The consumer of the fault can be either an I/O page fault handler in the host, or a guest OS. Once handled, the fault must be completed by sending a page response back to the IOMMU. Add an iommu_page_response() function to complete a page fault. There are two ways to extend the userspace API: * Add a field to iommu_page_response and a flag to iommu_page_response::flags describing the validity of this field. * Introduce a new iommu_page_response_X structure with a different version number. The kernel must then support both versions. Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com> Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
2019-06-12iommu: Introduce device fault report APIJacob Pan1-0/+29
Traditionally, device specific faults are detected and handled within their own device drivers. When IOMMU is enabled, faults such as DMA related transactions are detected by IOMMU. There is no generic reporting mechanism to report faults back to the in-kernel device driver or the guest OS in case of assigned devices. This patch introduces a registration API for device specific fault handlers. This differs from the existing iommu_set_fault_handler/ report_iommu_fault infrastructures in several ways: - it allows to report more sophisticated fault events (both unrecoverable faults and page request faults) due to the nature of the iommu_fault struct - it is device specific and not domain specific. The current iommu_report_device_fault() implementation only handles the "shoot and forget" unrecoverable fault case. Handling of page request faults or stalled faults will come later. Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com> Signed-off-by: Ashok Raj <ashok.raj@intel.com> Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com> Signed-off-by: Eric Auger <eric.auger@redhat.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
2019-06-12iommu: Introduce device fault dataJacob Pan1-0/+39
Device faults detected by IOMMU can be reported outside the IOMMU subsystem for further processing. This patch introduces a generic device fault data structure. The fault can be either an unrecoverable fault or a page request, also referred to as a recoverable fault. We only care about non internal faults that are likely to be reported to an external subsystem. Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com> Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com> Signed-off-by: Liu, Yi L <yi.l.liu@linux.intel.com> Signed-off-by: Ashok Raj <ashok.raj@intel.com> Signed-off-by: Eric Auger <eric.auger@redhat.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
2019-06-12driver core: Add per device iommu paramJacob Pan1-0/+3
DMA faults can be detected by IOMMU at device level. Adding a pointer to struct device allows IOMMU subsystem to report relevant faults back to the device driver for further handling. For direct assigned device (or user space drivers), guest OS holds responsibility to handle and respond per device IOMMU fault. Therefore we need fault reporting mechanism to propagate faults beyond IOMMU subsystem. There are two other IOMMU data pointers under struct device today, here we introduce iommu_param as a parent pointer such that all device IOMMU data can be consolidated here. The idea was suggested here by Greg KH and Joerg. The name iommu_param is chosen here since iommu_data has been used. Suggested-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com> Link: https://lkml.org/lkml/2017/10/6/81 Signed-off-by: Joerg Roedel <jroedel@suse.de>
2019-06-12pinctrl: remove unused pin_is_valid()Masahiro Yamada1-10/+0
This function was used by pin_request() to pointlessly double-check the pin validity, and it was the only user ever. Since commit d2f6a1c6fb0e ("pinctrl: remove double pin validity check."), no one has ever used it. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-06-11irqchip/gic-v2m: Add support for Amazon Graviton variant of GICv3+GICv2mZeev Zilberman2-3/+5
Add support for Amazon Graviton custom variant of GICv2m, where the message is encoded using the MSI message address, as opposed to standard GICv2m, where the SPI number is encoded in the MSI message data. In addition, the Graviton flavor of GICv2m is used along GICv3 (and not GICv2). Co-developed-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Zeev Zilberman <zeev@amazon.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2019-06-10bpf: Allow bpf_map_lookup_elem() on an xskmapJonathan Lemon1-0/+8
Currently, the AF_XDP code uses a separate map in order to determine if an xsk is bound to a queue. Instead of doing this, have bpf_map_lookup_elem() return a xdp_sock. Rearrange some xdp_sock members to eliminate structure holes. Remove selftest - will be added back in later patch. Signed-off-by: Jonathan Lemon <jonathan.lemon@gmail.com> Acked-by: Martin KaFai Lau <kafai@fb.com> Signed-off-by: Alexei Starovoitov <ast@kernel.org>
2019-06-10Merge tag 'v5.2-rc4' into spi-5.3Mark Brown616-4994/+755
Linux 5.2-rc4
2019-06-10fmc: Decouple from Linux GPIO subsystemLinus Walleij1-8/+10
FMC has its own GPIO handling, the inclusion of <linux/gpio.h> is only to reuse some flags that we can just as well provide using local defines. Cc: Federico Vaga <federico.vaga@cern.ch> Cc: Pat Riehecky <riehecky@fnal.gov> Acked-by: Alessandro Rubini <rubini@gnudd.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-06-10mm/hmm: Hold a mmgrab from hmm to mmJason Gunthorpe1-3/+0
So long as a struct hmm pointer exists, so should the struct mm it is linked too. Hold the mmgrab() as soon as a hmm is created, and mmdrop() it once the hmm refcount goes to zero. Since mmdrop() (ie a 0 kref on struct mm) is now impossible with a !NULL mm->hmm delete the hmm_hmm_destroy(). Signed-off-by: Jason Gunthorpe <jgg@mellanox.com> Reviewed-by: Jérôme Glisse <jglisse@redhat.com> Reviewed-by: John Hubbard <jhubbard@nvidia.com> Reviewed-by: Ralph Campbell <rcampbell@nvidia.com> Reviewed-by: Ira Weiny <ira.weiny@intel.com> Reviewed-by: Christoph Hellwig <hch@lst.de> Tested-by: Philip Yang <Philip.Yang@amd.com>
2019-06-10mm/hmm: Use hmm_mirror not mm as an argument for hmm_range_registerJason Gunthorpe1-3/+4
Ralph observes that hmm_range_register() can only be called by a driver while a mirror is registered. Make this clear in the API by passing in the mirror structure as a parameter. This also simplifies understanding the lifetime model for struct hmm, as the hmm pointer must be valid as part of a registered mirror so all we need in hmm_register_range() is a simple kref_get. Suggested-by: Ralph Campbell <rcampbell@nvidia.com> Signed-off-by: Jason Gunthorpe <jgg@mellanox.com> Reviewed-by: John Hubbard <jhubbard@nvidia.com> Reviewed-by: Ralph Campbell <rcampbell@nvidia.com> Reviewed-by: Ira Weiny <ira.weiny@intel.com> Reviewed-by: Christoph Hellwig <hch@lst.de> Tested-by: Philip Yang <Philip.Yang@amd.com>
2019-06-10bus: ti-sysc: Add support for module specific reset quirksTony Lindgren1-0/+3
Some older interconnect target modules need module internal clock toggling quirks to reset properly. We've been doing this in the platform code earlier, but need to be able to it directly in the ti-sysc driver when we no longer rely on on the platform code. Let's add reset handling for 1-wire, i2c and watchdog. Later on we can add more modules like msdi and dss as they get tested. For dra7 pcie, we should be able to just use the rstctrl reset driver when available. Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-06-10Update my email addressJozsef Kadlecsik5-5/+5
It's better to use my kadlec@netfilter.org email address in the source code. I might not be able to use kadlec@blackhole.kfki.hu in the future. Signed-off-by: Jozsef Kadlecsik <kadlec@netfilter.org> Signed-off-by: Jozsef Kadlecsik <kadlec@blackhole.kfki.hu>
2019-06-10cgroup/bfq: revert bfq.weight symlink changeJens Axboe1-3/+0
There's some discussion on how to do this the best, and Tejun prefers that BFQ just create the file itself instead of having cgroups support a symlink feature. Hence revert commit 54b7b868e826 and 19e9da9e86c4 for 5.2, and this can be done properly for 5.3. Signed-off-by: Jens Axboe <axboe@kernel.dk>
2019-06-10mfd: cros_ec: Update I2S APIGwendal Grignou1-24/+20
Improve I2S API. Rename ec_response_codec_gain into ec_codec_i2s_gain, update caller accordlingly. Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Acked-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Acked-by: Benson Leung <bleung@chromium.org> Reviewed-by: Fabien Lahoudere <fabien.lahoudere@collabora.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-06-10mfd: cros_ec: Add Management API entry pointsGwendal Grignou1-0/+113
Add commands for test and management. Add command space for future development. Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Acked-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Acked-by: Benson Leung <bleung@chromium.org> Reviewed-by: Fabien Lahoudere <fabien.lahoudere@collabora.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-06-10mfd: cros_ec: Add SKU ID and Secure storage APIGwendal Grignou1-0/+107
Add API to store SKU, Cros board information in EC flash memory. Add API to store security data in EC. Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Acked-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Acked-by: Benson Leung <bleung@chromium.org> Reviewed-by: Fabien Lahoudere <fabien.lahoudere@collabora.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-06-10mfd: cros_ec: Add API for rwsigGwendal Grignou1-0/+26
Add command to retrieve signature of image stored in the RW memory slot(s). Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Acked-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Acked-by: Benson Leung <bleung@chromium.org> Reviewed-by: Fabien Lahoudere <fabien.lahoudere@collabora.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-06-10mfd: cros_ec: Add API for Fingerprint supportGwendal Grignou1-0/+228
Add API for fingerprint sensor presented by embedded controller. Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Acked-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Acked-by: Benson Leung <bleung@chromium.org> Reviewed-by: Fabien Lahoudere <fabien.lahoudere@collabora.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-06-10mfd: cros_ec: Add API for Touchpad supportGwendal Grignou1-0/+26
Add API to control touchpad presented by Embedded Controller. Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Acked-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Acked-by: Benson Leung <bleung@chromium.org> Reviewed-by: Fabien Lahoudere <fabien.lahoudere@collabora.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-06-10mfd: cros_ec: Add API for EC-EC communicationGwendal Grignou1-0/+95
Allow EC to talk to other ECs that are not presented to the host. Neeed when EC are present in detachable keyboard. Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Acked-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Acked-by: Benson Leung <bleung@chromium.org> Reviewed-by: Fabien Lahoudere <fabien.lahoudere@collabora.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-06-10mfd: cros_ec: Add I2C passthru protection APIGwendal Grignou1-0/+22
Prevent direct i2c access to device behind EC when not in development mode. Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Acked-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Acked-by: Benson Leung <bleung@chromium.org> Reviewed-by: Fabien Lahoudere <fabien.lahoudere@collabora.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-06-10mfd: cros_ec: Add Smart Battery Firmware update APIGwendal Grignou1-0/+73
Add API to update battery firmware. Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Acked-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Acked-by: Benson Leung <bleung@chromium.org> Reviewed-by: Fabien Lahoudere <fabien.lahoudere@collabora.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-06-10mfd: cros_ec: Add Hibernate APIGwendal Grignou1-2/+70
Add support for controlling hibernation of the Embedded Controller. Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Acked-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Acked-by: Benson Leung <bleung@chromium.org> Reviewed-by: Fabien Lahoudere <fabien.lahoudere@collabora.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-06-10mfd: cros_ec: Add API for keyboard testingGwendal Grignou1-0/+18
Add command to allow keyboard testing in factory. Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Acked-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Acked-by: Benson Leung <bleung@chromium.org> Reviewed-by: Fabien Lahoudere <fabien.lahoudere@collabora.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-06-10mfd: cros_ec: Complete Power and USB PD APIGwendal Grignou1-8/+228
Improve API for USB Powe delivery and power management. Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Acked-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Acked-by: Benson Leung <bleung@chromium.org> Reviewed-by: Fabien Lahoudere <fabien.lahoudere@collabora.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-06-10mfd: cros_ec: Fix temperature APIGwendal Grignou1-7/+57
Improve API to retrieve temperature information. Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Acked-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Acked-by: Benson Leung <bleung@chromium.org> Reviewed-by: Fabien Lahoudere <fabien.lahoudere@collabora.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-06-10mfd: cros_ec: Add fingerprint APIGwendal Grignou1-0/+34
Add support for fingerprint sensors managed by embedded controller. Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Acked-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Acked-by: Benson Leung <bleung@chromium.org> Reviewed-by: Fabien Lahoudere <fabien.lahoudere@collabora.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-06-10mfd: cros_ec: Fix event processing APIGwendal Grignou1-11/+76
Improve API between EC and Host to report events. Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Acked-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Acked-by: Benson Leung <bleung@chromium.org> Reviewed-by: Fabien Lahoudere <fabien.lahoudere@collabora.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-06-10mfd: cros_ec: Complete MEMS sensor APIGwendal Grignou1-58/+406
Add new command for batched mode, add support for more sensors. Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Acked-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Acked-by: Benson Leung <bleung@chromium.org> Reviewed-by: Fabien Lahoudere <fabien.lahoudere@collabora.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-06-10mfd: cros_ec: Add EC transport protocol v4Gwendal Grignou1-2/+141
Introduce a new transport procotol between EC and host. Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Acked-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Acked-by: Benson Leung <bleung@chromium.org> Reviewed-by: Fabien Lahoudere <fabien.lahoudere@collabora.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-06-10mfd: cros_ec: Expand hash APIGwendal Grignou1-2/+9
Improve API to verify EC image signature. Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Acked-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Acked-by: Benson Leung <bleung@chromium.org> Reviewed-by: Fabien Lahoudere <fabien.lahoudere@collabora.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-06-10mfd: cros_ec: Add lightbar v2 APIGwendal Grignou1-4/+120
New API split commands, improve EC command latency. Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Acked-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Acked-by: Benson Leung <bleung@chromium.org> Reviewed-by: Fabien Lahoudere <fabien.lahoudere@collabora.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-06-10mfd: cros_ec: Add PWM_SET_DUTY APIGwendal Grignou1-2/+18
Add API for fan control. Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Acked-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Acked-by: Benson Leung <bleung@chromium.org> Reviewed-by: Fabien Lahoudere <fabien.lahoudere@collabora.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-06-10mfd: cros_ec: Add Flash V2 commands APIGwendal Grignou1-3/+147
Added for supporting larger embedded controller flash. Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Acked-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Acked-by: Benson Leung <bleung@chromium.org> Reviewed-by: Fabien Lahoudere <fabien.lahoudere@collabora.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-06-10mfd: cros_ec: Remove zero-size structsGwendal Grignou1-15/+18
Empty structure size is different between C and C++. To prevent clang warning when compiling this include file in C++ programs, remove empty structures. Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Acked-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Acked-by: Benson Leung <bleung@chromium.org> Reviewed-by: Fabien Lahoudere <fabien.lahoudere@collabora.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-06-10mfd: cros_ec: move HDMI CEC API definitionGwendal Grignou1-73/+75
Move near the end of file. Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Acked-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Acked-by: Benson Leung <bleung@chromium.org> Reviewed-by: Fabien Lahoudere <fabien.lahoudere@collabora.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-06-10mfd: cros_ec: Update ACPI interface definitionGwendal Grignou1-126/+293
Add more fields and improve API when EC presents data through ACPI memory space. Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Acked-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Acked-by: Benson Leung <bleung@chromium.org> Reviewed-by: Fabien Lahoudere <fabien.lahoudere@collabora.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-06-10mfd: cros_ec: use BIT macroGwendal Grignou1-55/+55
Replace (1 << ...) with BIT(). Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Acked-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Acked-by: Benson Leung <bleung@chromium.org> Reviewed-by: Fabien Lahoudere <fabien.lahoudere@collabora.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-06-10mfd: cros_ec: Define commands as 4-digit UPPER CASE hex valuesGwendal Grignou1-99/+136
This change is required for compilation of embedded controller firmware to work properly (See CONFIG_HOSTCMD_SECTION_SORTED). Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Acked-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Acked-by: Benson Leung <bleung@chromium.org> Reviewed-by: Fabien Lahoudere <fabien.lahoudere@collabora.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-06-10mfd: cros_ec: add ec_align macrosGwendal Grignou1-204/+238
To reduce code and improve performance of the embedded controller firmware, pragma __aligned(2) or __aligned(4) are used when alignment to 16 or 32 bit boundary is expected. Define all ec_align to packed when compiling kernel. Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Acked-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Acked-by: Benson Leung <bleung@chromium.org> Reviewed-by: Fabien Lahoudere <fabien.lahoudere@collabora.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-06-10mfd: cros_ec: set comments properlyGwendal Grignou1-25/+40
Fix comments syntax and spelling errors. Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Acked-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Acked-by: Benson Leung <bleung@chromium.org> Reviewed-by: Fabien Lahoudere <fabien.lahoudere@collabora.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-06-10mfd: cros_ec: Zero BUILD_ macroGwendal Grignou1-0/+5
Defined out build macro used when compiling embedded controller firmware. Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Acked-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Acked-by: Benson Leung <bleung@chromium.org> Reviewed-by: Fabien Lahoudere <fabien.lahoudere@collabora.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-06-10mfd: cros_ec: Update license termGwendal Grignou1-15/+5
Update to SPDX-License-Identifier, GPL-2.0 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Acked-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Acked-by: Benson Leung <bleung@chromium.org> Reviewed-by: Fabien Lahoudere <fabien.lahoudere@collabora.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-06-10PCI: Add Synopsys endpoint EDDA Device IDGustavo Pimentel1-0/+1
Create and add Synopsys Endpoint EDDA Device ID to PCI ID list, since this ID is now being use on two different drivers (pci_endpoint_test.ko and dw-edma-pcie.ko). Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Cc: Kishon Vijay Abraham I <kishon@ti.com> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Joao Pinto <jpinto@synopsys.com> Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-06-10dmaengine: Add Synopsys eDMA IP core driverGustavo Pimentel1-0/+47
Add Synopsys PCIe Endpoint eDMA IP core driver to kernel. This IP is generally distributed with Synopsys PCIe Endpoint IP (depends of the use and licensing agreement). This core driver, initializes and configures the eDMA IP using vma-helpers functions and dma-engine subsystem. This driver can be compile as built-in or external module in kernel. To enable this driver just select DW_EDMA option in kernel configuration, however it requires and selects automatically DMA_ENGINE and DMA_VIRTUAL_CHANNELS option too. In order to transfer data from point A to B as fast as possible this IP requires a dedicated memory space containing linked list of elements. All elements of this linked list are continuous and each one describes a data transfer (source and destination addresses, length and a control variable). For the sake of simplicity, lets assume a memory space for channel write 0 which allows about 42 elements. +---------+ | Desc #0 |-+ +---------+ | V +----------+ | Chunk #0 |-+ | CB = 1 | | +----------+ +-----+ +-----------+ +-----+ +----------+ +->| Burst #0 |->| ... |->| Burst #41 |->| llp | | +----------+ +-----+ +-----------+ +-----+ V +----------+ | Chunk #1 |-+ | CB = 0 | | +-----------+ +-----+ +-----------+ +-----+ +----------+ +->| Burst #42 |->| ... |->| Burst #83 |->| llp | | +-----------+ +-----+ +-----------+ +-----+ V +----------+ | Chunk #2 |-+ | CB = 1 | | +-----------+ +-----+ +------------+ +-----+ +----------+ +->| Burst #84 |->| ... |->| Burst #125 |->| llp | | +-----------+ +-----+ +------------+ +-----+ V +----------+ | Chunk #3 |-+ | CB = 0 | | +------------+ +-----+ +------------+ +-----+ +----------+ +->| Burst #126 |->| ... |->| Burst #129 |->| llp | +------------+ +-----+ +------------+ +-----+ Legend: - Linked list, also know as Chunk - Linked list element*, also know as Burst *CB*, also know as Change Bit, it's a control bit (and typically is toggled) that allows to easily identify and differentiate between the current linked list and the previous or the next one. - LLP, is a special element that indicates the end of the linked list element stream also informs that the next CB should be toggle On every last Burst of the Chunk (Burst #41, Burst #83, Burst #125 or even Burst #129) is set some flags on their control variable (RIE and LIE bits) that will trigger the send of "done" interruption. On the interruptions callback, is decided whether to recycle the linked list memory space by writing a new set of Bursts elements (if still exists Chunks to transfer) or is considered completed (if there is no Chunks available to transfer). On scatter-gather transfer mode, the client will submit a scatter-gather list of n (on this case 130) elements, that will be divide in multiple Chunks, each Chunk will have (on this case 42) a limited number of Bursts and after transferring all Bursts, an interrupt will be triggered, which will allow to recycle the all linked list dedicated memory again with the new information relative to the next Chunk and respective Burst associated and repeat the whole cycle again. On cyclic transfer mode, the client will submit a buffer pointer, length of it and number of repetitions, in this case each burst will correspond directly to each repetition. Each Burst can describes a data transfer from point A(source) to point B(destination) with a length that can be from 1 byte up to 4 GB. Since dedicated the memory space where the linked list will reside is limited, the whole n burst elements will be organized in several Chunks, that will be used later to recycle the dedicated memory space to initiate a new sequence of data transfers. The whole transfer is considered has completed when it was transferred all bursts. Currently this IP has a set well-known register map, which includes support for legacy and unroll modes. Legacy mode is version of this register map that has multiplexer register that allows to switch registers between all write and read channels and the unroll modes repeats all write and read channels registers with an offset between them. This register map is called v0. The IP team is creating a new register map more suitable to the latest PCIe features, that very likely will change the map register, which this version will be called v1. As soon as this new version is released by the IP team the support for this version in be included on this driver. According to the logic, patches 1, 2 and 3 should be squashed into 1 unique patch, but for the sake of simplicity of review, it was divided in this 3 patches files. Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Cc: Vinod Koul <vkoul@kernel.org> Cc: Dan Williams <dan.j.williams@intel.com> Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: Russell King <rmk+kernel@armlinux.org.uk> Cc: Joao Pinto <jpinto@synopsys.com> Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-06-09vfs: introduce file_modified() helperAmir Goldstein1-0/+2
The combination of file_remove_privs() and file_update_mtime() is quite common in filesystem ->write_iter() methods. Modelled after the helper file_accessed(), introduce file_modified() and use it from generic_remap_file_range_prep(). Note that the order of calling file_remove_privs() before file_update_mtime() in the helper was matched to the more common order by filesystems and not the current order in generic_remap_file_range_prep(). Signed-off-by: Amir Goldstein <amir73il@gmail.com> Reviewed-by: Darrick J. Wong <darrick.wong@oracle.com> Signed-off-by: Darrick J. Wong <darrick.wong@oracle.com>
2019-06-09vfs: add missing checks to copy_file_rangeAmir Goldstein1-0/+3
Like the clone and dedupe interfaces we've recently fixed, the copy_file_range() implementation is missing basic sanity, limits and boundary condition tests on the parameters that are passed to it from userspace. Create a new "generic_copy_file_checks()" function modelled on the generic_remap_checks() function to provide this missing functionality. [Amir] Shorten copy length instead of checking pos_in limits because input file size already abides by the limits. Signed-off-by: Dave Chinner <dchinner@redhat.com> Signed-off-by: Amir Goldstein <amir73il@gmail.com> Reviewed-by: Darrick J. Wong <darrick.wong@oracle.com> Signed-off-by: Darrick J. Wong <darrick.wong@oracle.com>