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Jason A. Donenfeld
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Author
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2017-04-12
drm/i915: Convert intel_dp_mst connector properties to atomic.
Maarten Lankhorst
1
-10
/
+1
2017-04-12
drm/i915: Remove unused dp properties for dp-mst.
Maarten Lankhorst
3
-3
/
+1
2017-04-12
drm/i915: Convert intel_tv connector properties to atomic, v5.
Maarten Lankhorst
1
-112
/
+63
2017-04-12
drm/i915: Remove unused members from intel_tv.c
Maarten Lankhorst
1
-33
/
+0
2017-04-12
drm/i915/execlists: Document runtime pm for intel_lrc_irq_handler()
Chris Wilson
1
-0
/
+9
2017-04-11
drm/i915: Lie and treat all engines as idle if wedged
Chris Wilson
1
-0
/
+4
2017-04-11
drm/i915: Use the engine class to get the context size
Daniele Ceraolo Spurio
1
-10
/
+19
2017-04-11
drm/i915: Bail if we do not setup the RCS engine
Chris Wilson
1
-2
/
+8
2017-04-11
drm/i915/dp: read sink count to a temporary variable first
Jani Nikula
1
-3
/
+4
2017-04-11
drm/i915/dp: use readb and writeb calls for single byte DPCD access
Jani Nikula
1
-20
/
+17
2017-04-11
drm/i915/dp: localize link rate index variable more
Jani Nikula
1
-6
/
+7
2017-04-11
drm/i915/mst: use max link not sink lane count
Jani Nikula
3
-3
/
+4
2017-04-11
drm/i915/dp: add functions for max common link rate and lane count
Jani Nikula
1
-12
/
+17
2017-04-11
drm/i915/dp: don't call the link parameters sink parameters
Jani Nikula
2
-17
/
+16
2017-04-11
drm/i915/dp: do not limit rate seek when not needed
Jani Nikula
1
-19
/
+12
2017-04-11
drm/i915/dp: cache common rates with sink rates
Jani Nikula
2
-33
/
+45
2017-04-11
drm/i915/dp: use the sink rates array for max sink rates
Jani Nikula
2
-22
/
+8
2017-04-11
drm/i915: Rename intel_engine_cs.exec_id to uabi_id
Chris Wilson
4
-13
/
+13
2017-04-11
drm/i915: Split the engine info table in two levels, using class + instance
Oscar Mateo
1
-23
/
+43
2017-04-11
drm/i915: Generate the engine name based on the instance number
Oscar Mateo
3
-4
/
+7
2017-04-11
drm/i915: Use the same vfunc for BSD2 ring init
Oscar Mateo
3
-16
/
+1
2017-04-11
drm/i915: Classify the engines in class + instance
Daniele Ceraolo Spurio
3
-0
/
+26
2017-04-11
drm/i915: Use safer intel_uncore_wait_for_register in ring-init
Chris Wilson
1
-3
/
+3
2017-04-11
drm/i915: Use __intel_uncore_wait_for_register_fw for sandybride_pcode_read
Chris Wilson
1
-6
/
+6
2017-04-11
drm/i915: Acquire uncore.lock over intel_uncore_wait_for_register()
Chris Wilson
1
-4
/
+12
2017-04-11
drm/i915: Stop sleeping from inside gen6_bsd_submit_request()
Chris Wilson
1
-5
/
+5
2017-04-11
drm/i915: Stop second guessing the caller for intel_uncore_wait_for_register()
Chris Wilson
1
-5
/
+7
2017-04-10
drm/i915: Don't allow overuse of __intel_wait_for_register_fw()
Michal Wajdeczko
1
-0
/
+5
2017-04-10
drm/i915: Drop const qualifiers from params in wait_for_register()
Michal Wajdeczko
2
-17
/
+17
2017-04-10
drm/i915: Use drm_i915_private directly from debugfs
Chris Wilson
1
-6
/
+4
2017-04-09
Linux 4.11-rc6
Linus Torvalds
1
-1
/
+1
2017-04-08
mm/mempolicy.c: fix error handling in set_mempolicy and mbind.
Chris Salls
1
-12
/
+8
2017-04-08
sysctl: report EINVAL if value is larger than UINT_MAX for proc_douintvec
Liping Zhang
1
-0
/
+2
2017-04-08
MAINTAINERS: separate out kernfs maintainership
Tejun Heo
1
-2
/
+9
2017-04-08
sysfs: be careful of error returns from ops->show()
NeilBrown
1
-2
/
+4
2017-04-08
Documentation: stable-kernel-rules: fix stable-tag format
Johan Hovold
1
-1
/
+1
2017-04-08
msm/drm: gpu: Dynamically locate the clocks from the device tree
Jordan Crouse
2
-24
/
+58
2017-04-08
drm/msm: gpu: Use OPP tables if we can
Jordan Crouse
1
-19
/
+66
2017-04-08
drm/msm: Hard code the GPU "slow frequency"
Jordan Crouse
5
-11
/
+11
2017-04-08
drm/msm: Add MSM_PARAM_GMEM_BASE
Jordan Crouse
2
-0
/
+4
2017-04-08
drm/msm: Reference count address spaces
Jordan Crouse
6
-13
/
+33
2017-04-08
drm/msm: Make sure to detach the MMU during GPU cleanup
Jordan Crouse
2
-13
/
+19
2017-04-08
drm/msm/mdp5: Enable 3D mux in mdp5_ctl
Archit Taneja
1
-2
/
+7
2017-04-08
drm/msm/mdp5: Reset CTL blend registers before configuring them
Archit Taneja
1
-0
/
+18
2017-04-08
drm/msm/mdp5: Assign 'right' mixer to CRTC state
Archit Taneja
3
-22
/
+129
2017-04-08
drm/msm/mdp5: Stage border out on base stage if CRTC has 2 LMs
Archit Taneja
1
-10
/
+35
2017-04-08
drm/msm/mdp5: Stage right side hwpipes on Right-side Layer Mixer
Archit Taneja
2
-4
/
+20
2017-04-08
drm/msm/mdp5: Prepare Layer Mixers for source split
Archit Taneja
1
-7
/
+32
2017-04-08
drm/msm/mdp5: Configure 'right' hwpipe
Archit Taneja
2
-1
/
+46
2017-04-08
drm/msm/mdp5: Assign a 'right hwpipe' to plane state
Archit Taneja
2
-1
/
+57
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