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Make sure definitions are consistent with usage.
Detected with Sparse.
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
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When module size > DMA buffer size, driver copies first chunk and waits
for the BDL complete interrupt. BDL complete interrupt never occurs and
wait time expires as module load IPC is not send to start the DMA from
DSP.
To fix the above issue need to follow the below steps:
1. After copying the first chunk, send the module load IPC to start the
DMA.
2. Wait for the BDL interrupt. Once interrupt is received, copy the
next chunk.
3. Continue step 2 till all bytes are copied.
4. When all the bytes are copied (bytes_left = 0), wait for module load
IPC response
5. Handled module load IPC response messages, check the load module IPC
response and wake up the thread to complete module load.
Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
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This patch starts adding code loader DMA handling internal operations for
setting up bdle, controller, spb, cleanup routines and buffer filling
Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com>
Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
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Skylake has a DMA controller for loading DSP code and modules to memory.
Add the register defines for this DMA
Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com>
Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
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Pierre-Louis Bossart
Jeeja KP
Vinod Koul