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2016-05-09MAINTAINERS: add new maintainers of NXP LPC32xx SoCVladimir Zapolskiy1-1/+3
Roland Stigge added initial support of NXP LPC32xx SoC series and first boards powered by it, but for a while since v3.18-rc1 the SoC support is unmaintained and became stale. Vladimir Zapolskiy and Sylvain Lemieux expressed interest in continuation of NXP LPC32xx maintenance, reflect this in MAINTAINERS record file for better communication with Linux kernel community. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2016-05-09MAINTAINERS: move ARM/NXP LPC32xx record to ARM sectionVladimir Zapolskiy1-6/+6
A record of NXP LPC32xx SoC support is lost between LMxx hwmon drivers and lockdep, rename and move it to a place where all other ARM SoC and machines settle. Note, NXP LPC32xx maintenance is actually about SoC series itself, SoC peripherals and a number of machines powered by LPC32xx SoC, so while we are here correct the title name to emphasize that the maintenance concerns SoC support in general. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2016-04-28ARM: lpc32xx: remove duplicate const on lpc32xx_auxdata_lookupVladimir Zapolskiy1-1/+1
Remove redundant duplicate const, which is found by smatch: arch/arm/mach-lpc32xx/phy3250.c:162:42: warning: duplicate const Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com> Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2016-04-28ARM: lpc32xx: remove leftovers of legacy clock source and provider driversVladimir Zapolskiy2-117/+1
After switching the platform to common clock framework there is no more need to keep dead code in arch/arm/mach-lpc32xx, which glued legacy clock source and clock provider drivers, remove the leftovers. Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com> Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2016-04-28ARM: lpc32xx: remove reboot header fileSylvain Lemieux1-1/+0
The header file "reboot.h" is no longer needed, following the migration of the restart code into the pnx4008 watchdog. Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com> Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2016-04-27ARM: davinci: da850: use clk->set_parent for async3David Lechner1-48/+33
The da850 family of processors has an async3 clock domain that can be muxed to either pll0_sysclk2 or pll1_sysclk2. Now that the davinci clocks have a set_parent callback, we can use this to control the async3 mux instead of a stand-alone function. This adds a new async3_clk and sets the appropriate child clocks. The default is use to pll1_sysclk2 since it is not affected by processor frequency scaling. Signed-off-by: David Lechner <david@lechnology.com> [nsekhar@ti.com: drop unnecessary comment] Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2016-04-27ARM: davinci: Move clock init after ioremap.David Lechner8-7/+9
Some clocks (such as the USB PHY clocks in DA8xx) will need to use iomem. The davinci_common_init() function must be called before the ioremap, so the clock init is now split out as separate function. Signed-off-by: David Lechner <david@lechnology.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2016-04-26MAINTAINERS: Update ARM Versatile Express platform entryVladimir Murzin1-0/+1
This patch update ARM Versatile Express entry to cover bits needed for Cortex-M Prototyping System (MPS2 platform). So patches for the latter are collected by existing Vexpress and Juno maintainers (Liviu, Sudeep, Lorenzo) and find their way upstream via Vexpess and/or Juno trees. Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2016-04-26ARM: vexpress/mps2: introduce MPS2 platformVladimir Murzin5-1/+40
The Cortex-M Prototyping System (or V2M-MPS2) is designed for prototyping and evaluation Cortex-M family of processors including the latest Cortex-M7 It comes with a range of useful peripherals including 8MB single cycle SRAM, 16MB PSRAM, Ethernet, QSVGA touch screen panel, 4bit RGB VGA connector, Audio, SPI and GPIO. Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2016-04-26MAINTAINERS: add maintainer entry for ARM/OXNAS platformNeil Armstrong1-0/+9
Add a maintainer entry for ARM/OXNAS platform and add myself as a maintainer. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2016-04-26ARM: Add new mach-oxnasNeil Armstrong2-0/+26
Add mach-oxnas directory containing Kconfig. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2016-04-26irqchip: versatile-fpga: add new compatible for OX810SE SoCNeil Armstrong1-0/+1
Under the OX810SE, this exact same interface is used as "Reference Peripheral Specification" Interrupt Controller, so add a new compatible string in order to support the Oxford Semiconductor OX810SE SoC interrupt controller. Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2016-04-26ARM: uniphier: correct the call order of of_node_put()Masahiro Yamada1-2/+2
Put nodes after of_address_to_resource() in case the nodes might be released while parsing in them. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2016-04-20ARM: shmobile: timer: Drop support for Cortex A8Geert Uytterhoeven1-32/+20
Commit edf4100906044225 ("ARM: shmobile: sh7372 dtsi: Remove Legacy file") removed the DTS for the last shmobile SoC with a Cortex A8 CPU core (sh7372 aka SH-Mobile AP4), hence drop support for it in the loops-per-jiffy preset code. As "div" is always 1 for supported contemporary ARM processors, we can simplify the code: - Absorb shmobile_setup_delay_hz(), which was always called with mult = div = 1, - Return earlier if the Cortex A7/A15 arch timer exists and support is enabled. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-04-20ARM: shmobile: timer: Fix preset_lpj leading to too short delaysGeert Uytterhoeven1-17/+11
On all shmobile ARM SoCs, loop-based delays may complete early, which can be after only 1/3 (Cortex A9) or 1/2 (Cortex A7 or A15) of the minimum required time. This is caused by calculating preset_lpj based on incorrect assumptions about the number of clock cycles per loop: - All of Cortex A7, A9, and A15 run __loop_delay() at 1 loop per CPU clock cycle, - As of commit 11d4bb1bd067f9d0 ("ARM: 7907/1: lib: delay-loop: Add align directive to fix BogoMIPS calculation"), Cortex A8 runs __loop_delay() at 1 loop per 2 instead of 3 CPU clock cycles. On SoCs with Cortex A7 and/or A15 CPU cores, this went unnoticed, as delays use the ARM arch timer if available. R-Car Gen2 doesn't work if the arch timer is disabled. However, APE6 can be used without the arch timer. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-04-20Revert "ARM: dts: porter: Enable SCIF_CLK frequency and pins"Sjoerd Simons1-13/+0
This reverts commit 19417bd9c511 ("ARM: dts: porter: Enable SCIF_CLK frequency and pins") as according to http://elinux.org/File:R-CarM2-KOELSCH_PORTER-B_PORTER_C_Comparison.pdf the external oscillator for SCIF_CLK is not mounted on the porter boards. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-04-20ARM: dts: r8a7791: Don't disable referenced optional clocksSjoerd Simons3-4/+3
clk_get on a disabled clock node will return EPROBE_DEFER, which can cause drivers to be deferred forever if such clocks are referenced in their clocks property. Update the various disabled external clock nodes to default to a frequency of 0, but don't disable them to prevent this. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-04-14ARM: davinci: clk: add set_parent callback for mux clocksDavid Lechner2-1/+19
Introduce a set_parent callback that will be used for mux clocks, such as the USB PHY muxes and the async3 clock domain mux. Signed-off-by: David Lechner <david@lechnology.com> [nsekhar@ti.com: checkpatch fixes] Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2016-04-14ARM: davinci: da8xx: move usb code to new fileDavid Lechner3-75/+109
We will be adding more da8xx-specific code for phy and clocks, so it will be better to have this in a separate file. This way we don't have a bunch of #ifdefs for all of the da8xx stuff. While at it, fix some checkpatch warnings coming from existing code. Signed-off-by: David Lechner <david@lechnology.com> [nsekhar@ti.com: typo and checkpatch fixes] Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2016-04-14ARM: davinci: use IRQCHIP_DECLARE for cp_intcDavid Lechner2-11/+3
Remove boilerplate code by using IRQCHIP_DECLARE macro. Signed-off-by: David Lechner <david@lechnology.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2016-04-14ARM: davinci: remove unused DA8XX_NUM_UARTSDavid Lechner1-2/+0
DA8X_NUM_UARTS not used in the code anywhere and should be determined by DT anyway. Signed-off-by: David Lechner <david@lechnology.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2016-04-14ARM: davinci: simplify call to of populateDavid Lechner1-3/+1
Take advantage of of_platoform_default_populate convience function. Signed-off-by: David Lechner <david@lechnology.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2016-04-14ARM: DaVinci USB: removed deprecated properties from MUSB configPetr Kulhavy1-16/+0
The following properties of the musb_hdrc_config structure are deprecated and no longer required/used by the MUSB driver: .dyn_fifo .soft_con .dma .dma_channels .eps_bits Signed-off-by: Petr Kulhavy <petr@barix.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2016-04-13ARM: OMAP2+: wakeupgen: Add comment for unhandled FROZEN transitionsAnna-Maria Gleixner1-0/+5
FROZEN hotplug notifiers are not handled and do not have to be. Insert a comment to remember that the lack of the FROZEN transitions is no accident. Cc: Tony Lindgren <tony@atomide.com> Cc: Santosh Shilimkar <ssantosh@kernel.org> Cc: linux-omap@vger.kernel.org Signed-off-by: Anna-Maria Gleixner <anna-maria@linutronix.de> Acked-by: Santosh Shilimkar <ssantosh@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-04-13ARM: OMAP: DRA7: powerdomain data: Remove wrong OSWR capabilityNishanth Menon1-7/+7
Open Switch Retention(OSWR) is a retention state which is unsupported in DRA7 SoC. This state is achieved when power state is set to retention and logic power state is set to OFF. Even though DRA7 architecture is a OMAP derivative, none of the powerdomains are actually implemented to achieve OSWR in the SoC. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-04-13ARM: OMAP: DRA7: powerdomain data: Fix "ON" state for memoriesNishanth Menon1-33/+33
When the power domain is in "ON" state, the memories should be always in "ON", even though the hardware register allows other states to be written, wrong states may confuse certain hardware blocks. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-04-13ARM: OMAP: DRA7: powerdomain data: Erratum i892 workaround: Disable core INANishanth Menon1-1/+1
Erratum i892 as will be documented in the upcoming G or later revision of DRA7xx/ AM57xx errata documentation (SPRZ398F) states that L3 clock needs to be kept active all the time to ensure that asymmetric aging degradation is minimal and within the design allowed margin. By allowing core domain to transition to INA and allowing L3 clock to be turned off for extended periods of time, there is a risk of functional issues and device failure as a result. Ref: http://www.ti.com/lit/er/sprz429h/sprz429h.pdf Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-04-13ARM: OMAP2+: remove redundant multiplatform checksJonas Rabenstein2-120/+22
The directory arch/arm/mach-omap2 is only selected for compilation if CONFIG_ARCH_OMAP2PLUS is selected. CONFIG_ARCH_OMAP2PLUS itself is a silent option and all machines selecting this option are multiplatform devices. As a consequence checks for CONFIG_ARCH_MULTIPLATFORM as well as CONFIG_ARCH_OMAP2PLUS within that directory are superfluous and can be removed. Signed-off-by: Jonas Rabenstein <jonas.rabenstein@studium.uni-erlangen.de> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-04-10Linux 4.6-rc3Linus Torvalds1-1/+1
2016-04-10Revert "ext4: allow readdir()'s of large empty directories to be interrupted"Linus Torvalds2-10/+0
This reverts commit 1028b55bafb7611dda1d8fed2aeca16a436b7dff. It's broken: it makes ext4 return an error at an invalid point, causing the readdir wrappers to write the the position of the last successful directory entry into the position field, which means that the next readdir will now return that last successful entry _again_. You can only return fatal errors (that terminate the readdir directory walk) from within the filesystem readdir functions, the "normal" errors (that happen when the readdir buffer fills up, for example) happen in the iterorator where we know the position of the actual failing entry. I do have a very different patch that does the "signal_pending()" handling inside the iterator function where it is allowable, but while that one passes all the sanity checks, I screwed up something like four times while emailing it out, so I'm not going to commit it today. So my track record is not good enough, and the stars will have to align better before that one gets committed. And it would be good to get some review too, of course, since celestial alignments are always an iffy debugging model. IOW, let's just revert the commit that caused the problem for now. Reported-by: Greg Thelen <gthelen@google.com> Cc: Theodore Ts'o <tytso@mit.edu> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2016-04-10ARM: OMAP2+: hwmod: fix _idle() hwmod state sanity check sequenceSuman Anna1-6/+6
The omap_hwmod _enable() function can return success without setting the hwmod state to _HWMOD_STATE_ENABLED for IPs with reset lines when all of the reset lines are asserted. The omap_hwmod _idle() function also performs a similar check, but after checking for the hwmod state first. This triggers the WARN when pm_runtime_get and pm_runtime_put are invoked on IPs with all reset lines asserted. Reverse the checks for hwmod state and reset lines status to fix this. Issue found during a unbind operation on a device with reset lines still asserted, example backtrace below ------------[ cut here ]------------ WARNING: CPU: 1 PID: 879 at arch/arm/mach-omap2/omap_hwmod.c:2207 _idle+0x1e4/0x240() omap_hwmod: mmu_dsp: idle state can only be entered from enabled state Modules linked in: CPU: 1 PID: 879 Comm: sh Not tainted 4.4.0-00008-ga989d951331a #3 Hardware name: Generic OMAP5 (Flattened Device Tree) [<c0018e60>] (unwind_backtrace) from [<c0014dc4>] (show_stack+0x10/0x14) [<c0014dc4>] (show_stack) from [<c037ac28>] (dump_stack+0x90/0xc0) [<c037ac28>] (dump_stack) from [<c003f420>] (warn_slowpath_common+0x78/0xb4) [<c003f420>] (warn_slowpath_common) from [<c003f48c>] (warn_slowpath_fmt+0x30/0x40) [<c003f48c>] (warn_slowpath_fmt) from [<c0028c20>] (_idle+0x1e4/0x240) [<c0028c20>] (_idle) from [<c0029080>] (omap_hwmod_idle+0x28/0x48) [<c0029080>] (omap_hwmod_idle) from [<c002a5a4>] (omap_device_idle+0x3c/0x90) [<c002a5a4>] (omap_device_idle) from [<c0427a90>] (__rpm_callback+0x2c/0x60) [<c0427a90>] (__rpm_callback) from [<c0427ae4>] (rpm_callback+0x20/0x80) [<c0427ae4>] (rpm_callback) from [<c0427f84>] (rpm_suspend+0x138/0x74c) [<c0427f84>] (rpm_suspend) from [<c0428b78>] (__pm_runtime_idle+0x78/0xa8) [<c0428b78>] (__pm_runtime_idle) from [<c041f514>] (__device_release_driver+0x64/0x100) [<c041f514>] (__device_release_driver) from [<c041f5d0>] (device_release_driver+0x20/0x2c) [<c041f5d0>] (device_release_driver) from [<c041d85c>] (unbind_store+0x78/0xf8) [<c041d85c>] (unbind_store) from [<c0206df8>] (kernfs_fop_write+0xc0/0x1c4) [<c0206df8>] (kernfs_fop_write) from [<c018a120>] (__vfs_write+0x20/0xdc) [<c018a120>] (__vfs_write) from [<c018a9cc>] (vfs_write+0x90/0x164) [<c018a9cc>] (vfs_write) from [<c018b1f0>] (SyS_write+0x44/0x9c) [<c018b1f0>] (SyS_write) from [<c0010420>] (ret_fast_syscall+0x0/0x1c) ---[ end trace a4182013c75a9f50 ]--- While at this, fix the sequence in _shutdown() as well, though there is no easy reproducible scenario. Fixes: 747834ab8347 ("ARM: OMAP2+: hwmod: revise hardreset behavior") Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
2016-04-10ARM: DRA7: hwmod: Add data for GPTimer 12Suman Anna1-2/+34
Add the hwmod data for GPTimer 12. GPTimer 12 is present in WKUPAON power domain and is clocked from a secure 32K clock. GPTimer 12 serves as a secure timer on HS devices, but is available for kernel on regular GP devices. The hwmod link is registered only on GP devices. The hwmod data also reused the existing timer class instead of reintroducing the identical dra7xx_timer_secure_sysc class which was dropped in commit edec17863362 ("ARM: DRA7: hwmod: Fix the hwmod class for GPTimer4"). Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
2016-04-10ARM: AMx3xx: RTC: Add lock and unlock functionsLokesh Vutla1-0/+2
Hook omap_hwmod_rtc_unlock/lock functions into RTC hwmod, so that SYSCONFIG register is updated properly. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
2016-04-10ARM: DRA7: RTC: Add lock and unlock functionsLokesh Vutla1-0/+2
Hook omap_hwmod_rtc_unlock/lock functions into RTC hwmod, so that SYSCONFIG register is updated properly Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
2016-04-10ARM: OMAP2+: hwmod: RTC: Add lock and unlock functionsLokesh Vutla2-0/+67
RTC IP have kicker feature which prevents spurious writes to its registers. In order to write into any of the RTC registers, KICK values has to be written to KICK registers. Also, RTC busy flag needs to be polled for non-TC registers as well, without which update is not proper and confirmed it by testing on DRA7-evm. Introduce omap_hwmod_rtc_unlock/lock functions, which writes into these KICK registers inorder to lock and unlock RTC registers. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> [paul@pwsan.com: fixed subject line] Signed-off-by: Paul Walmsley <paul@pwsan.com>
2016-04-10ARM: OMAP2+: DRA7: Add hwmod entries for PWMSSVignesh R1-0/+89
Add hwmod entries for the PWMSS on DRA7. Set l4_root_clk_div as the main_clk of PWMSS. It is fixed-factored clock equal to L4PER2_L3_GICLK/2(l3_iclk_div/2). Signed-off-by: Vignesh R <vigneshr@ti.com> [fcooper@ti.com: Do not add eQEP, ePWM and eCAP hwmod entries] Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com> [paul@pwsan.com: fixed sparse warnings; added missing comments] Signed-off-by: Paul Walmsley <paul@pwsan.com>
2016-04-10ARM: DRA7: hwmod: Add data for McASP1/2/4/5/6/7/8Peter Ujfalusi1-0/+237
Add missing data for all McASP ports for the dra7 family Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
2016-04-10ARM: DRA7: clockdomain: Implement timer workaround for errata i874Keerthy1-1/+1
Errata Title: i874: TIMER5/6/7/8 interrupts not propagated Description: When TIMER5, TIMER6, TIMER7, or TIMER8 clocks are enabled (CM_IPU_TIMER5/6/7/8_CLKCTRL[0:1]MODULEMODE=0x2:ENABLE) and the CD-IPU is in HW_AUTO mode (CM_IPU_CLKSTCTRL[0:1]CLKTRCTRL=0x3:HW_AUTO) the corresponding TIMER will continue counting, but enabled interrupts will not be propagated to the destinations (MPU, DSP, etc) in the SoC until the TIMER registers are accessed from the CPUs (MPU, DSP etc.). This can result in missed timer interrupts. Workaround: In order for TIMER5/6/7/8 interrupts to be propagated and serviced correctly the CD_IPU domain should be set to SW_WKUP mode (CM_IPU_CLKSTCTRL[0:1]CLKTRCTRL=0x2:SW_WKUP). The above workaround is achieved by switching the IPU clockdomain flags from HWSUP_SWSUP to SWSUP only. Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
2016-04-09i2c: jz4780: really prevent potential division by zeroWolfram Sang1-1/+6
Make sure we avoid a division-by-zero OOPS in case clock-frequency is set too low in DT. Add missing '\n' while we are here. Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Acked-by: Axel Lin <axel.lin@ingics.com>
2016-04-09Revert "i2c: jz4780: prevent potential division by zero"Wolfram Sang1-1/+1
This reverts commit 34cf2acdafaa31a13821e45de5ee896adcd307b1. 'ret' is not set when bailing out. Also, there is a better place to check for 0. Reported-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-04-08bridge, netem: mark mailing lists as moderatedstephen hemminger1-2/+2
I moderate these (lightly loaded) lists to block spam. Signed-off-by: Stephen Hemminger <stephen@networkplumber.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-04-08parisc: Update comment regarding relative extable supportHelge Deller1-6/+4
Update the comment to reflect the changes of commit 0de7985 (parisc: Use generic extable search and sort routines). Signed-off-by: Helge Deller <deller@gmx.de>
2016-04-08parisc: Unbreak handling exceptions from kernel modulesHelge Deller4-0/+9
Handling exceptions from modules never worked on parisc. It was just masked by the fact that exceptions from modules don't happen during normal use. When a module triggers an exception in get_user() we need to load the main kernel dp value before accessing the exception_data structure, and afterwards restore the original dp value of the module on exit. Noticed-by: Mikulas Patocka <mpatocka@redhat.com> Signed-off-by: Helge Deller <deller@gmx.de> Cc: stable@vger.kernel.org
2016-04-08parisc: Fix kernel crash with reversed copy_from_user()Helge Deller1-0/+3
The kernel module testcase (lib/test_user_copy.c) exhibited a kernel crash on parisc if the parameters for copy_from_user were reversed ("illegal reversed copy_to_user" testcase). Fix this potential crash by checking the fault handler if the faulting address is in the exception table. Signed-off-by: Helge Deller <deller@gmx.de> Cc: stable@vger.kernel.org Cc: Kees Cook <keescook@chromium.org>
2016-04-08parisc: Avoid function pointers for kernel exception routinesHelge Deller1-5/+5
We want to avoid the kernel module loader to create function pointers for the kernel fixup routines of get_user() and put_user(). Changing the external reference from function type to int type fixes this. This unbreaks exception handling for get_user() and put_user() when called from a kernel module. Signed-off-by: Helge Deller <deller@gmx.de> Cc: stable@vger.kernel.org
2016-04-08parisc: Handle R_PARISC_PCREL32 relocations in kernel modulesHelge Deller1-0/+8
Commit 0de7985 (parisc: Use generic extable search and sort routines) changed the exception tables to use 32bit relative offsets. This patch now adds support to the kernel module loader to handle such R_PARISC_PCREL32 relocations for 32- and 64-bit modules. Signed-off-by: Helge Deller <deller@gmx.de>
2016-04-08tuntap: restore default qdiscJason Wang1-2/+2
After commit f84bb1eac027 ("net: fix IFF_NO_QUEUE for drivers using alloc_netdev"), default qdisc was changed to noqueue because tuntap does not set tx_queue_len during .setup(). This patch restores default qdisc by setting tx_queue_len in tun_setup(). Fixes: f84bb1eac027 ("net: fix IFF_NO_QUEUE for drivers using alloc_netdev") Cc: Phil Sutter <phil@nwl.cc> Signed-off-by: Jason Wang <jasowang@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Phil Sutter <phil@nwl.cc> Signed-off-by: David S. Miller <davem@davemloft.net>
2016-04-08orangefs: remove unused variableMartin Brandenburg1-3/+1
Signed-off-by: Martin Brandenburg <martin@omnibond.com> Signed-off-by: Mike Marshall <hubcap@omnibond.com>
2016-04-08orangefs: Add KERN_<LEVEL> to gossip_<level> macrosJoe Perches1-14/+17
Emit the logging messages at the appropriate levels. Miscellanea: o Change format to fmt o Use the more common ##__VA_ARGS__ Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: Mike Marshall <hubcap@omnibond.com>
2016-04-08orangefs: strncpy -> strscpyMartin Brandenburg1-1/+5
It would have been possible for a rogue client-core to send in a symlink target which is not NUL terminated. This returns EIO if the client-core gives us corrupt data. Leave debugfs and superblock code as is for now. Other dcache.c and namei.c strncpy instances are safe because ORANGEFS_NAME_MAX = NAME_MAX + 1; there is always enough space for a name plus a NUL byte. Signed-off-by: Martin Brandenburg <martin@omnibond.com> Signed-off-by: Mike Marshall <hubcap@omnibond.com>