aboutsummaryrefslogtreecommitdiffstats
path: root/tools/perf/scripts/python/call-graph-from-sql.py (unfollow)
AgeCommit message (Collapse)AuthorFilesLines
2018-01-16mlxsw: pci: Add support for getting resource through devlinkArkadi Sharshevsky4-30/+92
Up until now the KVD partition was static. This patch introduces the ability to get the resource sizes via devlink. In case the resource is not available the default configuration is used. Signed-off-by: Arkadi Sharshevsky <arkadis@mellanox.com> Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-01-16mlxsw: spectrum: Add support for getting kvdl occupancyArkadi Sharshevsky3-0/+36
Add support for getting the kvdl occupancy through the resource interface. Signed-off-by: Arkadi Sharshevsky <arkadis@mellanox.com> Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-01-16mlxsw: spectrum_dpipe: Connect dpipe tables to resourcesArkadi Sharshevsky1-12/+69
Connect current dpipe tables to resources. The tables are connected in the following fashion: 1. IPv4 host -> KVD hash single 2. IPv6 host -> KVD hash double 3. Adjacency -> KVD linear Signed-off-by: Arkadi Sharshevsky <arkadis@mellanox.com> Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-01-16mlxsw: spectrum: Register KVD resources with devlinkArkadi Sharshevsky4-0/+205
Register the KVD resources with devlink. The KVD is a memory resource which is subdivided into three partitions which are the linear, hash single and hash double. Signed-off-by: Arkadi Sharshevsky <arkadis@mellanox.com> Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-01-16mlxsw: pci: Add support for performing bus resetArkadi Sharshevsky2-13/+41
This is a preparation stage before introducing hot reload. During the reload process the ASIC should be resetted by accessing the PCI BAR due to unavailability of the mailbox/emad interfaces. Signed-off-by: Arkadi Sharshevsky <arkadis@mellanox.com> Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-01-16devlink: Add relation between dpipe and resourceArkadi Sharshevsky3-0/+56
The hardware processes which are modeled via dpipe commonly use some internal hardware resources. Such relation can improve the understanding of hardware limitations. The number of resource's unit consumed per table's entry are also provided for each table. Signed-off-by: Arkadi Sharshevsky <arkadis@mellanox.com> Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-01-16devlink: Add support for reloadArkadi Sharshevsky3-0/+53
Add support for performing driver hot reload. Signed-off-by: Arkadi Sharshevsky <arkadis@mellanox.com> Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-01-16devlink: Add support for resource abstractionArkadi Sharshevsky3-0/+488
Add support for hardware resource abstraction over devlink. Each resource is identified via id, furthermore it contains information regarding its size and its related sub resources. Each resource can also provide its current occupancy. In some cases the sizes of some resources can be changed, yet for those changes to take place a hot driver reload may be needed. The reload capability will be introduced in the next patch. Signed-off-by: Arkadi Sharshevsky <arkadis@mellanox.com> Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-01-16devlink: Add per devlink instance lockArkadi Sharshevsky2-59/+78
This is a preparation before introducing resources and hot reload support. Currently there are two global lock where one protects all devlink access, and the second one protects devlink port access. This patch adds per devlink instance lock which protects the internal members which are the sb/dpipe/ resource/ports. By introducing this lock the global devlink port lock can be discarded. Signed-off-by: Arkadi Sharshevsky <arkadis@mellanox.com> Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-01-16phy: realtek: use new helpers for paged register accessHeiner Kallweit1-45/+14
Make use of the new helpers for paged register access. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-01-16phy: use new helpers phy_set_bits/phy_clear_bits in phylibHeiner Kallweit1-2/+2
Use new helpers phy_set_bits / phy_clear_bits in phylib. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-01-16phy: add helpers for setting/clearing bits in PHY registersHeiner Kallweit1-0/+49
Based on the recent introduction of phy_modify add helpers for setting and clearing bits in PHY registers. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-01-15sh_eth: get Ether port # only when neededSergei Shtylyov1-8/+5
The dual-port Ether configurations always have a shared TSU to e.g. pass the packets between those ports. With the TSU init. code gathered under the single *if*, we now can only get the port # from 'platform_device::id' only when we actually need it (and not recalculate it each time)... Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-01-15sh_eth: gather all TSU init code in one placeSergei Shtylyov1-7/+5
The sh_eth_cpu_data::chip_reset() method always resets using ARSTR and this register is always located at the start of the TSU register region. Therefore, we can only call this method if we know TSU is there and thus simplify the probing code a bit... Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-01-15net: ethernet: Add a driver for Gemini gigabit ethernetLinus Walleij7-0/+3581
The Gemini ethernet has been around for years as an out-of-tree patch used with the NAS boxen and routers built on StorLink SL3512 and SL3516, later Storm Semiconductor, later Cortina Systems. These ASICs are still being deployed and brand new off-the-shelf systems using it can easily be acquired. The full name of the IP block is "Net Engine and Gigabit Ethernet MAC" commonly just called "GMAC". The hardware block contains a common TCP Offload Enginer (TOE) that can be used by both MACs. The current driver does not use it. Cc: Tobias Waldvogel <tobias.waldvogel@gmail.com> Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>