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2018-10-16dt-bindings: pinctrl: bcm4708-pinmux: improve example bindingRafał Miłecki1-8/+23
Broadcom SoC pins are controlled using CRU ("Clock and Reset Unit" or "Central Resource Unit") registers. There are more CRU registers and functions so CRU should be represented as a separated block in DT. Moreover CRU is a sub-block of DMU ("Device Management Unit") so that one should also get its own node. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-10-16pinctrl: geminilake: Sort register offsets by valueAndy Shevchenko1-1/+1
No functional change. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-10-16pinctrl: geminilake: Get rid of unneeded ->probe() stubAndy Shevchenko1-6/+1
The local ->probe() stub does nothing except calling a generic Intel pin control probe function. Thus, it's not needed and generic function may be called directly. This patch converts the driver accordingly. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-10-16pinctrl: geminilake: Update pin list for B0 steppingAndy Shevchenko1-18/+18
According to an updated pin list few names of the pins can be spelled better, taking into account their primary functions. Thus, update a pin list to cover B0 stepping. Note, SPI numbering had been fixed even in A0 public documentation. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-10-15pinctrl: renesas: Fix platform_no_drv_owner.cocci warningsYueHaibing1-1/+0
Remove .owner field if calls are used which set it automatically Generated by: scripts/coccinelle/api/platform_no_drv_owner.cocci Signed-off-by: YueHaibing <yuehaibing@huawei.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-10-15pinctrl: mediatek: Make eint_m u16Manivannan Sadhasivam1-1/+1
For SoC's which lacks EINT support, U16_MAX is assigned to both eint_m and eint_n through macro NO_EINT_SUPPORT. This will generate integer overflow warning because eint_m is declared as u8 type. Hence modify the eint_m type to u16. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-10-12pinctrl: bcm: ns: Use uintptr_t for casting dataRafał Miłecki1-2/+2
Fix up a compiler error on 64bit architectures where pointers and integers differ in size. Suggested-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-10-12pinctrl: madera: Fix uninitialized variable bug in madera_mux_set_muxGustavo A. R. Silva1-1/+1
There is a potential execution path in which variable *ret* is checked in an IF statement, and then its value is used to report an error at line 659 without being properly initialized previously: 659 if (ret) 660 dev_err(priv->dev, "Failed to write to 0x%x (%d)\n", reg, ret); Fix this by initializing variable *ret* to 0 in order to avoid unpredictable or unintended results. Addresses-Coverity-ID: 1471969 ("Uninitialized scalar variable") Fixes: 218d72a77b0b ("pinctrl: madera: Add driver for Cirrus Logic Madera codecs") Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Acked-by: Charles Keepax <ckeepax@opensource.cirrus.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-10-10pinctrl: gemini: Fix up TVC clock groupLinus Walleij1-8/+36
The previous fix made the TVC clock get muxed in on the D-Link DIR-685 instead of giving nagging warnings of this not working. Not good. We didn't want that, as it breaks video. Create a specific group for the TVC CLK, and break out a specific GPIO group for it on the SL3516 so we can use that line as GPIO if we don't need the TVC CLK. Fixes: d17f477c5bc6 ("pinctrl: gemini: Mask and set properly") Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-10-10pinctrl: gemini: Drop noisy debug printsLinus Walleij1-16/+16
The dev_info() in the pin control driver is really just good for debug, so drop it. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-10-10pinctrl: gemini: Mask and set properlyLinus Walleij1-1/+2
The code was written under the assumption that the regmap_update_bits() would mask the bits in the mask and set the bits in the value. It missed the points that it will not set bits in the value unless these are also masked in the mask. Set value bits that are not in the mask will simply be ignored. Fixes: 06351d133dea ("pinctrl: add a Gemini SoC pin controller") Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-10-10pinctrl: mediatek: select GPIOLIBArnd Bergmann1-0/+1
Removing the linux/gpio.h include means we no longer have a declaration of gpiochip_lock_as_irq() when CONFIG_GPIOLIB is disabled: drivers/pinctrl/mediatek/mtk-eint.c: In function 'mtk_eint_irq_request_resources': drivers/pinctrl/mediatek/mtk-eint.c:247:8: error: implicit declaration of function 'gpiochip_lock_as_irq'; did you mean 'spin_lock_irq'? [-Werror=implicit-function-declaration] drivers/pinctrl/mediatek/mtk-eint.c: In function 'mtk_eint_irq_release_resources': drivers/pinctrl/mediatek/mtk-eint.c:272:2: error: implicit declaration of function 'gpiochip_unlock_as_irq'; did you mean 'spin_unlock_irq'? [-Werror=implicit-function-declaration] Select it explictly instead. Fixes: 1c5fb66afa2a ("pinctrl: Include <linux/gpio/driver.h> nothing else") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-10-10pinctrl: rza1: don't manually release devm managed resourcesUwe Kleine-König1-7/+1
If the probe function fails the driver core cares to return the allocated resources automatically. So the driver can be simplified accordingly. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-10-10MAINTAINERS: update entry for Mediatek pin controllerSean Wang1-5/+2
Add all source files under drivers/pinctrl/mediatek for the entry and change the address to a permanent one since I have a personal leave over the next few months and the address would be suspended for a while. Cc: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Sean Wang <sean.wang@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-10-10pinctrl: bcm: add Northstar driverRafał Miłecki3-0/+386
This driver provides support for Northstar mux controller. It differs from Northstar Plus one so a new binding and driver were needed. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>