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2014-10-02PCI: Add ACS quirk for AMD A88X southbridge devicesMarti Raudsepp1-0/+7
AMD has confirmed that peer-to-peer between two southbridge functions does not occur. Add a quirk to indicate that these functions are isolated even though they don't have an ACS capability. Link: https://bugzilla.kernel.org/show_bug.cgi?id=81841 Signed-off-by: Marti Raudsepp <marti@juffo.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Joel Schopp <joel.schopp@amd.com>
2014-10-01PCI: xgene: Add APM X-Gene PCIe driverTanmay Inamdar5-0/+735
Add the AppliedMicro X-Gene SOC PCIe host controller driver. The X-Gene PCIe controller supports up to 8 lanes and GEN3 speed. The X-Gene SOC supports up to 5 PCIe ports. [bhelgaas: folded in MAINTAINERS and bindings updates] Tested-by: Ming Lei <ming.lei@canonical.com> Tested-by: Dann Frazier <dann.frazier@canonical.com> Signed-off-by: Tanmay Inamdar <tinamdar@apm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Liviu Dudau <Liviu.Dudau@arm.com> (driver)
2014-10-01PCI: designware: Remove open-coded bitmap operationsLucas Stach1-44/+7
Replace them by using the standard kernel bitmap ops. No functional change, but makes the code a lot cleaner. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Pratyush Anand <pratyush.anand@st.com> Acked-by: Jingoo Han <jg1.han@samsung.com>
2014-10-01PCI/MSI: Remove unnecessary temporary variableBjorn Helgaas1-3/+2
The only use of "status" is to hold a value which is immediately returned, so just return and remove the variable directly. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2014-10-01PCI/MSI: Use __write_msi_msg() instead of write_msi_msg()Yijing Wang1-1/+1
default_restore_msi_irq() already has the struct msi_desc pointer required by __write_msi_msg(), so call it directly instead of having write_msi_msg() look it up from the IRQ. No functional change. [bhelgaas: split into separate patch] Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2014-10-01MSI/powerpc: Use __read_msi_msg() instead of read_msi_msg()Yijing Wang1-1/+1
rtas_setup_msi_irqs() already has the struct msi_desc pointer required by __read_msi_msg(), so call it directly instead of having read_msi_msg() look it up from the IRQ. No functional change. [bhelgaas: changelog] Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Michael Ellerman <mpe@ellerman.id.au> CC: Benjamin Herrenschmidt <benh@kernel.crashing.org> CC: linuxppc-dev@lists.ozlabs.org
2014-10-01PCI/MSI: Use __get_cached_msi_msg() instead of get_cached_msi_msg()Yijing Wang2-3/+3
Both callers of get_cached_msi_msg() start with a struct irq_data pointer, look up the corresponding IRQ number, and pass it to get_cached_msi_msg(), which then uses irq_get_irq_data() to look up the struct irq_data again to call __get_cached_msi_msg(). Since we already have the struct irq_data, call __get_cached_msi_msg() directly and skip the lookup work done by get_cached_msi_msg(). No functional change. [bhelgaas: changelog] Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> CC: Tony Luck <tony.luck@intel.com> CC: linux-ia64@vger.kernel.org
2014-10-01PCI/MSI: Add "msi_bus" sysfs MSI/MSI-X control for endpointsYijing Wang2-20/+29
The "msi_bus" sysfs file for bridges sets a bus flag to allow or disallow future driver requests for MSI or MSI-X. Previously, the sysfs file existed for endpoints but did nothing. Add "msi_bus" support for endpoints, so an administrator can prevent the use of MSI and MSI-X for individual devices. Note that as for bridges, these changes only affect future driver requests for MSI or MSI-X, so drivers may need to be reloaded. Add documentation for the "msi_bus" sysfs file. [bhelgaas: changelog, comments, add "subordinate", add endpoint printk, rework bus_flags setting, make bus_flags printk unconditional] Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2014-10-01PCI/MSI: Remove "pos" from the struct msi_desc msi_attribYijing Wang4-10/+4
"msi_attrib.pos" is only used for MSI (not MSI-X), and we already cache the MSI capability offset in "dev->msi_cap". Remove "pos" from the struct msi_attrib and use "dev->msi_cap" directly. [bhelgaas: changelog, fix whitespace] Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2014-10-01PCI/MSI: Remove unused kobject from struct msi_descYijing Wang2-13/+0
After commit 1c51b50c2995 ("PCI/MSI: Export MSI mode using attributes, not kobjects"), the kobject in struct msi_desc is unused. Remove the unused struct kobject from struct msi_desc. [bhelgaas: changelog] Fixes: 1c51b50c2995 ("PCI/MSI: Export MSI mode using attributes, not kobjects") Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-10-01PCI/MSI: Rename pci_msi_check_device() to pci_msi_supported()Alexander Gordeev1-15/+12
Rename pci_msi_check_device() to pci_msi_supported() for clarity. Note that pci_msi_supported() returns true if MSI/MSI-X is supported, so code like: if (pci_msi_supported(...)) reads naturally. [bhelgaas: changelog, split to separate patch, reverse sense] Signed-off-by: Alexander Gordeev <agordeev@redhat.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2014-10-01PCI/MSI: Move D0 check into pci_msi_check_device()Alexander Gordeev1-17/+10
Both callers of pci_msi_check_device() check that the device is in D0 state, so move the check from the callers into pci_msi_check_device() itself. In pci_enable_msi_range(), note that pci_msi_check_device() never returns a positive value any more, so the loop that called it until it returns zero or negative is no longer necessary. [bhelgaas: changelog, split to separate patch] Signed-off-by: Alexander Gordeev <agordeev@redhat.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2014-10-01PCI/MSI: Remove arch_msi_check_device()Alexander Gordeev2-21/+3
No architectures implement arch_msi_check_device() or the struct msi_chip .check_device() method, so remove them. Remove the "type" parameter to pci_msi_check_device() because it was only used to call arch_msi_check_device() and is no longer needed. [bhelgaas: changelog, split to separate patch] Signed-off-by: Alexander Gordeev <agordeev@redhat.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2014-10-01irqchip: armada-370-xp: Remove arch_msi_check_device()Alexander Gordeev1-10/+4
Move MSI checks from arch_msi_check_device() to arch_setup_msi_irqs(). This makes the code more compact and allows removing arch_msi_check_device() from generic MSI code. Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Alexander Gordeev <agordeev@redhat.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Jason Cooper <jason@lakedaemon.net> CC: Thomas Gleixner <tglx@linutronix.de>
2014-10-01PCI/MSI/PPC: Remove arch_msi_check_device()Alexander Gordeev10-122/+50
Move MSI checks from arch_msi_check_device() to arch_setup_msi_irqs(). This makes the code more compact and allows removing arch_msi_check_device() from generic MSI code. Signed-off-by: Alexander Gordeev <agordeev@redhat.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Michael Ellerman <mpe@ellerman.id.au>
2014-09-30arm64: Add architectural support for PCILiviu Dudau7-2/+134
Use the generic PCI domain and OF functions to provide support for PCI on arm64. [bhelgaas: Change comments to use generic PCI, not just PCIe. Nothing at this level is PCIe-specific.] Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com>
2014-09-30PCI: Add pci_remap_iospace() to map bus I/O resourcesLiviu Dudau3-0/+38
Add pci_remap_iospace() to map bus I/O resources into the CPU virtual address space. Architectures with special needs may provide their own version, but most should be able to use this one. This function is useful for PCI host bridge drivers that need to map the PCI I/O resources into virtual memory space. [bhelgaas: phys_addr description, drop temporary "err" variable] Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> CC: Arnd Bergmann <arnd@arndb.de>
2014-09-30of/pci: Add support for parsing PCI host bridge resources from DTLiviu Dudau2-0/+123
Provide a function to parse the PCI DT ranges that can be used to create a pci_host_bridge structure together with its associated bus. Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com> [make io_base parameter optional] Signed-off-by: Robert Richter <rrichter@cavium.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> CC: Arnd Bergmann <arnd@arndb.de> CC: Grant Likely <grant.likely@linaro.org> CC: Rob Herring <robh+dt@kernel.org> CC: Catalin Marinas <catalin.marinas@arm.com>
2014-09-30of/pci: Add pci_get_new_domain_nr() and of_get_pci_domain_nr()Liviu Dudau4-0/+44
Add pci_get_new_domain_nr() to allocate a new domain number and of_get_pci_domain_nr() to retrieve the PCI domain number of a given device from DT. Host bridge drivers or architecture-specific code can choose to implement their PCI domain number policy using these two functions. Using of_get_pci_domain_nr() guarantees a stable PCI domain number on every boot provided that all host bridge controllers are assigned a number in the device tree using "linux,pci-domain" property. Mixing use of pci_get_new_domain_nr() and of_get_pci_domain_nr() is not recommended as it can lead to potentially conflicting domain numbers being assigned to root buses behind different host bridges. Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> CC: Arnd Bergmann <arnd@arndb.de> CC: Grant Likely <grant.likely@linaro.org> CC: Rob Herring <robh+dt@kernel.org> CC: Catalin Marinas <catalin.marinas@arm.com>
2014-09-30PCI: Add generic domain handlingCatalin Marinas2-3/+29
The handling of PCI domains (or PCI segments in ACPI speak) is usually a straightforward affair but its implementation is currently left to the architectural code, with pci_domain_nr(b) querying the value of the domain associated with bus b. This patch introduces CONFIG_PCI_DOMAINS_GENERIC as an option that can be selected if an architecture wants a simple implementation where the value of the domain associated with a bus is stored in struct pci_bus. The architectures that select CONFIG_PCI_DOMAINS_GENERIC will then have to implement pci_bus_assign_domain_nr() as a way of setting the domain number associated with a root bus. All child buses except the root bus will inherit the domain_nr value from their parent. Signed-off-by: Catalin Marinas <Catalin.Marinas@arm.com> [Renamed pci_set_domain_nr() to pci_bus_assign_domain_nr()] Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> CC: Arnd Bergmann <arnd@arndb.de>
2014-09-30of/pci: Fix the conversion of IO ranges into IO resourcesLiviu Dudau5-30/+80
The ranges property for a host bridge controller in DT describes the mapping between the PCI bus address and the CPU physical address. The resources framework however expects that the IO resources start at a pseudo "port" address 0 (zero) and have a maximum size of IO_SPACE_LIMIT. The conversion from PCI ranges to resources failed to take that into account, returning a CPU physical address instead of a port number. Also fix all the drivers that depend on the old behaviour by fetching the CPU physical address based on the port number where it is being needed. Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> CC: Grant Likely <grant.likely@linaro.org> CC: Rob Herring <robh+dt@kernel.org> CC: Arnd Bergmann <arnd@arndb.de> CC: Thierry Reding <thierry.reding@gmail.com> CC: Simon Horman <horms@verge.net.au> CC: Catalin Marinas <catalin.marinas@arm.com>
2014-09-30PCI: designware: Setup and clear exactly one MSI at a timeLucas Stach1-40/+7
The setup_irq function is supposed to set up exactly one MSI IRQ. Multiple IRQ setup is handled differently, to respect the choices made by the upper layers. Also only clear one MSI IRQ at a time; the PCI core will call into this function multiple times if it has to tear down more than one MSI IRQ. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Pratyush Anand <pratyush.anand@st.com> Acked-by: Jingoo Han <jg1.han@samsung.com>
2014-09-30PCI: Add missing MEM_64 mask in pci_assign_unassigned_bridge_resources()Yinghai Lu1-1/+1
In 5b28541552ef ("PCI: Restrict 64-bit prefetchable bridge windows to 64-bit resources"), we added IORESOURCE_MEM_64 to the mask in pci_assign_unassigned_root_bus_resources(), but not to the mask in pci_assign_unassigned_bridge_resources(). Add IORESOURCE_MEM_64 to the pci_assign_unassigned_bridge_resources() type mask. Fixes: 5b28541552ef ("PCI: Restrict 64-bit prefetchable bridge windows to 64-bit resources") Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> CC: stable@vger.kernel.org # v3.16+
2014-09-30of/pci: Move of_pci_range_to_resource() to of/address.cLiviu Dudau2-11/+18
We need to enhance of_pci_range_to_resources() enough that it won't make sense for it to be inline anymore. Move it to drivers/of/address.c, under #ifdef CONFIG_PCI. of_address.h previously implemented of_pci_range_to_resources() unconditionally, regardless of any config options. The implementation in address.c is defined only when CONFIG_OF_ADDRESS=y and CONFIG_PCI=y, so add a dummy version to avoid build errors when CONFIG_OF or CONFIG_OF_ADDRESS is not defined. [bhelgaas: drop extra detail from changelog, move def under CONFIG_PCI, add dummy of_pci_range_to_resource() for build errors (from Arnd)] Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> CC: Grant Likely <grant.likely@linaro.org> CC: Rob Herring <robh+dt@kernel.org> CC: Arnd Bergmann <arnd@arndb.de> CC: Catalin Marinas <catalin.marinas@arm.com>
2014-09-30ARM: Define PCI_IOBASE as the base of virtual PCI IO spaceLiviu Dudau1-0/+1
This is needed for calls into OF code that parses PCI ranges. It signals support for memory mapped PCI I/O accesses that are described by device trees. Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Arnd Bergmann <arnd@arndb.de> CC: Russell King <linux@arm.linux.org.uk> CC: Rob Herring <robh+dt@kernel.org>
2014-09-30of/pci: Add pci_register_io_range() and pci_pio_to_address()Liviu Dudau2-0/+116
Some architectures do not have a simple view of the PCI I/O space and instead use a range of CPU addresses that map to bus addresses. For some architectures these ranges will be expressed by OF bindings in a device tree file. This patch introduces a pci_register_io_range() helper function with a generic implementation that can be used by such architectures to keep track of the I/O ranges described by the PCI bindings. If the PCI_IOBASE macro is not defined, that signals lack of support for PCI and we return an error. In order to retrieve the CPU address associated with an I/O port, a new helper function pci_pio_to_address() is introduced. This will search in the list of ranges registered with pci_register_io_range() and return the CPU address that corresponds to the given port. [arnd: add dummy !CONFIG_OF pci_pio_to_address() to fix build errors] Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Rob Herring <robh@kernel.org> CC: Grant Likely <grant.likely@linaro.org>
2014-09-30asm-generic/io.h: Fix ioport_map() for !CONFIG_GENERIC_IOMAPLiviu Dudau1-1/+1
The !CONFIG_GENERIC_IOMAP version of ioport_map() is wrong. It returns a mapped, i.e., virtual, address that can start from zero and completely ignores the PCI_IOBASE and IO_SPACE_LIMIT that most architectures that use !CONFIG_GENERIC_MAP define. Tested-by: Tanmay Inamdar <tinamdar@apm.com> Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
2014-09-29PCI: Add ACS quirk for Intel 10G NICsAlex Williamson1-6/+28
Intel has verified there is no peer-to-peer between functions for the below selection of 82598, 82599, and X520 10G NICs. These NICs lack an ACS capability, so we're not able to determine this isolation without the help of quirks. Generalize the Solarflare quirk and add these Intel 10G NICs. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: John Ronciak <John.ronciak@intel.com>
2014-09-25PCI/AER: Rename PCI_ERR_UNC_TRAIN to PCI_ERR_UNC_UNDChen, Gong3-3/+3
In PCIe r1.0, sec 5.10.2, bit 0 of the Uncorrectable Error Status, Mask, and Severity Registers was for "Training Error." In PCIe r1.1, sec 7.10.2, bit 0 was redefined to be "Undefined." Rename PCI_ERR_UNC_TRAIN to PCI_ERR_UNC_UND to reflect this change. No functional change. [bhelgaas: changelog] Signed-off-by: Chen, Gong <gong.chen@linux.intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2014-09-25PCI/AER: Add additional PCIe AER error stringsChen, Gong1-2/+9
Add strings for all AER error bits defined in PCIe r3.0. [bhelgaas: changelog, drop designated initializer change] Signed-off-by: Chen, Gong <gong.chen@linux.intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2014-09-25trace, RAS: Add additional PCIe AER error stringsChen, Gong1-13/+22
Add all AER error bits defined in PCIe r3.0. [bhelgaas: changelog] Signed-off-by: Chen, Gong <gong.chen@linux.intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2014-09-25trace, RAS: Replace bare numbers with #defines for PCIe AER error stringsChen, Gong1-16/+17
Replace bare numbers like "BIT(0)" with the existing #defines, e.g., PCI_ERR_COR_RCVR, to improve maintainability. This way grep will find more uses of the #defines. No functional change. [bhelgaas: changelog] Signed-off-by: Chen, Gong <gong.chen@linux.intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2014-09-24PCI: Move PCI_VENDOR_ID_VMWARE to pci_ids.hFrancesco Ruggeri5-4/+2
Move PCI_VENDOR_ID_VMWARE from device-specific files to pci_ids.h. It is useful to always have access to it, especially when accessing subsystem_vendor_id on emulated devices. [bhelgaas: keep pci_ids.h sorted and use lower-case hex] Signed-off-by: Francesco Ruggeri <fruggeri@arista.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2014-09-24PCI: Remove assignment from complicated "if" conditionsQuentin Lambert1-4/+9
The modifications effectively change the value of len_tmp in the case where the first condition is not met. Signed-off-by: Quentin Lambert <lambert.quentin@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2014-09-24PCI: Remove assignment from "if" conditionsQuentin Lambert9-30/+66
The following Coccinelle semantic patch was used to find and correct cases of assignments in "if" conditions: @@ expression var, expr; statement S; @@ + var = expr; if( - (var = expr) + var ) S Signed-off-by: Quentin Lambert <lambert.quentin@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2014-09-24PCI: Remove unnecessary curly bracesQuentin Lambert8-36/+22
Remove curly braces in simple "if" cases. No functional change. Signed-off-by: Quentin Lambert <lambert.quentin@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2014-09-24PCI: Add space before open parenthesisQuentin Lambert8-39/+39
Add space before open parenthesis as is conventional. No functional change. [bhelgaas: fix a few more in ibmphp, shpchp] Signed-off-by: Quentin Lambert <lambert.quentin@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2014-09-24PCI: designware: Add get_msi_data() to pcie_host_opsMinghuan Lian2-1/+7
Add a struct pcie_host_ops .get_msi_data() method for platforms to return their special MSI message data. Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Mohit KUMAR <mohit.kumar@st.com>
2014-09-24PCI: designware: Rename get_msi_data() to get_msi_addr()Minghuan Lian2-3/+3
The struct pcie_host_ops .get_msi_data() method returns the MSI message address. To accurately express its purpose, rename it to .get_msi_addr(). Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Mohit KUMAR <mohit.kumar@st.com>
2014-09-24PCI: designware: Fix IO resource end address calculationMinghuan Lian1-1/+1
End address should be equal to start_addr + size - 1. Fix PCI IO resource end address calculation. Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Mohit KUMAR <mohit.kumar@st.com>
2014-09-24PCI: designware: Fix configuration base address when using 'reg'Minghuan Lian1-2/+0
The code has calculated cfg0_base and cfg1_base when parsing 'reg' or 'ranges' property of PCI DTS node, so remove duplicate calculation. When using 'reg', resource cfg is not used, so this code computed an incorrect configuration base. Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Mohit KUMAR <mohit.kumar@st.com>
2014-09-24x86/PCI: Mark PCI BIOS initialization code as suchMathias Krause1-4/+4
The pci_find_bios() function is only ever called from initialization code, therefore can be marked as such, too. This, in turn, allows marking other functions called only in this context as well. The bios32_indirect variable can be marked as __initdata as it is only referenced from __init functions now. Signed-off-by: Mathias Krause <minipli@googlemail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Ingo Molnar <mingo@kernel.org>
2014-09-24x86/PCI: Constify pci_mmcfg_probes[] arrayMathias Krause1-1/+1
The pci_mmcfg_probes[] array is only ever read, therefore make it const. Signed-off-by: Mathias Krause <minipli@googlemail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Ingo Molnar <mingo@kernel.org>
2014-09-24x86/PCI: Mark constants of pci_mmcfg_nvidia_mcp55() as __initconstMathias Krause1-10/+14
The constants in pci_mmcfg_nvidia_mcp55() need to be marked as __initconst or they will remain in memory after init memory was released. Signed-off-by: Mathias Krause <minipli@googlemail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Ingo Molnar <mingo@kernel.org>
2014-09-24x86/PCI: Move __init annotation to the correct placeMathias Krause1-7/+7
According to include/linux/init.h, the __init annotation should be added immediately before the function name. However, for quite a few functions in mmconfig-shared.c this is not the case. It's either before the return type or even in the middle of it. Beside gcc still getting it right, we should change them to comply to the rules of include/linux/init.h. Signed-off-by: Mathias Krause <minipli@googlemail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Ingo Molnar <mingo@kernel.org>
2014-09-23PCI: pciehp: Stop disabling notifications during initYinghai Lu1-3/+0
During pciehp initialization, we previously wrote two hotplug commands: pciehp_probe pcie_init pcie_disable_notification pcie_write_cmd # command 1 pcie_init_notification pcie_enable_notification pcie_write_cmd # command 2 For controllers with errata like Intel CF118, we previously waited for a timeout before issuing the second hotplug command because the first command only updates interrupt enable bits and is not a "real" hotplug command, so the controller doesn't report Command Completed for it. But there's no need to disable notifications in the first place. If BIOS left them enabled, we could easily take an interrupt before disabling them, so there's no benefit in disabling them for the tiny window before we enable them. Drop the unnecessary pcie_disable_notification() call. [bhelgaas: changelog] Link: http://www.intel.com/content/www/us/en/processors/xeon/xeon-e7-v2-spec-update.html Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2014-09-23PCI: pciehp: Add more Slot Control debug outputYinghai Lu1-1/+9
Add more Slot Control debug output and move one print after pcie_write_cmd() to be consistent with other debug output. Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2014-09-23PCI: pciehp: Fix wait time in timeout messageYinghai Lu1-1/+1
When we warned about a timeout on a hotplug command, we previously printed the time between calls to pcie_write_cmd(), without accounting for any time spent actually waiting. Consider this sequence: pcie_write_cmd write SLTCTL cmd_started = jiffies # T1 pcie_write_cmd pcie_wait_cmd now = jiffies # T2 wait_event_timeout # we may wait here if (timeout) ctrl_info("Timeout on command issued %u msec ago", jiffies_to_msecs(now - cmd_started)) We previously printed (T2 - T1), but that doesn't include the time spent in wait_event_timeout(). Fix this by using the current jiffies value, not the one cached before calling wait_event_timeout(). [bhelgaas: changelog, use current jiffies instead of adding timeout] Fixes: 40b960831cfa ("PCI: pciehp: Compute timeout from hotplug command start time") Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2014-09-22PCI: Add ACS quirk for Solarflare SFC9120 & SFC9140Alex Williamson1-0/+17
Solarflare confirms that these devices do not allow peer-to-peer between functions. Quirk them to allow IOMMU grouping to expose this isolation. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Robert Stonehouse <rstonehouse@solarflare.com>
2014-09-22PCI: designware: Use NULL instead of falseFabio Estevam1-1/+1
of_get_address() expects pointers in the third and fourth parameters. Pass NULL in order to fix the following sparse warnings: drivers/pci/host/pcie-designware.c:433:51: warning: Using plain integer as NULL pointer drivers/pci/host/pcie-designware.c:433:58: warning: Using plain integer as NULL pointer Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Lucas Stach <l.stach@pengutronix.de> Acked-by: Jingoo Han <jg1.han@samsung.com>
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