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2016-01-25ARM: dts: sun9i: Include SDC2_RST pin in mmc2_8bit_pinsChen-Yu Tsai1-1/+2
mmc2_8bit_pins is used with eMMC chips, which also have a reset pin. The MMC controller also has a reset output that is supported. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-01-25ARM: dts: sun8i: Include SDC2_RST pin in mmc2_8bit_pinsChen-Yu Tsai1-1/+1
mmc2_8bit_pins is used with eMMC chips, which also have a reset pin. The MMC controller also has a reset output that is supported. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-01-25ARM: dts: sun6i: sina31s: Switch to mmc3 for onboard eMMCChen-Yu Tsai1-2/+4
According to Allwinner, only mmc3 supports 8 bit DDR transfers for eMMC. Switch to mmc3 for the onboard eMMC, and also assign vqmmc for signal voltage sensing, and "cap-mmc-hw-reset" to denote this instance can use eMMC hardware reset. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-01-25ARM: dts: sun6i: Add mmc3 pins for 8 bit emmcChen-Yu Tsai1-0/+10
mmc2 and mmc3 are available on the same pins, with different mux values. However, only mmc3 supports 8 bit DDR transfer modes. Since preference for mmc3 over mmc2 is due to DDR transfer modes, just set the drive strength to 40mA, which is needed for DDR. This pinmux setting also includes the hardware reset pin for emmc. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-01-25ARM: dts: sun9i: Use sun9i specific mmc compatibleChen-Yu Tsai1-4/+4
sun9i/A80 MMC controllers have a larger FIFO, and the FIFO DMA trigger levels can be increased. Also, the mmc module clock parent has a higher clock rate, and the sample and output delay phases are different. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-01-25ARM: dts: sun8i: sina33: Enable hardware reset and HS-DDR for eMMCChen-Yu Tsai1-0/+3
mmc2 has a special pin for eMMC hardware reset, which is controllable from the controller. Add the "mmc-cap-hw-reset" property to denote that this controller supports this function, and the pins are actually used. Also increase the signal drive strength for mmc2 pins, for HS-DDR mode support. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-01-25ARM: sun5i: chip: Add CPU regulator for cpufreqMaxime Ripard1-0/+4
The current DT doesn't have a phandle to the CPU regulator in the CPU node, which disables the CPU voltage scaling entirely. Add that phandle. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-01-25ARM: dts: sun8i: Add device tree for Cubietruck PlusChen-Yu Tsai2-0/+66
Cubietruck Plus is a A83T/H8 based development board. The board has standard DDR3 SDRAM, AXP818 PMIC/codec, SD/MMC, eMMC, USB 2.0 host via HSIC USB Hub, USB OTG, SATA via USB bridge, gigabit ethernet, WiFi, headphone out / mic in, and various GPIO headers. The board also has an EEPROM on i2c0 which holds the MAC address. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-01-25ARM: dts: sun8i: Add watchdog device node for A83TChen-Yu Tsai1-0/+7
The A83T, like previous Allwinner SoCs, has a watchdog as part of its timer block. Add a device node for it. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-01-25ARM: dts: sun8i: Enable timer node for A83TVishnu Patekar1-0/+8
A83T timer is compatible with that of earlier SOCs. Just add timer node to enable and re-use it. Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com> Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-01-25ARM: dts: sun8i: Add A83T HomletV2 Board by AllwinnerVishnu Patekar2-0/+65
H8Homlet Proto v2.0 Board is A83T Dev Board by Allwinner. It has UART, ethernet, USB, HDMI, etc ports on it. A83T patches are tested on this board. It has UART, ethernet, USB, HDMI, etc ports on it. For FEL mode it needs USB A-A(Male) cable. I used uart0 which is multiplexed to microsd pins PF2 and PF4. Enabled UART0 Header(PB9, PB10 pins). Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>