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2015-06-02break kconfig dependency loopGerd Hoffmann2-1/+4
After adding virtio-gpu I get this funky kconfig dependency loop. scripts/kconfig/conf --oldconfig Kconfig drivers/video/fbdev/Kconfig:5:error: recursive dependency detected! drivers/video/fbdev/Kconfig:5: symbol FB is selected by DRM_KMS_FB_HELPER drivers/gpu/drm/Kconfig:34: symbol DRM_KMS_FB_HELPER is selected by DRM_VIRTIO_GPU drivers/gpu/drm/virtio/Kconfig:1: symbol DRM_VIRTIO_GPU depends on VIRTIO drivers/virtio/Kconfig:1: symbol VIRTIO is selected by REMOTEPROC drivers/remoteproc/Kconfig:4: symbol REMOTEPROC is selected by OMAP_REMOTEPROC drivers/remoteproc/Kconfig:12: symbol OMAP_REMOTEPROC depends on OMAP_IOMMU drivers/iommu/Kconfig:141: symbol OMAP_IOMMU is selected by VIDEO_OMAP3 drivers/media/platform/Kconfig:96: symbol VIDEO_OMAP3 depends on VIDEO_V4L2 drivers/media/v4l2-core/Kconfig:6: symbol VIDEO_V4L2 depends on I2C drivers/i2c/Kconfig:7: symbol I2C is selected by FB_DDC drivers/video/fbdev/Kconfig:59: symbol FB_DDC is selected by FB_CYBER2000_DDC drivers/video/fbdev/Kconfig:374: symbol FB_CYBER2000_DDC depends on FB_CYBER2000 drivers/video/fbdev/Kconfig:362: symbol FB_CYBER2000 depends on FB Making VIDEO_OMAP3 depend on OMAP_IOMMU instead of selecting it breaks the loop, which looks like the best way to handle it to me. Updated OMAP_IOMMU help text accordingly. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Acked-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
2015-05-29drm: clean up drm_mm debugfs outputRussell King1-2/+2
The drm_mm debugfs output is difficult to read as two different formats are used for the addresses: 0x00000080000000-0x0000008000b000: 45056: used 0x8000b000-0x80016000: 45056: free 0x00000080016000-0x0000008001b000: 20480: used 0x8001b000-0x817a1000: 24666112: free 0x000000817a1000-0x000000817a8000: 28672: used 0x000000817a8000-0x00000081ba8000: 4194304: used Fix this by using %#018llx for all addresses, thus making the output: 0x0000000080000000-0x000000008000b000: 45056: used 0x000000008000b000-0x0000000080016000: 45056: free 0x0000000080016000-0x000000008001b000: 20480: used 0x000000008001b000-0x00000000817a1000: 24666112: free 0x00000000817a1000-0x00000000817a8000: 28672: used 0x00000000817a8000-0x0000000081ba8000: 4194304: used Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-05-28radeon: Deinline indirect register accessor functionsDenys Vlasenko7-197/+241
This patch deinlines indirect register accessor functions. These functions perform two mmio accesses, framed by spin lock/unlock. Spin lock/unlock by itself takes more than 50 cycles in ideal case (if lock is exclusively cached on current CPU). With this .config: http://busybox.net/~vda/kernel_config, after uninlining these functions have sizes and callsite counts as follows: r600_uvd_ctx_rreg: 111 bytes, 4 callsites r600_uvd_ctx_wreg: 113 bytes, 5 callsites eg_pif_phy0_rreg: 106 bytes, 13 callsites eg_pif_phy0_wreg: 108 bytes, 13 callsites eg_pif_phy1_rreg: 107 bytes, 13 callsites eg_pif_phy1_wreg: 108 bytes, 13 callsites rv370_pcie_rreg: 111 bytes, 21 callsites rv370_pcie_wreg: 113 bytes, 24 callsites r600_rcu_rreg: 111 bytes, 16 callsites r600_rcu_wreg: 113 bytes, 25 callsites cik_didt_rreg: 106 bytes, 10 callsites cik_didt_wreg: 107 bytes, 10 callsites tn_smc_rreg: 106 bytes, 126 callsites tn_smc_wreg: 107 bytes, 116 callsites eg_cg_rreg: 107 bytes, 20 callsites eg_cg_wreg: 108 bytes, 52 callsites Functions r100_mm_rreg() and r100_mm_rreg() have a fast path and a locked (slow) path. This patch deinlines only slow path. r100_mm_rreg_slow: 78 bytes, 2083 callsites r100_mm_wreg_slow: 81 bytes, 3570 callsites Reduction in code size is more than 65,000 bytes: text data bss dec hex filename 85740176 22294680 20627456 128662312 7ab3b28 vmlinux.before 85674192 22294776 20627456 128598664 7aa4288 vmlinux Signed-off-by: Denys Vlasenko <dvlasenk@redhat.com> Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: linux-kernel@vger.kernel.org Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-28drm/radeon: Fix max_vblank_count value for current display enginesMichel Dänzer1-1/+7
The value was much too low, which could cause the userspace visible vblank counter to move backwards when the hardware counter wrapped around. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-28drm/radeon: stop using addr to check for BO moveChristian König2-25/+32
It is theoretically possible that a swapped out BO gets the same GTT address, but different backing pages while being swapped in. Instead just use another VA state to note updated areas. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-28drm/radeon: clean up radeon_audio_enableAlex Deucher2-11/+9
- make it static - fix mask/bool handling for last param Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2015-05-26drm/radeon: take the mode_config mutex when dealing with hpds (v2)Alex Deucher1-0/+2
Since we are messing with state in the worker. v2: drop the changes in the mst worker Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2015-05-26drm/radeon: make dpcd parameters constAlex Deucher2-5/+5
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-26drm/radeon: Use DECLARE_BITMAPJoe Perches1-1/+1
Use the generic mechanism to declare a bitmap instead of unsigned long. Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-26drm/radeon/tn/si: enable/disable vce cg when encoding v2Alex Deucher2-2/+16
Some of the vce clocks are automatic, others need to be manually enabled. For ease, just disable cg when vce is active. v2: rebased, call vce_v1_0_enable_mgcg directly Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-26drm/radeon: add support for vce 1.0 clock gatingAlex Deucher3-0/+60
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-26drm/radeon: add VCE 1.0 support v4Christian König8-3/+274
Initial support for VCE 1.0 using newest firmware. v2: rebased v3: fix for TN v4: fix FW size calculation Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-26drm/radeon/dpm: add vce support for SIAlex Deucher1-4/+98
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-26drm/radeon/dpm: add vce dpm support for TNAlex Deucher1-0/+76
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-26drm/radeon: implement tn_set_vce_clocksAlex Deucher4-0/+40
This implements the function to set the vce clocks on TN hardware. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-26drm/radeon: implement si_set_vce_clocks v2Christian König5-0/+157
For setting clocks with VCE v1.0 v2: (chk) rebased on current tree Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-26drm/radeon: allow some more VCE firmware versionsChristian König1-1/+3
They seem to work fine with the kernel interface. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-26drm/radeon: rework VCE FW size calculationChristian König4-7/+15
Previously we were completely over allocating, fix this by actually implementing the size calculation. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-26drm/radeon: add a GPU reset counter queryable by userspaceMarek Olšák5-1/+9
Userspace will be able to tell whether a GPU reset occured by comparing an old referece value of the counter with a new value. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-05-25drm: rcar-du: Split planes pre-association 4/4 between CRTCsLaurent Pinchart2-6/+4
If we have more than one CRTCs in a group pre-associate planes 0-3 with CRTC 0 and planes 4-7 with CRTC 1 to minimize flicker occurring when the association is changed. The pre-association could be controlled by a module parameter if needed. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2015-05-25drm: rcar-du: Store the number of CRTCs per group in the group structureLaurent Pinchart3-4/+5
The number of CRTCs in a group is only used to implement plane initialization for now, but is also needed to implement pre-association of planes to CRTCs. Store it in the group structure instead of computing it on demand. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2015-05-25drm: rcar-du: Consider plane to CRTC associations in the plane allocatorLaurent Pinchart1-1/+21
Hardware planes are driven by the timing generator of the CRTC they are associated to. Changing the association requires restarting the CRTC group that the plane belongs to, resulting in flicker on the other CRTC. To avoid flicker as much as possible, try to allocate planes first from the free planes already associated with the target CRTC. If allocation fails then fall back to allocation from all free planes. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2015-05-25drm: rcar-du: Keep plane to CRTC associations when disabling a planeLaurent Pinchart3-21/+37
Changing the plane to CRTC associations requires restarting the CRTC group, creating visible flicker. Mitigate the issue by changing plane association only when a plane becomes enabled, not when it get disabled. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2015-05-25drm: rcar-du: Add plane allocation debuggingLaurent Pinchart1-1/+37
Plane allocation is a complex process, add debugging statements to help finding out what could might wrong. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2015-05-25drm: rcar-du: Rename to_rcar_du_plane_state to to_rcar_plane_stateLaurent Pinchart4-16/+16
All other cast functions are named without using "du", make the plane state cast consistent with them. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2015-05-25drm: rcar-du: Embed rcar_du_planes structure into rcar_du_groupLaurent Pinchart5-15/+10
The rcar_du_planes structure contains a single field and is only instantiated in the rcar_du_group structure. Embed it directly and remove the rcar_du_planes structure. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2015-05-25drm: rcar-du: Move properties from rcar_du_planes to rcar_du_deviceLaurent Pinchart4-38/+47
The plane property objects are instantiated once per CRTC group, while they should be instantiated once globally for the device. Fix this and move them to the rcar_du_device structure. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2015-05-25drm: rcar-du: Document the rcar_du_plane_state structureLaurent Pinchart1-1/+10
Document the structure fields using kerneldoc. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2015-05-25drm: rcar-du: Document the rcar_du_crtc structureLaurent Pinchart1-0/+14
Document the structure fields using kerneldoc. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2015-05-25drm: adv7511: Fix crash in IRQ handler when no encoder is associatedLaurent Pinchart1-1/+1
The ADV7511 is probed before its slave encoder init function associates it with an encoder. This creates a time window during which hot plug detection interrupts can occur with an encoder, resulting in a crash in the IRQ handler. Fix this by ignoring hot plug detection IRQs when no encoder is associated yet. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Lars-Peter Clausen <lars@metafoo.de>
2015-05-22drm/i915: Update DRIVER_DATE to 20150522Daniel Vetter1-1/+1
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-22drm/i915: Introduce DRM_I915_THROTTLE_JIFFIESChris Wilson3-2/+8
As Daniel commented on commit b7ffe1362c5f468b853223acc9268804aa92afc8 Author: Chris Wilson <chris@chris-wilson.co.uk> Date: Mon Apr 27 13:41:24 2015 +0100 drm/i915: Free RPS boosts for all laggards it is better to be explicit when sharing hardcoded values such as throttle/boost timeouts. Make it so! Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-22drm/i915: Use the correct destructor for freeing requests on errorChris Wilson1-8/+8
After allocating from the slab cache, we then need to free the request back into the slab cache upon error (and not call kfree as that leads to eventual memory corruption). Fixes regression from commit efab6d8dd158fdccbe6a030f89fbf9ca0a9564e4 Author: Chris Wilson <chris@chris-wilson.co.uk> Date: Tue Apr 7 16:20:57 2015 +0100 drm/i915: Use a separate slab for requests Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-22drm/i915/skl: don't fail colorkey + scaler requestChandra Konduru2-14/+30
There is a mplayer video failure reported with xv. This is because there is a request to do both plane scaling and colorkey. Because skl hw doesn't support plane scaling and colorkey at the same time, request is failed which is expected behavior. To make xv operate, this patch allows colorkey continue to work without using scaler. Then behavior would be similar to platforms without plane scaler support. Signed-off-by: Chandra Konduru <chandra.konduru@intel.com> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90449 [danvet: change can_scale to bool as requested by Ville.] Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-22drm/i915: Enable GTT caching on gen8Ville Syrjälä2-0/+15
GTT caching was disabled by default on gen8 due to not working with big pages. Some information suggests that it got fixed, but still GTT caching has been left disabled by default. Or could be it just meant that the default was changed to off, and hence the problem got solved. Enable GTT caching in the hopes of some performance increase. Whether or not the big pages issue has been fixed is irrelevant at this stage since we don't use big pages. This gives me a 1-2% improvement in xonotic on my BSW. Haven't tried BDW, but supposedly it has larger TLBs so might not benefit as much. On HSW GTT caching is enabled by default. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-22drm/i915: Move WaProgramL3SqcReg1Default:bdw to init_clock_gating()Ville Syrjälä2-3/+10
GEN8_L3SQCREG1 isn't saved in the context (verified by going through a context dump), and so we shouldn't be using the ring w/a code to initialize it. Also Bspec explicitly talks about MMIO and writing it with the CPU. Additionally there's another w/a WaTempDisableDOPClkGating:bdw which tells us to disable DOP clock gating around the GEN8_L3SQCREG1 write to make sure everyone notices the change. So let's do that as well. Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-22drm/i915: Use ilk_init_lp_watermarks() on BDWVille Syrjälä1-3/+1
We're not using ilk_init_lp_watermarks() on BDW for some reason. Probably due to the BDW patches and the relevant WM patches landing roughlly at the same time. Fix it up. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-21drm/i915: Disable FDI RX/TX before the portsVille Syrjälä1-2/+3
Bspec says we should disable the FDI RX/TX before disabling the PCH ports. Do so. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-21drm/i915: Disable CRT port after pipe on PCH platformsVille Syrjälä1-1/+14
Follow the BSpec sequence for the CRT port as well on PCH platforms, ie. disable the pipe before the port. Didn't bother looking at DDI in detail yet, so leave that one be even though the CRT is a PCH port there. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-21drm/i915: Disable SDVO port after the pipe on PCH platformsVille Syrjälä1-8/+17
While at it also remove the redundant/unneeded w/a like done for hdmi already. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> [danvet: Mention that this also removes the unneeded w/a, as suggested by Jesse.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-21drm/i915: Disable HDMI port after the pipe on PCH platformsVille Syrjälä1-4/+29
BSpec says we should disable all ports after the pipe on PCH platforms. Do so. Fixes a pipe off timeout on ILK now caused by the transcoder B workaround. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-21drm/i915: Fix the IBX transcoder B workaroundsVille Syrjälä3-68/+60
Currently the IBX transcoder B workarounds are not working correctly. Well, the HDMI one seems to be working somewhat, but the DP one is definitely busted. After a bit of experimentation it looks like the best way to make this work is first disable the port on transcoder B, and then re-enable it transcoder A, and immediately disable it again. We can also clean up the code by noting that we can't be called without a valid crtc. And also note that port A on ILK does not need the workaround, so let's check for that one too. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-21drm/i915: Write the SDVO reg twice on IBXVille Syrjälä1-0/+8
On IBX the SDVO/HDMI register write may be masked when enabling the port, so it may need to written twice. The HDMI code does this, but the SDVO code does not. Add the workaround to the SDVO code as well. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-21drm/i915: Fix DP enhanced framing for CPTVille Syrjälä2-2/+10
Currently we're always enabling enhanced framing on CPT even if the sink doesn't support it. Fix this up by actaully looking at what the sink tells us. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-21drm/i915: Clean up the CPT DP .get_hw_state() port readoutVille Syrjälä2-21/+6
Define a TRANS_DP_PIPE_TO_PORT() to make the CPT DP .get_hw_state() pipe readout neater. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-21drm/i915: Clarfify the DP code platform checksVille Syrjälä1-23/+23
intel_dp.c is a mess with all the checks for different platform/PCH variants and ports. Try to clean it up by recognizing the following facts: - IVB port A, and CPT port B/C/D are always the special cases - VLV/CHV don't have port A - Using the same kind of logic everywhere makes things much easier to parse So let's move the IVB port A and PCH port B/C/D checks to be done first, and let the other cases fall through, and always check for these things using the same logic. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-21drm/i915: Remove the double register write from intel_disable_hdmi()Ville Syrjälä1-8/+0
IBX can have problems with the first write to the port register getting masked when enabling the port. We are trying to apply the workaround also when disabling the port where it's not needed, and we also try to apply it for CPT/PPT as well which don't need it. Just kill it. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> [danvet: Resolve conflict with the remove CHV if block.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-21drm/i915: Remove a bogus 12bpc "toggle" from intel_disable_hdmi()Ville Syrjälä1-8/+0
The IBX 12bpc port enable toggle is only relevant when enabling the port, not when disabling it. Also this code doesn't actually toggle anything, and essentially just writes the port register one extra time. Furthermore CPT/PPT don't need such workarounds and yet we include them. Just kill it. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-21drm/i915/skl: Deinit/init the display at suspend/resumeDamien Lespiau6-2/+223
We need to re-init the display hardware when going out of suspend. This includes: - Hooking the PCH to the reset logic - Restoring CDCDLK - Enabling the DDB power Among those, only the CDCDLK one is a bit tricky. There's some complexity in that: - DPLL0 (which is the source for CDCLK) has two VCOs, each with a set of supported frequencies. As eDP also uses DPLL0 for its link rate, once DPLL0 is on, we restrict the possible eDP link rates the chosen VCO. - CDCLK also limits the bandwidth available to push pixels. So, as a first step, this commit restore what the BIOS set, until I can do more testing. In case that's of interest for the reviewer, I've unit tested the function that derives the decimal frequency field: #include <stdio.h> #include <stdint.h> #include <assert.h> #define ARRAY_SIZE(x) (sizeof(x) / sizeof(*(x))) static const struct dpll_freq { unsigned int freq; unsigned int decimal; } freqs[] = { { .freq = 308570, .decimal = 0b01001100111}, { .freq = 337500, .decimal = 0b01010100001}, { .freq = 432000, .decimal = 0b01101011110}, { .freq = 450000, .decimal = 0b01110000010}, { .freq = 540000, .decimal = 0b10000110110}, { .freq = 617140, .decimal = 0b10011010000}, { .freq = 675000, .decimal = 0b10101000100}, }; static void intbits(unsigned int v) { int i; for(i = 10; i >= 0; i--) putchar('0' + ((v >> i) & 1)); } static unsigned int freq_decimal(unsigned int freq /* in kHz */) { return (freq - 1000) / 500; } static void test_freq(const struct dpll_freq *entry) { unsigned int decimal = freq_decimal(entry->freq); printf("freq: %d, expected: ", entry->freq); intbits(entry->decimal); printf(", got: "); intbits(decimal); putchar('\n'); assert(decimal == entry->decimal); } int main(int argc, char **argv) { int i; for (i = 0; i < ARRAY_SIZE(freqs); i++) test_freq(&freqs[i]); return 0; } v2: - Rebase on top of -nightly - Use (freq - 1000) / 500 for the decimal frequency (Ville) - Fix setting the enable bit of HSW_NDE_RSTWRN_OPT (Ville) - Rename skl_display_{resume,suspend} to skl_{init,uninit}_cdclk to be consistent with the BXT code (Ville) - Store boot CDCLK in ddi_pll_init (Ville) - Merge dev_priv's skl_boot_cdclk into cdclk_freq - Use LCPLL_PLL_LOCK instead of (1 << 30) (Ville) - Replace various '0' by SKL_DPLL0 to be a bit more explicit that we're programming DPLL0 - Busy poll the PCU before doing the frequency change. It takes about 3/4 cycles, each separated by 10us, to get the ACK from the CPU (Ville) v3: - Restore dev_priv->skl_boot_cdclk, leaving unification with dev_priv->cdclk_freq for a later patch (Daniel, Ville) Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-21drm/i915: Free RPS boosts for all laggardsChris Wilson3-6/+19
If the client stalls on a congested request, chosen to be 20ms old to match throttling, allow the client a free RPS boost. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> [danvet: s/rq/req/] [danvet: s/0/NULL/ reported by 0-day build] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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