aboutsummaryrefslogtreecommitdiffstats
path: root/tools/perf/scripts/python/export-to-postgresql.py (unfollow)
AgeCommit message (Collapse)AuthorFilesLines
2020-07-20ARM: dts: imx6q-tbs2910: Add an mdio nodeFabio Estevam1-0/+11
imx6q-tbs2910 has an Atheros AR8035 Ethernet PHY at address 4. The AR8035 provides a 125MHz clock to the ENET_REF_CLK i.MX6 pin. Improve the Ethernet representation by adding an mdio node with such information. This fixes an Ethernet regression in U-Boot as U-Boot AR803X driver now expects the 'qca,clk-out-frequency' property to be passed via device tree. Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Soeren Moch <smoch@web.de> Tested-by: Soeren Moch <smoch@web.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-20ARM: dts: imx6qdl-sabresd: Pass reset-assert-usFabio Estevam1-1/+2
According to the AR8031 datasheet: "When using crystal, clock is generated internally after the power is stable. In order to get reliable power-on-reset, it is recommended to keep asserting the reset low signal long enough (10 ms) to ensure the clock is stable and clock-to-reset (1 ms) requirement is satisfied." Pass the 'reset-assert-us' property to describe such requirement. While at it, use the 'reset-gpios' property inside the the mdio node instead of the deprecated usage of 'phy-reset-gpios'. Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Soeren Moch <smoch@web.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-20ARM: dts: imx6qdl-sabresd: Add an mdio nodeFabio Estevam1-0/+11
imx6qdl-sabresd has an Atheros AR8031 Ethernet PHY at address 1. The AR8031 provides a 125MHz clock to the ENET_REF_CLK i.MX6 pin. Improve the Ethernet representation by adding an mdio node with such information. An advantage of adding the mdio node is that the AR8031 initialization code in the mx6sabresd board file in U-Boot can totally be removed. Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Soeren Moch <smoch@web.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-20ARM: dts: imx6qdl-gw: add Gateworks System Controller supportTim Harvey14-57/+2076
Add Gateworks System Controller support to Gateworks Ventana boards: - add dt bindings for GSC mfd driver and hwmon driver for ADC's and fan controllers. - add dt bindings for gpio-keys driver for push-button and interrupt events Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: imx6ull: add MYiR MYS-6ULX SBCParthiban Nallathambi3-0/+257
Add support for the MYiR imx6ULL based single board computer equipped with on board 256MB NAND & RAM. The board also provides expansion header for expansion board, but this commit adds only support for SBC. Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: vf610-zii-spb4: Add node for switch watchdogChris Healy1-0/+19
Add I2C child node for switch watchdog present on SPB4 Signed-off-by: Chris Healy <cphealy@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: colibri-imx6: remove pinctrl-names orphanPhilippe Schenker1-1/+0
This is not necessary without a pinctrl-0 statement. Remove this orphan. Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: imx: default to #pwm-cells = <3> in the SoC dtsi filesUwe Kleine-König68-53/+116
The imx-pwm driver supports 3 cells and this is the more flexible setting. So use it by default and overwrite it back to two for the files that reference the PWMs with just 2 cells to minimize changes. This allows to drop explicit setting to 3 cells for the boards that already depend on this. The boards that are now using 2 cells explicitly can be converted to 3 individually. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: vf610-zii-scu4-aib: Configure fibre ports to 1000BaseXAndrew Lunn1-10/+10
The SFF soldered onto the board expect the ports to use 1000BaseX. It makes no sense to have the ports set to SGMII, since they don't even support that mode. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Chris Healy <cphealy@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: vf610-zii-dev-rev-c: Configure fiber port to 1000BaseXChris Healy1-1/+1
The SFF soldered onto the board expects the port to use 1000BaseX. It makes no sense to have the port set to SGMII, since it doesn't even support that mode. Signed-off-by: Chris Healy <cphealy@gmail.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: ZII: update MDIO speed and preambleChris Healy6-0/+12
Update MDIO configuration with ZII devices to fully utilize MDIO endpoint capabilities. All devices support 12.5MHz clock and don't require MDIO preable. Signed-off-by: Chris Healy <cphealy@gmail.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: vfxxx: Add node for CAAMAndrey Smirnov1-0/+22
Add node for CAAM device in NXP Vybrid SoC. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Chris Healy <cphealy@gmail.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: imx6qp-sabresd: enable sataRichard Zhu1-0/+4
Enable SATA on iMX6QP SABRESD board. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: imx6qp-sabreauto: enable sataRichard Zhu1-0/+4
Enable SATA on iMX6QP SABREAUTO board. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: add Protonic RVT boardOleksij Rempel2-0/+185
Protonic RVT is an internal development platform for a wireless ISObus Virtual Terminal based on COTS tablets, and the predecessor of the WD2 platform. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: David Jander <david@protonic.nl> Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: add Protonic VT7 boardOleksij Rempel2-0/+412
The Protonic VT7 is a mid-class ISObus Virtual Terminal with a 7 inch touchscreen display. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Robin van der Gracht <robin@protonic.nl> Signed-off-by: David Jander <david@protonic.nl> Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: add Protonic WD2 boardOleksij Rempel2-0/+189
Add support for the Protonic WD2 board, which is an internal development platform for low-cost agricultural Virtual Terminals based on COTS tablets and web applications. It inherits from the PRTI6Q base class. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: David Jander <david@protonic.nl> Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: add Protonic PRTI6Q boardOleksij Rempel3-0/+707
Protonic PRTI6Q is a development board and a base class for different specific customer application boards based on the i.MX6 family of SoCs, developed by Protonic Holland. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: David Jander <david@protonic.nl> Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: imx6ul: Add ASRC device nodeShengjiu Wang1-0/+25
Add ASRC device node. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: imx: Align L2 cache-controller nodename with dtschemaKrzysztof Kozlowski5-5/+5
Fix dtschema validator warnings like: l2-cache@a02000: $nodename:0: 'l2-cache@a02000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$' Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: vf610: Align L2 cache-controller nodename with dtschemaKrzysztof Kozlowski1-1/+1
Fix dtschema validator warnings like: l2-cache@40006000: $nodename:0: 'l2-cache@40006000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$' Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: imx6sx-sdb: Add MQS supportShengjiu Wang4-0/+62
Add MQS support. As the pin conflict with usdhc2, then need to add a separate dts. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: ls1021a: add ftm_alarm0 DT nodeBiwen Li1-0/+15
The patch add ftm_alarm0 DT node - add rcpm node - add ftm_alarm0 node - aliases ftm_alarm0 as rtc1 Signed-off-by: Biwen Li <biwen.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: imx6sx-sabreauto: Add cs42888 sound card supportShengjiu Wang2-0/+79
Complete the ESAI node and Add cs42888 sound card support. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: imx6sx-sabreauto: Add SPDIF supportShengjiu Wang1-0/+21
Add SPDIF support. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: imx6sx-sdb: Add SPDIF supportShengjiu Wang1-0/+23
Add SPDIF support. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: imx6sx: Enable ASRC deviceShengjiu Wang1-8/+18
Add compatible string, update the clock table, add fsl,asrc-rate and fsl,asrc-width property. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: imx53-ppd: alarm LEDs use kernel LED interfaceIan Ray1-9/+40
Use kernel LED interface for the alarm LEDs. Signed-off-by: Ian Ray <ian.ray@ge.com> Signed-off-by: Samu Nuutamo <samu.nuutamo@vincit.fi> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: imx6sll: Make ssi node name same as other platformsShengjiu Wang1-3/+3
In imx6sll.dtsi, the ssi node name is different with other platforms (imx6qdl, imx6sl, imx6sx), but the sound/soc/fsl/fsl-asoc-card.c machine driver needs to check ssi node name for audmux configuration, then different ssi node name causes issue on imx6sll platform. So we change ssi node name to make all platforms have same name. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: imx: Change usdhc node name on i.MX6/i.MX7 SoCsAnson Huang5-17/+17
Change i.MX6/i.MX7 SoCs usdhc node name from usdhc to mmc to be compliant with yaml schema, it requires the nodename to be "mmc". Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: imx: Change esdhc node name on i.MX2/i.MX3/i.MX5 SoCsAnson Huang5-17/+17
Change i.MX2/i.MX3/i.MX5 SoCs esdhc node name from esdhc to mmc to be compliant with yaml schema, it requires the nodename to be "mmc". Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: imx: Change sdhci node name on i.MX27/i.MX31 SoCsAnson Huang2-5/+5
Change i.MX27/i.MX31 node name from sdhci to mmc to be compliant with yaml schema, it requires the nodename to be "mmc". Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: imx6qdl: Remove invalid interrupt for GPC nodeAnson Huang1-2/+1
In latest i.MX6Q RM Rev.6, 05/2020, #90 SPI interrupt is reserved, so remove it from GPC node. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: imx: change iim node name on i.MX SoCsAnson Huang6-6/+6
Change IIM node name from iim to efuse to be compliant with yaml schema, it requires the nodename to be one of "eeprom|efuse|nvram". Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Fugang Duan <fugang.duan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: imx: change ocotp node name on MXS SoCsAnson Huang2-2/+2
Change OCOTP node name from ocotp to efuse to be compliant with yaml schema, it requires the nodename to be one of "eeprom|efuse|nvram". Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Fugang Duan <fugang.duan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: imx: change ocotp node name on i.MX6/7 SoCsAnson Huang7-7/+7
Change OCOTP node name from ocotp-ctrl to efuse to be compliant with yaml schema, it requires the nodename to be one of "eeprom|efuse|nvram". Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Fugang Duan <fugang.duan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: ls1021a: output PPS signal on FIPER2Yangbo Lu1-1/+1
The timer fixed interval period pulse generator register is used to generate periodic pulses. The down count register loads the value programmed in the fixed period interval (FIPER). At every tick of the timer accumulator overflow, the counter decrements by the value of TMR_CTRL[TCLK_PERIOD]. It generates a pulse when the down counter value reaches zero. It reloads the down counter in the cycle following a pulse. To use the TMR_FIPER register to generate desired periodic pulses. The value should programmed is, desired_period - tclk_period Current tmr-fiper2 value is to generate 100us periodic pulses. (But the value should have been 99995, not 99990. The tclk_period is 5.) This patch is to generate 1 second periodic pulses with value 999999995 programmed which is more desired by user. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Acked-by: Richard Cochran <richardcochran@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: imx: Make tempmon node as child of anatop nodeAnson Huang6-61/+61
i.MX6/7 SoCs' temperature sensor is inside anatop module from HW perspective, so it should be a child node of anatop. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-06-23clk: imx: vf610: add CAAM clockAndrey Smirnov2-1/+3
According to Vybrid Security RM, CCM_CCGR11[CG176] can be used to gate CAAM ipg clock. Signed-off-by: Horia Geantă <horia.geanta@nxp.com> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Cc: Chris Healy <cphealy@gmail.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Fabio Estevam <festevam@gmail.com> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Cc: linux-imx@nxp.com Tested-by: Chris Healy <cphealy@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-06-23clk: imx8mp: add mu root clkPeng Fan1-0/+1
Add mu root clk for mu mailbox usage. Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-06-14Linux 5.8-rc1Linus Torvalds1-2/+2
2020-06-14security: Add LSM hooks to set*gid syscallsThomas Cedeno5-1/+40
The SafeSetID LSM uses the security_task_fix_setuid hook to filter set*uid() syscalls according to its configured security policy. In preparation for adding analagous support in the LSM for set*gid() syscalls, we add the requisite hook here. Tested by putting print statements in the security_task_fix_setgid hook and seeing them get hit during kernel boot. Signed-off-by: Thomas Cedeno <thomascedeno@google.com> Signed-off-by: Micah Morton <mortonm@chromium.org>
2020-06-14Revert "btrfs: switch to iomap_dio_rw() for dio"David Sterba4-166/+169
This reverts commit a43a67a2d715540c1368b9501a22b0373b5874c0. This patch reverts the main part of switching direct io implementation to iomap infrastructure. There's a problem in invalidate page that couldn't be solved as regression in this development cycle. The problem occurs when buffered and direct io are mixed, and the ranges overlap. Although this is not recommended, filesystems implement measures or fallbacks to make it somehow work. In this case, fallback to buffered IO would be an option for btrfs (this already happens when direct io is done on compressed data), but the change would be needed in the iomap code, bringing new semantics to other filesystems. Another problem arises when again the buffered and direct ios are mixed, invalidation fails, then -EIO is set on the mapping and fsync will fail, though there's no real error. There have been discussions how to fix that, but revert seems to be the least intrusive option. Link: https://lore.kernel.org/linux-btrfs/20200528192103.xm45qoxqmkw7i5yl@fiona/ Signed-off-by: David Sterba <dsterba@suse.com>
2020-06-13net: ethernet: ti: ale: fix allmulti for nu type aleGrygorii Strashko1-9/+40
On AM65xx MCU CPSW2G NUSS and 66AK2E/L NUSS allmulti setting does not allow unregistered mcast packets to pass. This happens, because ALE VLAN entries on these SoCs do not contain port masks for reg/unreg mcast packets, but instead store indexes of ALE_VLAN_MASK_MUXx_REG registers which intended for store port masks for reg/unreg mcast packets. This path was missed by commit 9d1f6447274f ("net: ethernet: ti: ale: fix seeing unreg mcast packets with promisc and allmulti disabled"). Hence, fix it by taking into account ALE type in cpsw_ale_set_allmulti(). Fixes: 9d1f6447274f ("net: ethernet: ti: ale: fix seeing unreg mcast packets with promisc and allmulti disabled") Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-06-13net: ethernet: ti: am65-cpsw-nuss: fix ale parameters initGrygorii Strashko1-1/+1
The ALE parameters structure is created on stack, so it has to be reset before passing to cpsw_ale_create() to avoid garbage values. Fixes: 93a76530316a ("net: ethernet: ti: introduce am65x/j721e gigabit eth subsystem driver") Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-06-13net: atm: Remove the error message according to the atomic contextLiao Pingfang1-3/+1
Looking into the context (atomic!) and the error message should be dropped. Signed-off-by: Liao Pingfang <liao.pingfang@zte.com.cn> Signed-off-by: David S. Miller <davem@davemloft.net>