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2019-06-26pwm: meson: Add documentation to the driverMartin Blumenstingl1-0/+22
Add links to the datasheet and a short summary how the hardware works. The goal is to make it easier for other developers to understand why the pwm-meson driver is implemented the way it is. Suggested-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Co-authored-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2019-06-26pwm: meson: Add support PWM_POLARITY_INVERSED when disablingMartin Blumenstingl1-1/+22
meson_pwm_apply() has to consider the PWM polarity when disabling the output. With enabled=false and polarity=PWM_POLARITY_NORMAL the output needs to be LOW. The driver already supports this. With enabled=false and polarity=PWM_POLARITY_INVERSED the output needs to be HIGH. Implement this in the driver by internally enabling the output with the same settings that we already use for "period == duty". This fixes a PWM API violation which expects that the driver honors the polarity also for enabled=false. Due to the IP block not supporting this natively we only get "an as close as possible" to 100% HIGH signal (in my test setup with input clock of 24MHz and measuring the output with a logic analyzer at 24MHz sampling rate I got a duty cycle of 99.998475% on a Khadas VIM). Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2019-06-26pwm: meson: Don't cache struct pwm_state internallyMartin Blumenstingl1-24/+1
The PWM core already caches the "current struct pwm_state" as the "current state of the hardware registers" inside struct pwm_device. Drop the struct pwm_state from struct meson_pwm_channel in favour of the struct pwm_state in struct pwm_device. While here also drop any checks based on the pwm_state because the PWM core already takes care of this. No functional changes intended. Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2019-06-26pwm: meson: Read the full hardware state in meson_pwm_get_state()Martin Blumenstingl1-3/+49
Update the meson_pwm_get_state() implementation to take care of all information in the registers instead of only reading the "enabled" state. The PWM output is only enabled if two conditions are met: 1. the per-channel clock is enabled 2. the PWM output is enabled Calculate the PWM period and duty cycle using the reverse formula which we already have in meson_pwm_calc() and update struct pwm_state with the results. As result of this /sys/kernel/debug/pwm now shows the PWM state set by the bootloader (or firmware) after booting Linux. Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2019-06-26pwm: meson: Simplify the calculation of the pre-divider and countMartin Blumenstingl1-15/+10
Replace the loop to calculate the pre-divider and count with two separate div64_u64() calculations. This makes the code easier to read and improves the precision. Three example cases: 1) 32.768kHz LPO clock for the SDIO wifi chip on Khadas VIM clock input: 500MHz (FCLK_DIV4) period: 30518ns duty cycle: 15259ns old algorithm: pre_div=0, cnt=15259 new algorithm: pre_div=0, cnt=15259 (no difference in calculated values) 2) PWM LED on Khadas VIM clock input: 24MHz (XTAL) period: 7812500ns duty cycle: 7812500ns old algorithm: pre_div=2, cnt=62004 new algorithm: pre_div=2, cnt=62500 Using a scope (24MHz sampling rate) shows the actual difference: - old: 7753000ns, off by -59500ns (0.7616%) - new: 7815000ns, off by +2500ns (0.032%) 3) Theoretical case where pre_div is different clock input: 24MHz (XTAL) period: 2730624ns duty cycle: 1365312ns old algorithm: pre_div=1, cnt=32768 new algorithm: pre_div=0, cnt=65534 Using a scope (24MHz sampling rate) shows the actual difference: - old: 2731000ns - new: 2731000ns (my scope is not precise enough to measure the difference if there's any) Suggested-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2019-06-26pwm: meson: Move pwm_set_chip_data() to meson_pwm_request()Martin Blumenstingl1-14/+8
All existing PWM drivers (except pwm-meson and two other ones) call pwm_set_chip_data() from their pwm_ops.request() callback. Now that we can access the struct meson_pwm_channel from struct meson_pwm we can do the same. Move the call to pwm_set_chip_data() to meson_pwm_request() and drop the custom meson_pwm_add_channels(). This makes the implementation consistent with other drivers and makes it slightly more obvious thatpwm_get_chip_data() cannot be used from pwm_ops.get_state() (because that's called by the PWM core before pwm_ops.request()). No functional changes intended. Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2019-06-26pwm: meson: Add the per-channel register offsets and bits in a structMartin Blumenstingl1-56/+34
Introduce struct meson_pwm_channel_data which contains the per-channel offsets for the PWM register and REG_MISC_AB bits. Replace the existing switch (pwm->hwpwm) statements with an access to the new struct. This simplifies the code and will make it easier to implement pwm_ops.get_state() because the switch-case which all per-channel registers and offsets (as previously implemented in meson_pwm_enable()) doesn't have to be duplicated. No functional changes intended. Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2019-06-26pwm: meson: Add the meson_pwm_channel data to struct meson_pwmMartin Blumenstingl1-15/+10
Make struct meson_pwm_channel accessible from struct meson_pwm. PWM core has a limitation: per-channel data can only be set after pwmchip_add() is called. However, pwmchip_add() internally calls pwm_ops.get_state(). If pwm_ops.get_state() needs access to the per-channel data it has to obtain it from struct pwm_chip and struct pwm_device's hwpwm information. Add a struct meson_pwm_channel for each PWM channel to struct meson_pwm so the pwm_ops.get_state() callback can be implemented as it needs access to the clock from struct meson_pwm_channel. Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2019-06-26pwm: meson: Pass struct pwm_device to meson_pwm_calc()Martin Blumenstingl1-3/+3
meson_pwm_calc() is the last function that accepts a struct meson_pwm_channel. meson_pwm_enable(), meson_pwm_disable() and meson_pwm_apply() for example are all taking a struct pwm_device as parameter. When they need the struct meson_pwm_channel these functions simply call pwm_get_chip_data() internally. Make meson_pwm_calc() consistent with the other functions in the meson-pwm driver by passing struct pwm_device to it as well. The value of the "id" parameter is actually pwm->hwpwm, but the driver never read the "id" parameter, which is why there's no replacement for it in the new code. No functional changes. Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2019-06-26pwm: meson: Don't duplicate the polarity internallyMartin Blumenstingl1-15/+8
Let meson_pwm_calc() use the polarity from struct pwm_state directly. This removes a level of indirection where meson_pwm_apply() first had to set a driver-internal inverter mask which was then only used by meson_pwm_calc(). Instead of adding the polarity as parameter to meson_pwm_calc() switch to struct pwm_state directly to make it easier to see where the parameters are actually coming from. Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2019-06-26pwm: meson: Change MISC_CLK_SEL_WIDTH to MISC_CLK_SEL_MASKMartin Blumenstingl1-2/+2
MISC_CLK_SEL_WIDTH is only used in one place where it's converted into a bit-mask. Rename and change the macro to be a bit-mask so that conversion is not needed anymore. No functional changes intended. Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2019-06-26pwm: meson: Use GENMASK and FIELD_PREP for the lo and hi valuesMartin Blumenstingl1-2/+6
meson_pwm_calc() ensures that "lo" is always less than 16 bits wide (otherwise it would overflow into the "hi" part of the REG_PWM_{A,B} register). Use GENMASK and FIELD_PREP for the lo and hi values to make it easier to spot how wide these are internally. Additionally this is a preparation step for the .get_state() implementation where the GENMASK() for lo and hi becomes handy because it can be used with FIELD_GET() to extract the values from the register REG_PWM_{A,B} register. No functional changes intended. Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2019-06-26pwm: meson: Use devm_clk_get_optional() to get the input clockMartin Blumenstingl1-8/+3
Simplify the code which fetches the input clock for a PWM channel by using devm_clk_get_optional(). This comes with a small functional change: previously all errors except EPROBE_DEFER were ignored. Now all other errors are also treated as errors. If no input clock is present devm_clk_get_optional() will return NULL instead of an error which matches the behavior of the old code. Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2019-06-26pwm: meson: Unify the parameter list of meson_pwm_{enable, disable}Martin Blumenstingl1-8/+7
This is a preparation for a future cleanup. Pass struct pwm_device instead of passing the individual values required by each function as these can be obtained for each struct pwm_device instance. As a nice side-effect the driver now uses "switch (pwm->hwpwm)" everywhere. Before some functions used "switch (id)" while others used "switch (pwm->hwpwm)". No functional changes. Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2019-06-26pwm: jz4740: Force TCU2 channels to return to their init levelPaul Cercueil1-1/+9
When the PWM mode of TCU2 channels is disabled, their corresponding pin does not always return to its initial level. Force this by using a small trick: we set duty > period, which is an invalid configuration for the hardware, which then correctly resets the pin to the initial level. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2019-06-25pwm: jz4740: Apply configuration atomicallyPaul Cercueil1-25/+12
This is cleaner, more future-proof, and incidentally it also fixes the PWM resetting its config when stopped/started several times. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2019-06-25pwm: jz4740: Remove unused devicetree compatible stringsPaul Cercueil1-2/+0
Right now none of the Ingenic-based boards probe this driver from devicetree. This driver defined three compatible strings for the exact same behaviour. Before these strings are used, we can remove two of them. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2019-06-25dt-bindings: pwm: jz47xx: Remove unused compatible stringsPaul Cercueil1-4/+1
Right now none of the Ingenic-based boards probe this driver from devicetree. This driver defined three compatible strings for the exact same behaviour. Before these strings are used, we can remove two of them. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2019-06-25pwm: meson: Fix the G12A AO clock parents orderNeil Armstrong1-2/+11
The Amlogic G12A and G12B Documentation is wrong, the AO xtal and clk81 clock source order is reversed, and validated when adding DVFS support by using the PWM AO D output to control the CPU supply voltage. The vendor tree also uses the reversed xtal and clk81 order at [1]. [1] https://github.com/hardkernel/linux/blob/odroidn2-4.9.y/drivers/amlogic/pwm/pwm_meson.c#L462 Fixes: f41efceb46e6 ("pwm: meson: Add clock source configuration for Meson G12A") Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2019-06-25pwm: meson: Update with SPDX Licence identifierNeil Armstrong1-51/+1
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2019-06-25pwm: stm32: Use 3 cells ->of_xlate()Fabrice Gasnier1-0/+2
STM32 Timers support generic 3 cells PWM to encode PWM number, period and polarity. Fixes: 7edf7369205b ("pwm: Add driver for STM32 plaftorm") Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Reviewed-by: Benjamin Gaignard <benjamin.gaignard@st.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2019-06-25dt-bindings: pwm: stm32: Add #pwm-cellsFabrice Gasnier1-0/+3
STM32 Timers support generic 3 cells PWM bindings to encode PWM number, period and polarity as defined in pwm.txt. Fixes: cd9a99c2f8e8 ("dt-bindings: pwm: Add STM32 bindings") Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2019-06-25pwm: Add consumer device linkFabrice Gasnier2-5/+51
Add a device link between the PWM consumer and the PWM provider. This enforces the PWM user to get suspended before the PWM provider. It allows proper synchronization of suspend/resume sequences: the PWM user is responsible for properly stopping PWM, before the provider gets suspended: see [1]. Add the device link in: - of_pwm_get() - pwm_get() - devm_*pwm_get() variants as it requires a reference to the device for the PWM consumer. [1] https://lkml.org/lkml/2019/2/5/770 Suggested-by: Thierry Reding <thierry.reding@gmail.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2019-06-25pwm: stm32-lp: Add power management supportFabrice Gasnier1-0/+25
Add suspend/resume PM sleep ops. When going to low power, enforce the PWM channel isn't active. Let the PWM consumers disable it during their own suspend sequence. Only perform a check here, and handle the pinctrl states. See [1]. [1] https://lkml.org/lkml/2019/2/5/770 Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2019-06-25dt-bindings: pwm: stm32-lp: Document pin control sleep stateFabrice Gasnier1-3/+6
Add documentation for pin control sleep state on STM32 LPTimer PWM. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2019-06-25pwm: sifive: Add a driver for SiFive SoC PWMYash Shah3-0/+351
Adds a PWM driver for PWM chip present in SiFive's HiFive Unleashed SoC. Signed-off-by: Wesley W. Terpstra <wesley@sifive.com> [Atish: Various fixes and code cleanup] Signed-off-by: Atish Patra <atish.patra@wdc.com> Signed-off-by: Yash Shah <yash.shah@sifive.com> Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>