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2016-03-03drm/msm: grab struct_mutex after allocating submitRob Clark1-8/+5
No real need to hold the lock over allocation, and simplifies things slightly if we change the order. Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-03-03drm/msm: reject submit ioctl if no gpuRob Clark1-3/+4
Existing userspace wouldn't get this far, since getparam ioctl would have failed and it would have bailed out creating a screen/context. But all the same, we shouldn't let evil or confused userspace cause a null ptr deref. Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-03-03drm/msm/adreno: print details in case of a protect fault interruptCraig Stout1-0/+7
Signed-off-by: Craig Stout <cstout@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-03-03drm/msm/adreno: get CP_RPTR from register instead of shadow memoryCraig Stout1-12/+22
As described in the downstream/kgsl driver: Sometimes the RPTR shadow memory is unreliable causing timeouts in adreno_idle(). Read it directly from the register instead. Signed-off-by: Craig Stout <cstout@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-03-03drm/msm/adreno: add adreno430 power controlCraig Stout1-2/+37
Signed-off-by: Craig Stout <cstout@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-03-03drm/msm/adreno: support for adreno 430.Craig Stout4-7/+52
Signed-off-by: Craig Stout <cstout@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-03-03drm/msm: update generated headersRob Clark14-163/+1740
Pull in additional regs needed for a430, etc. Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-03-03drm/msm/dsi: fix definition of msm_dsi_pll_28nm_8960_init()Luis Henriques1-2/+2
This fixes the following build failure: drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm.o: In function `msm_dsi_pll_28nm_8960_init': dsi_pll_28nm.c:(.text+0x1198): multiple definition of `msm_dsi_pll_28nm_8960_init' drivers/gpu/drm/msm/dsi/pll/dsi_pll.o:dsi_pll.c:(.text+0x0): first defined here Signed-off-by: Luis Henriques <luis.henriques@canonical.com> Acked-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-03-03drm/msm/dsi: Parse DSI lanes via DTArchit Taneja2-23/+125
The DSI driver is currently unaware of how the DSI physical data lanes are mapped to the logical lanes provided by the DSI controller. Create a DT binding "qcom,data-lane-map" that provides this information on a given platform. The MSM DSI controller is restricted in terms of what all mappings it can support. The lane polarity is fixed for all the lanes, the clock lanes are fixed, and the data lanes can be swapped among each other only for a few combinations. Apply these restrictions when we parse the DT data. Cc: devicetree@vger.kernel.org Cc: Rob Herring <robh@kernel.org> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com> Acked-by: Rob Herring <robh@kernel.org>
2016-03-02drm/msm/dsi: Drop VDD regulator for MSM8916Archit Taneja1-2/+1
VDD regulator input was specified for MSM8916. It turns our that this regulator is used for the display panels used on MSM8916 platforms, but not the DSI controller itself. Drop this regulator from the list. Reported-by: Vinay Simha <vinaysimha@inforcecomputing.com> Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-03-02drm/msm/dsi: Remove incorrect warning on host attachArchit Taneja1-2/+0
With the implementation of of_graph parsing, it isn't any longer necessary for msm_host->device node to be same as dsi->dev.of_node. This only holds true when the connected device is also a child of the dsi_host. In the case of external bridge chips belonging to a different control bus, these are guaranteed to be different. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-03-02drm/msm: Free fb helper resources in msm_unloadArchit Taneja2-0/+6
We have a msm_fbev_free function to uninit fb_helper stuff, but we aren't using it. Call it in msm_unload. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-03-02drm/msm/mdp: Detach iommu in mdp4_destroySricharan R2-4/+14
attach_dev gets called in mdp4_kms_init, but there is no corresponding detach_dev called in the error path or in the kms driver unload path. Detach and destroy mmu in mdp4_destroy. Signed-off-by: Sricharan R <sricharan@codeaurora.org> Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-03-02drm/msm: make iommu port names const'ierRob Clark2-4/+6
Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-03-02drm/msm/mdp: Use atomic helper to set crtc propertyArchit Taneja2-16/+2
Assign drm_atomic_helper_crtc_set_property helper to MDP4 and MDP5 crtcs' set_property ops. This replaces the custom funcs that returned an error even for standard crtc properties. Signed-off-by: Archit Taneja <architt@codeaurora.org> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-03-02dt-bindings: msm/hdmi: Add HDMI PHY bindingsArchit Taneja1-2/+44
Add HDMI PHY bindings. Update the example to use HDMI PHY. Added a missing power-domains property in the HDMI core bindings. Also, simplified HDMI TX's DT node name in the example. Cc: devicetree@vger.kernel.org Cc: Rob Herring <robh@kernel.org> Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com> Acked-by: Rob Herring <robh@kernel.org>
2016-02-29drm/msm/hdmi: HDMI 8996 PHY/PLL supportArchit Taneja4-0/+780
Add support for the HDMI PHY/PLL found in MSM8996/APQ8096. Unlike the previous PHYs supported in the driver, this doesn't need the powerup/powerdown ops. The PLL prepare/unprepare clock ops enable/disable the phy itself. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-02-29drm/msm/hdmi: Update generated headers for HDMI 8996 PHYArchit Taneja1-2/+498
Adds HDMI 8996 PHY offsets. The offsets are divided into 3 parts: - Core HDMI PHY registers - HDMI PLL registers (part of QSERDES block) - HDMI TX lane registers (part of QSERDES block) Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-02-29drm/msm/hdmi: Update generated headers to split PHY/PLL offsetsArchit Taneja1-83/+74
- Create separate domains for 8960 PHY and PLL - Create separate domains for 8x60 PHY Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-02-29drm/msm/hdmi: Convert PHY files according to new designArchit Taneja6-712/+100
Remove the old PHY ops managed by hdmi_platform_config and use them as ops provided by the HDMI PHY driver. Remove the old HDMI 8960 PLL code that used the top level HDMI TX mmio base. NOTE: With this commit, HDMI functionality will break until the HDMI PHY/PLL register offsets in hdmi.xml.h aren't updated to be used as separate domains. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-02-29drm/msm/hdmi: Make HDMI core get its PHYArchit Taneja2-0/+42
Make HDMI core get its PHY by parsing the "phys" phandle. The core will use this PHY reference to enable/disable PHY. The driver defers probe until PHY isn't available. The DT bindings used here is the same as the one used for PHYs using the common PHY framework bindings. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-02-29drm/msm/hdmi: Manage HDMI PLL through PHY driverArchit Taneja4-0/+506
Add a helper to initialize PLL in the PHY driver. HDMI PLLs are going to have their own mmio base different from that of PHY. For the clock code in hdmi_phy_8960.c, some changes were needed for it to work with the updated register offsets. Create a copy of the updated clock code in hdmi_pll_8960.c, instead of rewriting it in hdmi_phy_8960.c itself. This removes the need to place CONFIG_COMMON_CLOCK checks all around, makes the code more legible, and also removes some old checkpatch warnings with the original code. The older hdmi pll clock ops in hdmi_phy_8960.c will be removed later. The driver will use these until the HDMI PHY/PLL register offsets aren't considered as separate domains (i.e. their offsets start from 0). Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-02-29drm/msm/hdmi: Create a separate HDMI PHY driverArchit Taneja7-4/+281
Create a PHY device that represents the TX PHY and PLL parts of the HDMI block. This makes management of PHY specific resources (regulators and clocks) much easier, and makes the PHY and PLL usable independently. It also simplifies the core HDMI driver, which currently assigns phy ops among many other things. The PHY driver implementation done here is very similar to the PHY driver we already have for DSI. Keep the old hdmi_phy_funcs ops for now. The driver will use these until the HDMI PHY/PLL register offsets aren't considered as separate domains (i.e. their offsets start from 0). The driver doesn't use the common PHY framework for now. This is because it's hard to map our ops with the ops provided by the framework. The bindings used for this is the generic phy bindings. So, this can be adapted to the PHY framework in the future, if possible. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-02-29drm/msm/hdmi: Fix connector detect when there is no HPD gpioArchit Taneja1-0/+9
Some platforms may not have a HPD gpio line to detect Hot Plug signal from the connector. They need to rely only on reading REG_HDMI_HPD_INT_STATUS for HPD. Modify hdmi_connector_detect logic such that it checks for HPD only using the status register if there is no HPD gpio. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-02-29drm/msm/hdmi: Clean up connector gpio usageArchit Taneja3-102/+69
Make gpio allocation and usage iterative by parsing the gpios on a given platform from a list. This gives us flexibility over what all gpios exist for a platform, whether they are input or output, and what value they should be set to. In particular, this will make HDMI on 8x96 platforms easier to integrate with the driver, as it doesn't have a HPD gpio input to them. Also, it cleans things up a bit. We still use the legacy gpio api here, as we might need to backport this driver to downstream kernels. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>