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2015-09-23drm/amdgpu: use only one reservation object for each VM v2Christian König2-30/+9
Reduces the locking and fencing overhead. v2: add comment why we need the duplicates list in the GEM op. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-09-23drm/amdgpu: validate duplicates in the CS as wellChristian König1-14/+20
This allows for multiple BOs to have the same reservation object. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-23drm/amdgpu: export reservation_object from dmabuf to ttm (v2)Christian König24-52/+70
Adds an extra argument to amdgpu_bo_create, which is only used in amdgpu_prime.c. Port of radeon commit 831b6966a60fe72d85ae3576056b4e4e0775b112. v2: fix up kfd. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-23drm/amdgpu: fix overflow on 32bit systemsChristian König1-1/+1
mem->start is a long, so this can overflow on 32bit systems. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Cc: stable@vger.kernel.org
2015-09-23drm/amdgpu: remove process_job callback from the schedulerChristian König3-24/+7
Just free the resources immediately after submitting the job. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-09-23drm/amdgpu: move scheduler fence callback into fence v2Christian König2-11/+12
And call the processed callback directly after submitting the job. v2: split adding error handling into separate patch. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-09-23drm/amdgpu: signal scheduler fence when hw submission fails v3Christian König1-0/+3
Otherwise the resource blocked by it will never be reclaimed. v2: add DRM_ERROR. v3: fix typo in commit message Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: Chunming Zhou<david1.zhou@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-09-23drm/amdgpu: add tracepoint for scheduler (v2)Chunming Zhou2-1/+45
track sched job status like the length of job queue and hw job queue. v2: fix build after rebase Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2015-09-23drm/amdgpu: use write confirm for vm_flush()Christian König1-1/+2
Make sure the CP waits for the write to be confirmed before invalidating. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-23drm/amdgpu: execution barrier after fence v2Anatoli Antonovitch1-0/+12
Insert wait for reg mem after EOP to fix potential issue with vm context switch v2: move wait to vm_flush() use equal instead of greater than. Signed-off-by: Anatoli Antonovitch <anatoli.antonovitch@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-23drm/amdgpu: add option to disable semaphoresChristian König3-1/+21
Provide module parameter to enable/disable them. Still enabled by default. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-11drm/nouveau/device: enable c800 quirk for tecra w50Ben Skeggs1-0/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-09-11drm/nouveau/clk/gt215: Unbreak engine pausing for GT21x/MCP7xRoy Spliet1-1/+1
Typo that snuck in with commit 6979c6303a4abf263753cd9d577d79f05c6e8c47 Signed-off-by: Roy Spliet <rspliet@eclipso.eu> Reported-by: Pierre Moreau <pierre.morrow@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-09-11drm/nouveau/gr/nv04: fix big endian setting on gr contextIlia Mirkin1-3/+3
Broken since "gr: convert user classes to new-style nvkm_object" Tested on a PPC64 G5 + NV34 Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-09-11drm/qxl: validate monitors config modesJonathon Jongsma2-26/+42
Due to some recent changes in drm_helper_probe_single_connector_modes_merge_bits(), old custom modes were not being pruned properly. In current kernels, drm_mode_validate_basic() is called to sanity-check each mode in the list. If the sanity-check passes, the mode's status gets set to to MODE_OK. In older kernels this check was not done, so old custom modes would still have a status of MODE_UNVERIFIED at this point, and would therefore be pruned later in the function. As a result of this new behavior, the list of modes for a device always includes every custom mode ever configured for the device, with the largest one listed first. Since desktop environments usually choose the first preferred mode when a hotplug event is emitted, this had the result of making it very difficult for the user to reduce the size of the display. The qxl driver did implement the mode_valid connector function, but it was empty. In order to restore the old behavior where old custom modes are pruned, we implement a proper mode_valid function for the qxl driver. This function now checks each mode against the last configured custom mode and the list of standard modes. If the mode doesn't match any of these, its status is set to MODE_BAD so that it will be pruned as expected. Signed-off-by: Jonathon Jongsma <jjongsma@redhat.com> Cc: stable@vger.kernel.org Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-09-10drm/i915: Allow DSI dual link to be configured on any pipeGaurav K Singh1-5/+4
Just like single link MIPI panels, similarly for dual link panels, pipe to be configured is based on the DVO port from VBT Block 2. In hardware, Port A is mapped with Pipe A and Port C is mapped with Pipe B. This issue got introduced in - commit 7e9804fdcffc650515c60f524b8b2076ee59e710 Author: Jani Nikula <jani.nikula@intel.com> Date: Fri Jan 16 14:27:23 2015 +0200 drm/i915/dsi: add drm mipi dsi host support Cc: stable@vger.kernel.org # v4.0 Signed-off-by: Gaurav K Singh <gaurav.k.singh@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-09-10drm/i915: Don't try to use DDR DVFS on CHV when disabled in the BIOSVille Syrjälä2-13/+31
If one disables DDR DVFS in the BIOS, Punit will apparently ignores all DDR DVFS request. Currently we assume that DDR DVFS is always operational, which leads to errors in dmesg when the DDR DVFS requests time out. Fix the problem by gently prodding Punit during driver load to find out whether it will respond to DDR DVFS requests. If the request times out, we assume that DDR DVFS has been permanenly disabled in the BIOS and no longer perster the Punit about it. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91629 Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Clint Taylor <Clinton.A.Taylor@intel.com> Tested-by: Clint Taylor <Clinton.A.Taylor@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-09-10drm/i915: Fix CSR MMIO address checkTakashi Iwai1-1/+1
Fix a wrong logical AND (&&) used for the range check of CSR MMIO. Spotted nicely by gcc -Wlogical-op flag: drivers/gpu/drm/i915/intel_csr.c: In function ‘finish_csr_load’: drivers/gpu/drm/i915/intel_csr.c:353:41: warning: logical ‘and’ of mutually exclusive tests is always false [-Wlogical-op] Fixes: eb805623d8b1 ('drm/i915/skl: Add support to load SKL CSR firmware.') Cc: <stable@vger.kernel.org> # v4.2 Signed-off-by: Takashi Iwai <tiwai@suse.de> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Animesh Manna <animesh.manna@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-09-09drm/i915: Limit the number of loops for reading a split 64bit registerChris Wilson1-5/+5
In I915_READ64_2x32 we attempt to read a 64bit register using 2 32bit reads. Due to the nature of the registers we try to read in this manner, they may increment between the two instruction (e.g. a timestamp counter). To keep the result accurate, we repeat the read if we detect an overflow (i.e. the upper value varies). However, some hardware is just plain flaky and may endless loop as the the upper 32bits are not stable. Just give up after a couple of tries and report whatever we read last. v2: Use the most recent values when erring out on an unstable register. Reported-by: russianneuromancer@ya.ru Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91906 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Michał Winiarski <michal.winiarski@intel.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: stable@vger.kernel.org Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-09-08drm/i915: Fix broken mst get_hw_state.Maarten Lankhorst2-5/+10
connector->encoder is initialized as NULL. Fix this by setting it in during pre enable. MST connectors are not read out during initial hw readout, and have no fixed encoder mappings. So it's harmless to return false when the connector has never been assigned to an encoder. Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Reviewed-by: Ander Conselvan de Oliveira <conselvan2@gmail.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-09-04drm/amdgpu: rename gmc_v8_0_init_compute_vmidAlex Deucher1-3/+3
It should be gfx_v8_0_init_compute_vmid since it's part of the gfx block. Acked-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-04drm/amdgpu: fix vce3 instance handlingAlex Deucher1-6/+42
Need to properly handle the instances for the idle checks and soft reset. Acked-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-04drm/amdgpu: remove ib test for the second VCE RingLeo Liu1-0/+4
it seems the VCE ring 1 ib test not reliable, remove it for now. Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Tested-and-Reviewed-by: Sonny Jiang <sonny.jiang@amd.com>
2015-09-04drm/amdgpu: properly enable VM fault interruptsChristian König2-15/+18
This fixes not printing VM faults. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-04drm/amdgpu: fix warning in schedulerAlex Deucher1-2/+3
This should never happen so warn when the count does not equal the expected size. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-03drm/amdgpu: fix buffer placement under memory pressureChristian König1-1/+1
Some buffers (UVD/VM page tables) must be placed in VRAM, but the byte restriction for moving buffers didn't took this into account. Port of radeon commit 4b09556660bfe1b43d72ca858524c6baf2c6cb1d. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-09-03drm/amdgpu/cz: fix cz_dpm_update_low_memory_pstate logicAlex Deucher1-2/+2
The logic was reversed. This feature is not enabled at the moment, but fix it now for the future. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-03drm/amdgpu: fix typo in dce11 watermark setupAlex Deucher1-1/+1
Using the wrong watermwark value for the secondary watermark. Copy paste typo. Noticed by Mykola. Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2015-09-03drm/amdgpu: fix typo in dce10 watermark setupAlex Deucher1-1/+1
Using the wrong watermwark value for the secondary watermark. Copy paste typo. Noticed by Mykola. Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2015-09-03drm/amdgpu: use top down allocation for non-CPU accessible vramAlex Deucher1-1/+1
Should help avoid fragmentation of vram due to CPU access requirements. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-03drm/amdgpu: be explicit about cpu vram access for driver BOs (v2)Alex Deucher12-20/+51
For kernel driver BOs, be explicit about whether we need vram access up front. This avoids unecessary migrations and avoids using visible vram for buffers were it's not needed. v2: line wrap fixes Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-02drm/amdgpu: set MEC doorbell range for FijiJammy Zhou1-1/+2
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-02drm/amdgpu: implement burst NOP for SDMAJammy Zhou3-15/+86
Customize the insert_nop func for SDMA rings, and use burst NOP for ring/IB submissions in other places as well Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-02drm/amdgpu: add insert_nop ring func and default implementationJammy Zhou12-3/+36
The insert_nop function is added to amdgpu_ring_funcs structure as well as the default implementation Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-02drm/amdgpu: add amdgpu_get_sdma_instance helper functionJammy Zhou1-0/+15
This function is added to map the ring to sdma instance Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-02drm/amdgpu: add AMDGPU_MAX_SDMA_INSTANCESJammy Zhou1-1/+4
Remove the hardcoded usage Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-02drm/amdgpu: add burst_nop flag for sdmaJammy Zhou4-0/+7
The burst NOP is supported for SDMA when feature_version is >= 20. Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-02drm/amdgpu: add count field for the SDMA NOP packet v2Jammy Zhou3-0/+11
This is added to support the burst NOP v2: squash the typo fix Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-02drm/amdgpu: use PT for VM sync on unmapChristian König1-13/+6
Instead of the array which is used for ID management. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-09-02drm/amdgpu: make wait_event uninterruptible in push_jobChunming Zhou1-4/+3
with interruptible, the push_job maybe return -ERESTARTSYS, then result in push_job error. E.g. bug trace: [ 181.618860] *****amdgpu_copy_buffer:fence->seq:0x0000000048d8758b, contxt:1207959552, ref:683967304, r:-512 [ 181.618929] BUG: unable to handle kernel paging request at ffffffff811aa266 [ 181.625887] IP: [<ffffffff81548ffc>] reservation_object_add_excl_fence+0x3c/0x120 ... [ 181.859767] [<ffffffff811aa266>] ? unmap_mapping_range+0x66/0x110 [ 181.865928] [<ffffffffc0608ac1>] ttm_bo_move_accel_cleanup+0x41/0x3c0 [ttm] [ 181.872971] [<ffffffffc062d382>] amdgpu_move_blit.isra.18+0x122/0x150 [amdgpu] [ 181.880254] [<ffffffff811aa266>] ? unmap_mapping_range+0x66/0x110 [ 181.886420] [<ffffffffc062d709>] amdgpu_bo_move+0xa9/0x200 [amdgpu] [ 181.892753] [<ffffffffc0606e8d>] ttm_bo_handle_move_mem+0x26d/0x5c0 [ttm] Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2015-09-02drm/amdgpu: fix amdgpu_bo_unreserve order in GEM_OP IOCTL v2Christian König1-1/+4
No copy_(to|from)_user while BO is reserved. v2: handle default path as well Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-09-02drm/amdgpu: partially revert "modify amdgpu_fence_wait_any() to amdgpu_fence_wait_multiple()" v2Christian König3-43/+16
That isn't used any more. v2: rebase Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-02Add radeon suspend/resume quirk for HP Compaq dc5750.Jeffery Miller1-0/+8
With the radeon driver loaded the HP Compaq dc5750 Small Form Factor machine fails to resume from suspend. Adding a quirk similar to other devices avoids the problem and the system resumes properly. Signed-off-by: Jeffery Miller <jmiller@neverware.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2015-09-02drm/amdgpu: re-work sync_resvChunming Zhou1-6/+18
sync_resv is to handle both amdgpu_fence and sched_fence. Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Christian K?nig <christian.koenig@amd.com>
2015-09-02drm/amdgpu/atom: Send out the full AUX addressAlex Deucher1-1/+2
AUX addresses are 20 bits long. Send out the entire address instead of just the low 16 bits. Port of: drm/radeon/atom: Send out the full AUX address to amdgpu Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2015-09-02drm/exynos: remove buf_cnt from struct exynos_drm_fbJoonyoung Shim1-9/+0
Looking other drm drivers, there is no the restriction that framebuffer has only one buffer in .create_handle() callback. They use just first buffer. If this limitation is removed, there is no reason keeping buffer count for framebuffer, so we can remove buf_cnt from struct exynos_drm_fb. Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com> Reviewed-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk> Signed-off-by: Inki Dae <inki.dae@samsung.com>
2015-09-02drm/exynos: remove exynos_drm_fb_get_buf_cnt()Joonyoung Shim3-13/+1
We can get buffer count of framebuffer using drm_format_num_planes(), so keeping exynos_drm_fb_get_buf_cnt() is unnecessary. Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com> Reviewed-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk> Signed-off-by: Inki Dae <inki.dae@samsung.com>
2015-09-02drm/exynos: cleanup exynos_user_fb_create()Joonyoung Shim1-34/+13
Using exynos_drm_framebuffer_init(), redundant codes can be removed. Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com> Reviewed-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk> Signed-off-by: Inki Dae <inki.dae@samsung.com>
2015-09-02drm/exynos: update exynos_drm_framebuffer_init() for multiple buffersJoonyoung Shim3-19/+25
This modifies exynos_drm_framebuffer_init() to be possible to support multiple buffers. Then it can be used by exynos_user_fb_create(). Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
2015-09-02drm/exynos: cleanup to get gem object for fbJoonyoung Shim1-15/+8
Current codes get first gem object and then again get remain gem objects. They can be unified to one routine. Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com> Reviewed-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk> Signed-off-by: Inki Dae <inki.dae@samsung.com>
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