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2019-04-03drm/amd/display: In VRR mode, do DRM core vblank handling at end of vblank. (v2)Mario Kleiner8-16/+204
In VRR mode, proper vblank/pageflip timestamps can only be computed after the display scanout position has left front-porch. Therefore delay calls to drm_crtc_handle_vblank(), and thereby calls to drm_update_vblank_count() and pageflip event delivery, to after the end of front-porch when in VRR mode. We add a new vupdate irq, which triggers at the end of the vupdate interval, ie. at the end of vblank, and calls the core vblank handler function. The new irq handler is not executed in standard non-VRR mode, so vblank handling for fixed refresh rate mode is identical to the past implementation. v2: Implement feedback by Nicholas and Paul Menzel. Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-04-03drm/amd/display: Rework vrr flip throttling for late vblank irq.Mario Kleiner2-12/+14
For throttling to work correctly, we always need a baseline vblank count last_flip_vblank that increments at start of front-porch. This is the case for drm_crtc_vblank_count() in non-VRR mode, where the vblank irq fires at start of front-porch and triggers DRM core vblank handling, but it is no longer the case in VRR mode, where core vblank handling is done later, after end of front-porch. Therefore drm_crtc_vblank_count() is no longer useful for this. We also can't use drm_crtc_accurate_vblank_count(), as that would screw up vblank timestamps in VRR mode when called in front-porch. To solve this, use the cooked hardware vblank counter returned by amdgpu_get_vblank_counter_kms() instead, as that one is cooked to always increment at start of front-porch, independent of when vblank related irq's fire. This patch allows vblank irq handling to happen anywhere within vblank of even after it, without a negative impact on flip throttling, so followup patches can shift the vblank core handling trigger point wherever they need it. Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com> Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-04-03drm/amd/display: Prevent vblank irq disable while VRR is active. (v3)Mario Kleiner1-0/+36
During VRR mode we can not allow vblank irq dis-/enable transitions, as an enable after a disable can happen at an arbitrary time during the video refresh cycle, e.g., with a high likelyhood inside vblank front-porch. An enable during front-porch would cause vblank timestamp updates/calculations which are completely bogus, given the code can't know when the vblank will end as long as we are in front-porch with no page flip completed. Hold a permanent vblank reference on the crtc while in active VRR mode to prevent a vblank disable, and drop the reference again when switching back to fixed refresh rate non-VRR mode. v2: Make sure transition is also handled if vrr is disabled and stream gets disabled in the same atomic commit by moving the call to the transition function outside of plane commit. Suggested by Nicholas. v3: Trivial rebase onto previous patch. Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-04-03drm/amd/display: Update VRR state earlier in atomic_commit_tail.Mario Kleiner1-15/+46
We need the VRR active/inactive state info earlier in the commit sequence, so VRR related setup functions like amdgpu_dm_handle_vrr_transition() know the final VRR state when they need to do their hw setup work. Split update_freesync_state_on_stream() into an early part, that can run at the beginning of commit tail before the vrr transition handling, and a late part that must run after vrr transition handling inside the commit planes code for enabled crtc's. Suggested by Nicholas Kazlauskas. Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-04-03drm/amdgpu: Allow switching to CUSTOM profile on Vega20Kent Russell2-1/+17
Vega20 stores a CUSTOM profile on the GPU, but it may not be valid. Add a bool to vega20_hwmgr to determine whether or not a valid CUSTOM profile has been set, and use that to check when a user requests switching to the CUSTOM profile without passing in any arguments. Then if the CUSTOM profile has been set already, we can switch to it without providing the parameters again Signed-off-by: Kent Russell <kent.russell@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-04-03drm/amdgpu: Allow switching to CUSTOM profile on Vega10 v2Kent Russell1-1/+22
Don't return an error if the CUSTOM profile is selected, just apply it with the values saved to the GPU. But ensure that we zero out the copy stored in adev to ensure that a valid profile has been submitted at some point first v2: Fix comment that wasn't updated from previous patch Signed-off-by: Kent Russell <kent.russell@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-04-03drm/amdgpu: Allow switching to CUSTOM profile on smu7 v2Kent Russell1-11/+21
Allow changing to the CUSTOM profile without requiring the parameters being passed in each time. Store the values in the smu7_profiling table since it's defined here anyways v2: Add check that CUSTOM was previously set Signed-off-by: Kent Russell <kent.russell@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-04-03drm/amdgpu: Add preferred_domain check when determine XGMI stateshaoyunl2-1/+13
Avoid unnecessary XGMI hight pstate trigger when mapping none-vram memory for peer device Signed-off-by: shaoyunl <shaoyun.liu@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-04-03drm/amdgpu: provide the page fault queue to the VM codeChristian König2-0/+2
We are going to need that for recoverable page faults. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-04-03drm/amdgpu: handle leaf PDEs as PTEs on VegaChristian König1-7/+14
This way we get retry faults for missing PDs. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-04-03drm/amdgpu: fix ATC handling for RyzenChristian König1-5/+8
Otherwise we don't correctly use translate further. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-04-03drm/amdgpu: Adjust TMR address alignment as per HW requirementshaoyunl1-3/+3
According to HW engineer, they prefer the TMR address be "naturally aligned", e.g. the start address must be an integer divide of TME size. Signed-off-by: shaoyunl <shaoyun.liu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-04-03drm/amdgpu: Correct the irq types' num of sdmaEmily Deng6-34/+30
Fix the issue about TDR-2 will have "fallback timer expired on ring sdma1". It is because the wrong number of irq types setting. Signed-off-by: Emily Deng <Emily.Deng@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-04-02drm/amdgpu/smu11: fix warning on 32bit archesAlex Deucher1-1/+1
Fixes warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] on 32 bit platforms. Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-04-01MAINTAINERS: Fix pattern for Documentation path for Arm Mali KomedaLiviu Dudau1-1/+1
The Device Tree bindings documentation file is in a simplified path that doesn't match the MAINTAINERS entry. Reported-by: Joe Perches <joe@perches.com> Reviewed-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com> Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
2019-04-01arm/komeda: Compile komeda_debugfs_init() only if CONFIG_DEBUG_FS is enabledLiviu Dudau1-0/+2
We don't call this function if CONFIG_DEBUG_FS is not defined, but we should not be compiling it either, as the declaration of the debugfs core functions is not included. Reported by the kbuild test robot. Reviewed-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com> Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
2019-04-01drm/komeda: Add debugfs node "register" for register dumpjames qian wang (Arm Technology China)5-0/+285
Add a debugfs node "register" and entry function dump_register to dev/pipeline/component to register dump, then user can read "/sys/kernel/debug/komeda/register" to get the register values via these chip function. Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com> [Added the d71_layer_dump() function that was in a previous commit] Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
2019-04-01drm/komeda: Add irq handlingjames qian wang (Arm Technology China)6-2/+346
1. Added irq_handler/irq_enable/irq_disable to komeda_dev_func, then the Komeda-CORE can control the HW irq via these chip function. 2. Install irq and register irq_handler to system by DRM, so once the IRQ coming, the handling sequence is: komeda_kms_irq_handler(int irq, void *data) /* step 1. call into the CHIP to recognize event */ mdev->funcs->irq_handler(mdev, &evts); /* step 2. notify the crtc to handle the events */ for (i = 0; i < kms->n_crtcs; i++) komeda_crtc_handle_event(&kms->crtcs[i], &evts); v2: - Move get IRQ number into this change. - Enable irq before drm_dev_register. Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com> Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
2019-04-01drm/komeda: Add komeda_assemble_pipelinesjames qian wang (Arm Technology China)3-1/+82
komeda_accemble_pipelines is for: 1. Verifing the component->supported_inputs according to the pipeline->avail_components. 2. Generating component->supported_outputs. v2: Lower the debug message of komeda_component_dump to DRM_DEBUG. Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com> Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
2019-04-01drm/komeda: Add D71 improc and timing_ctrlrjames qian wang (Arm Technology China)3-2/+118
Add and initialize improc and timing_ctrlr according to D71 capablitites v2: Rebase. Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com> Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
2019-04-01drm/komeda: Add d71 compiz componentjames qian wang (Arm Technology China)2-8/+110
Implement d71_compiz_init and add compiz component to komeda-CORE v2: Rebase. Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com> Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
2019-04-01drm/komeda: Add d71 layerjames qian wang (Arm Technology China)3-4/+185
1. Add detailed layer/layer_state definitions 2. Add d71_layer_init to report layer features and capabilities according to D71 layer block. 3. Add d71_layer_updat/disable v2: Rebase. Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com> [removed d71_layer_dump() from this commit] Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
2019-03-28Revert "drm/amdgpu: use HMM callback to replace mmu notifier"Alex Deucher4-72/+98
This reverts commit 57731a07795ae80790c6ae7d8e7001cdbd6d14c0. This depends on an HMM fix which is not upstream yet. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-03-28Revert "drm/amdkfd: avoid HMM change cause circular lock"Alex Deucher1-17/+15
This reverts commit 8dd69e69f42397c9b17764a951c44480b340858e. This depends on an HMM fix which is not upstream yet. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-03-28Revert "drm/amdgpu: replace get_user_pages with HMM mirror helpers"Alex Deucher9-182/+278
This reverts commit 915d3eecfa23693bac9e54cdacf84fb4efdcc5c4. This depends on an HMM fix which is not upstream yet. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-03-28Revert "drm/amdgpu: fix HMM config dependency issue"Alex Deucher3-19/+24
This reverts commit 6b8f7e3dee7883084932bbdfce471a2960c6db5d. This depends on an HMM fix which is not upstream yet. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-03-28Revert "drm/amdkfd: support concurrent userptr update for HMM"Alex Deucher1-19/+6
This reverts commit 386a68e78620c793ed1ba9bc5789b90c18be262a. This depends on an HMM fix which is not upstream yet. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-03-28Revert "drm/amdgpu: support userptr cross VMAs case with HMM"Alex Deucher1-91/+35
This reverts commit 5aeaccca30023c00d982dfa7bfd25b384523460a. This depends on an HMM fix which is not upstream yet. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-03-28Revert "drm/amdgpu: more descriptive message if HMM not enabled"Alex Deucher1-2/+0
This reverts commit 194f87ddffe26bbbd124c549a9bf12a96a7f2919. This depends on an HMM fix which is not upstream yet. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-03-28drm/i915: Update DRIVER_DATE to 20190328Joonas Lahtinen1-1/+1
Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
2019-03-28drm/i915: Update DRIVER_DATE to 20190328Joonas Lahtinen1-1/+1
Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
2019-03-28drm/i915: Update DRIVER_DATE to 20190328Joonas Lahtinen1-2/+2
Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
2019-03-28drm/virtio: rework resource creation workflow.Gerd Hoffmann6-91/+83
This patch moves the virtio_gpu_cmd_create_resource() call (which notifies the host about the new resource created) into the virtio_gpu_object_create() function. That way we can call virtio_gpu_cmd_create_resource() before ttm_bo_init(), so the host already knows about the object when ttm initializes the object and calls our driver callbacks. Specifically the object is already created when the virtio_gpu_ttm_tt_bind() callback invokes virtio_gpu_object_attach(), so the extra virtio_gpu_object_attach() calls done after virtio_gpu_object_create() are not needed any more. The fence support for the create ioctl becomes a bit more tricky though. The code moved into virtio_gpu_object_create() too. We first submit the (fenced) virtio_gpu_cmd_create_resource() command, then initialize the ttm object, and finally attach just created object to the fence for the command in case it didn't finish yet. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Acked-by: Noralf Trønnes <noralf@tronnes.org> Link: http://patchwork.freedesktop.org/patch/msgid/20190318113332.10900-6-kraxel@redhat.com
2019-03-28drm/virtio: params struct for virtio_gpu_cmd_create_resource_3d()Gerd Hoffmann3-19/+32
Add 3d resource parameters to virtio_gpu_object_params struct. With that in place we can use it for virtio_gpu_cmd_resource_create_3d() calls. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Acked-by: Noralf Trønnes <noralf@tronnes.org> Link: http://patchwork.freedesktop.org/patch/msgid/20190318113332.10900-5-kraxel@redhat.com
2019-03-28drm/virtio: params struct for virtio_gpu_cmd_create_resource()Gerd Hoffmann4-15/+16
Add format, width and height fields to the virtio_gpu_object_params struct. With that in place we can use the parameter struct for virtio_gpu_cmd_create_resource() calls too. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Acked-by: Noralf Trønnes <noralf@tronnes.org> Link: http://patchwork.freedesktop.org/patch/msgid/20190318113332.10900-4-kraxel@redhat.com
2019-03-28drm/virtio: use struct to pass params to virtio_gpu_object_create()Gerd Hoffmann4-34/+35
Create virtio_gpu_object_params, use that to pass object parameters to virtio_gpu_object_create. This is just the first step, followup patches will add more parameters to the struct. The plan is to use the struct for all object parameters. Drop unused "kernel" parameter for virtio_gpu_alloc_object(), it is unused and always false. Also drop "pinned" parameter. virtio-gpu doesn't shuffle around objects, so effecively they all are pinned anyway. Hardcode TTM_PL_FLAG_NO_EVICT so ttm knows. Doesn't change much for the moment as virtio-gpu supports TTM_PL_FLAG_TT only so there is no opportunity to move around objects. That'll probably change in the future though. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Acked-by: Noralf Trønnes <noralf@tronnes.org> Link: http://patchwork.freedesktop.org/patch/msgid/20190318113332.10900-3-kraxel@redhat.com
2019-03-28drm/virtio: move virtio_gpu_object_{attach, detach} calls.Gerd Hoffmann1-68/+24
Drop the dummy ttm backend implementation, add a real one for TTM_PL_FLAG_TT objects. The bin/unbind callbacks will call virtio_gpu_object_{attach,detach}, to update the object state on the host side, instead of invoking those calls from the move_notify() callback. With that in place the move and move_notify callbacks are not needed any more, so drop them. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Acked-by: Noralf Trønnes <noralf@tronnes.org> Link: http://patchwork.freedesktop.org/patch/msgid/20190318113332.10900-2-kraxel@redhat.com
2019-03-28drm/virtio: add virtio-gpu-features debugfs file.Gerd Hoffmann1-1/+26
This file prints which features the virtio-gpu device has. Also add "virtio-gpu-" prefix to the existing fence file, to make clear this is a driver-specific debugfs file. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Acked-by: Noralf Trønnes <noralf@tronnes.org> Link: http://patchwork.freedesktop.org/patch/msgid/20190320083612.32067-1-kraxel@redhat.com
2019-03-28drm/virtio: remove set but not used variable 'vgdev'YueHaibing1-6/+0
Fixes gcc '-Wunused-but-set-variable' warning: drivers/gpu/drm/virtio/virtgpu_ttm.c: In function 'virtio_gpu_init_mem_type': drivers/gpu/drm/virtio/virtgpu_ttm.c:117:28: warning: variable 'vgdev' set but not used [-Wunused-but-set-variable] drivers/gpu/drm/virtio/virtgpu_ttm.c: In function 'virtio_gpu_bo_swap_notify': drivers/gpu/drm/virtio/virtgpu_ttm.c:300:28: warning: variable 'vgdev' set but not used [-Wunused-but-set-variable] It is never used since introduction in dc5698e80cf7 ("Add virtio gpu driver.") Signed-off-by: YueHaibing <yuehaibing@huawei.com> Reviewed-by: Mukesh Ojha <mojha@codeaurora.org> Link: http://patchwork.freedesktop.org/patch/msgid/20190325092631.152060-1-yuehaibing@huawei.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2019-03-28drm: rcar-du: lvds: Set LVEN and LVRES bits together on D3Laurent Pinchart1-2/+6
On the D3 SoC the LVDS PHY must be enabled in the same register write that enables the LVDS output. Skip writing the LVEN bit independently on that platform, it will be set by the write that sets LVRES. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
2019-03-28drm: rcar-du: lvds: Adjust operating frequency for D3 and E3Laurent Pinchart1-2/+7
The D3 and E3 SoCs have different pixel clock frequency limits for the LVDS encoder than the other SoCs in the Gen3 family. Adjust the mode fixup implementation accordingly. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
2019-03-28drm: rcar-du: Link CRTCs to the DU deviceKieran Bingham3-25/+27
The rcar_du_crtc functions have a heavy reliance on the rcar_du_group structure, in many cases just to access the DU device context. To better separate the groups out of the CRTC handling code, give the rcar_du_crtc its own pointer to the device and remove the indirection through the group pointers. Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2019-03-28drm: rcar-du: lvds: Fix post-DLL divider calculationLaurent Pinchart1-1/+1
The PLL parameters are computed by looping over the range of acceptable M, N and E values, and selecting the combination that produces the output frequency closest to the target. The internal frequency constraints are taken into account by restricting the tested values for the PLL parameters, reducing the search space. The target frequency, however, is only taken into account when computing the post-PLL divider, which can result in a 0 value for the divider when the PLL output frequency being tested is lower than half of the target frequency. Subsequent loops will produce a better set of PLL parameters, but for some of the iterations this can result in a division by 0. Fix it by clamping the divider value. We could instead restrict the E values being tested in the inner loop, but that would require additional calculation that would likely be less efficient as the E parameter can only take three different values. Fixes: c25c01361199 ("drm: rcar-du: lvds: D3/E3 support") Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
2019-03-28drm: Forward-declare struct drm_format_info in drm_framebuffer.hLaurent Pinchart1-0/+1
drm_framebuffer.h makes use of a pointer to struct drm_format_info but doesn't include drm_fourcc.h (neither directly nor indirectly). Forward-declare the structure. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
2019-03-28drm: rcar-du: Remove unused prototypesKieran Bingham1-2/+0
The CRTC suspend and resume functions have been replaced, but the prototypes were not removed. Remove the redundant definitions. Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2019-03-28drm: rcar-du: crtc: Make local functions staticKieran Bingham1-4/+5
The rcar_du_crtc_mode_valid() and rcar_du_crtc_get_crc_sources() functions are accessed only through a function pointer table. Convert the function definitions to be static to the module. Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2019-03-28drm: Fix subtle spelling error in drm_crtc_stateKieran Bingham1-1/+1
The drm_crtc_state documentation contains a subtle misspelling of the word subtle. Correct it. Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2019-03-28drm: rcar-du: Support panels connected directly to the DPAD outputsLaurent Pinchart1-6/+48
The R-Car DU driver assumes that a bridge is always connected to the DU output. This is valid for the LVDS and HDMI outputs, but the DPAD outputs can be connected directly to a panel, in which case no bridge is available. To support this use case, detect whether the entities connected to the DU DPAD outputs are encoders or panels based on the number of ports of their DT node, and retrieve the corresponding type of DRM objects. For panels, additionally create panel bridge instances. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Kevin Key <kevin.key@gentex.com> Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Reviewed-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
2019-03-27drm/amd/powerplay: update current profile mode only when it's really appliedEvan Quan2-10/+12
No need to update current profile mode if the new profile mode does not take effect in fact. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Kent Russell <kent.russell@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-03-27drm/amd/display: fix odm output gamma programmingDmytro Laktyushkin2-2/+3
Currently only top pipe gets output tf programmed. This change makes all odm head pipes get output tf programmed. Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Nikola Cornij <Nikola.Cornij@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>