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2016-09-23mtd: nand: mxc: Test CONFIG_OF instead of CONFIG_OF_MTDBoris Brezillon1-1/+1
We are about to drop the OF_MTD Kconfig option. Test CONFIG_OF activation instead of CONFIG_OF_MTD. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23mtd: nand: Fix nand_command_lp() for 8bits opcodesBoris Brezillon1-1/+4
8 bits opcodes should be followed by a single address cycle. Make the 2nd address cycle dependent of !nand_opcode_8bits(command). Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23mtd: nand: sunxi: Support ECC maximizationBoris Brezillon1-0/+29
Setup the maximum ECC config when NAND_ECC_MAXIMIZE is set. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23mtd: nand: Support maximizing ECC when using software BCHBoris Brezillon1-0/+20
Add support for ECC maximization when software BCH with nand_ooblayout_lp_ops layout is used. Other cases should be handled by the NAND controller driver. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23mtd: nand: Add an option to maximize the ECC strengthBoris Brezillon3-0/+13
The generic NAND DT bindings allows one to tweak the ECC strength and step size to their need. It can be used to lower the ECC strength to match a bootloader/firmware config, but might also be used to get a better reliability. In the latter case, the user might want to use the maximum ECC strength without having to explicitly calculate the exact value (this value not only depends on the OOB size, but also on the NAND controller, and can be tricky to extract). Add a generic 'nand-ecc-maximize' DT property and the associated NAND_ECC_MAXIMIZE flag, to let ECC controller drivers select the best ECC strength and step-size on their own. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Rob Herring <robh@kernel.org>
2016-09-23mtd: nand: mxc: Add timing setup for v2 controllersSascha Hauer1-2/+82
So far we relied on reset default or the bootloader to configure a suitable clk rate for the Nand controller. This works but we can optimize the timing for better performance. This sets the clk rate for v2 controllers (i.MX25/35) based on the timing mode read from the ONFI parameter page. This may also enable the symmetric mode (aks EDO mode) if necessary which reads one word per clock cycle. Tested on an i.MX25 with a Micron MT29F4G08ABBDAHC attached. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23mtd: nand: mxc: implement onfi get/set featuresSascha Hauer1-0/+55
To be able to support different ONFI timing modes we have to implement the onfi_set_features and onfi_get_features. Tested on an i.MX25 SoC. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23mtd: nand: sunxi: switch from manual to automated timing configSascha Hauer1-62/+14
The NAND framework is now able to select the best NAND timings for us. All we have to do is implement a ->setup_data_interface() function to apply those timings and remove the timing selection code from the sunxi driver. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23mtd: nand: automate NAND timings selectionBoris Brezillon2-4/+167
The NAND framework provides several helpers to query timing modes supported by a NAND chip, but this implies that all NAND controller drivers have to implement the same timings selection dance. Also currently NAND devices can be resetted at arbitrary places which also resets the timing for ONFI chips to timing mode 0. Provide a common logic to select the best timings based on ONFI or ->onfi_timing_mode_default information. Hook this into nand_reset() to make sure the new timing is applied each time during a reset. NAND controller willing to support timings adjustment should just implement the ->setup_data_interface() method. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2016-09-23mtd: nand: Expose data interface for ONFI mode 0Sascha Hauer2-0/+13
The nand layer will need ONFI mode 0 to use it as timing mode before and right after reset. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23mtd: nand: Add function to convert ONFI mode to data_interfaceSascha Hauer2-0/+34
onfi_init_data_interface() initializes a data interface with values from a given ONFI mode. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23mtd: nand: convert ONFI mode into data interfaceSascha Hauer1-206/+224
struct nand_data_interface is the designated type to pass to the NAND drivers to configure the timing. To simplify further patches convert the onfi_sdr_timings array from type struct nand_sdr_timings nand_data_interface. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23mtd: nand: Introduce nand_data_interfaceSascha Hauer1-49/+117
Currently we have no data structure to fully describe a NAND timing. We only have struct nand_sdr_timings for NAND timings in SDR mode, but nothing for DDR mode and also no container to store both types of timing. This patch adds struct nand_data_interface which stores the timing type and a union of different timings. This can be used to pass to drivers in order to configure the timing. Add kerneldoc for struct nand_sdr_timings while touching it anyway. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23mtd: nand: Create a NAND reset functionSascha Hauer2-5/+24
When NAND devices are resetted some initialization may have to be done, like for example they have to be configured for the timing mode that shall be used. To get a common place where this initialization can be implemented create a nand_reset() function. This currently only issues a NAND_CMD_RESET to the NAND device. The places issuing this command manually are replaced with a call to nand_reset(). Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23mtd: nand: remove unnecessary 'extern' from function declarationsSascha Hauer1-15/+15
'extern' is not necessary for function declarations. To prevent people from adding the keyword to new declarations remove the existing ones. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23MAINTAINERS: Add maintainer entry for Ingenic JZ4780 NAND driverHarvey Hunt1-0/+6
Signed-off-by: Harvey Hunt <harveyhuntnexus@gmail.com> Cc: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com> Cc: linux-mtd@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23mtd: nand: Allow MTD_NAND_OMAP2 to be usable on Keystone devicesRoger Quadros1-4/+4
Some Keystone devices (e.g. K2G) include a OMAP NAND IP. Allow the NAND driver to be usable for both Keystone and OMAP devices. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23mtd: brcmnand: iProc big endian and ONFI supportRay Jui3-15/+28
This patch adds big endian and ONFI support for various iProc based SoCs that use the core brcmstb NAND controller This patch was originally implemented by Prafulla Kota <prafulla.kota@broadcom.com> and fully tested on iProc based NS2 SVK Signed-off-by: Prafulla Kota <prafulla.kota@broadcom.com> Signed-off-by: Ray Jui <ray.jui@broadcom.com> Reviewed-by: Kamal Dasu <kdasu.kdev@gmail.com> Acked-by: Kamal Dasu <kdasu.kdev@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23mtd: nand_bbt: scan for next free bbt block if writing bbt failsKyle Roeschley1-6/+45
If erasing or writing the BBT fails, we should mark the current BBT block as bad and use the BBT descriptor to scan for the next available unused block in the BBT. We should only return a failure if there isn't any space left. Signed-off-by: Kyle Roeschley <kyle.roeschley@ni.com> Suggested-by: Jeff Westfahl <jeff.westfahl@ni.com> Tested-by: Kyle Roeschley <kyle.roeschley@ni.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23mtd: nand_bbt: Move BBT block selection logic out of write_bbt()Boris Brezillon1-36/+74
This clarifies the write_bbt() function by removing the write label and simplifying the error/exit path. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Tested-by: Kyle Roeschley <kyle.roeschley@ni.com>
2016-09-23mtd: nand: timings: Reorder tRR_min def in mode 0Boris Brezillon1-1/+1
In the ONFI spec, the tRR_min entry is defined before the tRST_max one. Reoder the definition to make it easier to review. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23mtd: nand: timings: Fix tADL_min for ONFI 4.0 chipsBoris Brezillon1-6/+6
ONFI 4.0 spec defines different values for the tADL_min timing. Since we don't want to have different timings depending on the ONFI version, we just set tADL_min to the maximum value (the one specified in the ONFI 4.0 spec). Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23mtd: nand: gpmi: get correct free oob spaceHan Xu1-1/+2
change the way to calculate pagesize to get correct free oob space for legacy_set_geometry function. Signed-off-by: Han Xu <han.xu@nxp.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23mtd: nand: sh_flctl: handle dma_submit() errorsBrian Norris1-1/+7
Some build tools noticed that 'cookie' is being set but not used. Might as well catch the errors here and handle them the same way we handle other DMA prep steps. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23mtd: nand: s3c2410: Register cpufreq notifier only on S3C24xxKrzysztof Kozlowski1-2/+2
The driver registered for CPU frequency transitions to recalculate its clock when ARM clock frequency changes (ratio between frequencies of ARM's parent clock (fclk) and clock for peripherals remains fixed). This is needed only on S3C24xx platform when cpufreq driver is enabled so limit the ifdef to respective cpufreq Kconfig. Suggested-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23mtd: nand: Get rid of needless 'goto'Andrey Smirnov1-12/+6
Using "goto" and "switch" statement only makes it harder to follow control flow and doesn't bring any advantages. Rewrite the code to avoid using "goto". Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23mtd: nand: Error out if cmd_ctrl() is missingAndrey Smirnov1-0/+9
If no user specified chip->select_chip() function is provided, code in nand_base.c will automatically set this hook to nand_select_chip(), which in turn depends on chip->cmd_ctrl() hook being valid. Not providing both of those functions in NAND controller driver (for example by mistake) will result in a bit cryptic segfault. Same is true for chip->cmdfunc(). To avoid the above scenario add a check in nand_scan_dent and error out if cmd_ctrl() is not provided. Suggested-by: Boris Brezillon <boris.brezillon@free-electrons.com> Suggested-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23Kconfig: nand: Remove redundant dependency on MTD_NANDAndrey Smirnov1-1/+1
Config MTD_NAND_FSL_IFC is already located inside 'if MTD_NAND' statment, so there's no need to explicitly specify it as a dependency. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23Kconfig: nand: Make MTD_NAND_FSL_ELBC depend on FSL_SOCAndrey Smirnov1-1/+1
MTD_NAND_FSL_ELBC selects FSL_LBC that in turn depends on FSL_SOC, so depending on PPC instead of FSL_SOC leads to this message: warning: (MPC836x_RDK && MTD_NAND_FSL_ELBC && MTD_NAND_FSL_UPM) selects FSL_LBC which has unmet direct dependencies (FSL_SOC) when doing make ARCH=powerpc \ CROSS_COMPILE=powerpc-e500v2-linux-gnuspe- \ allmodconfig" Changing dependency to FSL_SOC fixes that. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23mtd: nand: import nand_hw_control_init()Marc Gonzalez14-26/+20
The code to initialize a struct nand_hw_control is duplicated across several drivers. Factorize it using an inline function. Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-08-07Linux 4.8-rc1Linus Torvalds1-2/+2
2016-08-07block: rename bio bi_rw to bi_opfJens Axboe51-157/+158
Since commit 63a4cc24867d, bio->bi_rw contains flags in the lower portion and the op code in the higher portions. This means that old code that relies on manually setting bi_rw is most likely going to be broken. Instead of letting that brokeness linger, rename the member, to force old and out-of-tree code to break at compile time instead of at runtime. No intended functional changes in this commit. Signed-off-by: Jens Axboe <axboe@fb.com>
2016-08-07target: iblock_execute_sync_cache() should use bio_set_op_attrs()Jens Axboe1-1/+1
The original commit missed this function, it needs to mark it a write flush. Cc: Mike Christie <mchristi@redhat.com> Fixes: e742fc32fcb4 ("target: use bio op accessors") Signed-off-by: Jens Axboe <axboe@fb.com>
2016-08-07mm: make __swap_writepage() use bio_set_op_attrs()Jens Axboe1-2/+3
Cleaner than manipulating bio->bi_rw flags directly. Signed-off-by: Jens Axboe <axboe@fb.com>
2016-08-07block/mm: make bdev_ops->rw_page() take a bool for read/writeJens Axboe11-53/+51
Commit abf545484d31 changed it from an 'rw' flags type to the newer ops based interface, but now we're effectively leaking some bdev internals to the rest of the kernel. Since we only care about whether it's a read or a write at that level, just pass in a bool 'is_write' parameter instead. Then we can also move op_is_write() and friends back under CONFIG_BLOCK protection. Reviewed-by: Mike Christie <mchristi@redhat.com> Signed-off-by: Jens Axboe <axboe@fb.com>
2016-08-07fs: return EPERM on immutable inodeEryu Guan4-4/+5
In most cases, EPERM is returned on immutable inode, and there're only a few places returning EACCES. I noticed this when running LTP on overlayfs, setxattr03 failed due to unexpected EACCES on immutable inode. So converting all EACCES to EPERM on immutable inode. Acked-by: Dave Chinner <dchinner@redhat.com> Signed-off-by: Eryu Guan <guaneryu@gmail.com> Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2016-08-05ramoops: use persistent_ram_free() instead of kfree() for freeing przHiraku Toyooka1-3/+3
persistent_ram_zone(=prz) structures are allocated by persistent_ram_new(), which includes vmap() or ioremap(). But they are currently freed by kfree(). This uses persistent_ram_free() for correct this asymmetry usage. Signed-off-by: Hiraku Toyooka <hiraku.toyooka.gu@hitachi.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.kw@hitachi.com> Cc: Mark Salyzyn <salyzyn@android.com> Cc: Seiji Aguchi <seiji.aguchi.tr@hitachi.com> Signed-off-by: Kees Cook <keescook@chromium.org>
2016-08-05ramoops: use DT reserved-memory bindingsKees Cook4-33/+56
Instead of a ramoops-specific node, use a child node of /reserved-memory. This requires that of_platform_device_create() be explicitly called for the node, though, since "/reserved-memory" does not have its own "compatible" property. Suggested-by: Rob Herring <robh@kernel.org> Signed-off-by: Kees Cook <keescook@chromium.org> Acked-by: Rob Herring <robh@kernel.org>
2016-08-05NTB: ntb_hw_intel: use local variable pdevAllen Hubbe1-5/+5
Clean up duplicated expression by replacing it with the equivalent local variable pdev. Signed-off-by: Allen Hubbe <Allen.Hubbe@emc.com> Acked-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Jon Mason <jdmason@kudzu.us>
2016-08-05NTB: ntb_hw_intel: show BAR size in debugfs infoAllen Hubbe1-1/+38
It will be useful to know the hardware configured BAR size to diagnose issues with NTB memory windows. Signed-off-by: Allen Hubbe <Allen.Hubbe@emc.com> Acked-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Jon Mason <jdmason@kudzu.us>
2016-08-05ntb_test: Add a selftest script for the NTB subsystemLogan Gunthorpe2-0/+423
This script automates testing doorbells, scratchpads and memory windows for an NTB device. It can be run locally, with the NTB looped back to the same host or use SSH to remotely control the second host. In the single host case, the script just needs to be passed two arguments: a PCI ID for each side of the link. In the two host case the -r option must be used to specify the remote hostname (which must be SSH accessible and should probably have ssh-keys exchanged). A sample run looks like this: $ sudo ./ntb_test.sh 0000:03:00.1 0000:83:00.1 -p 29 Starting ntb_tool tests... Running link tests on: 0000:03:00.1 / 0000:83:00.1 Passed Running link tests on: 0000:83:00.1 / 0000:03:00.1 Passed Running db tests on: 0000:03:00.1 / 0000:83:00.1 Passed Running db tests on: 0000:83:00.1 / 0000:03:00.1 Passed Running spad tests on: 0000:03:00.1 / 0000:83:00.1 Passed Running spad tests on: 0000:83:00.1 / 0000:03:00.1 Passed Running mw0 tests on: 0000:03:00.1 / 0000:83:00.1 Passed Running mw0 tests on: 0000:83:00.1 / 0000:03:00.1 Passed Running mw1 tests on: 0000:03:00.1 / 0000:83:00.1 Passed Running mw1 tests on: 0000:83:00.1 / 0000:03:00.1 Passed Starting ntb_pingpong tests... Running ping pong tests on: 0000:03:00.1 / 0000:83:00.1 Passed Starting ntb_perf tests... Running local perf test without DMA 0: copied 536870912 bytes in 164453 usecs, 3264 MBytes/s Passed Running remote perf test without DMA 0: copied 536870912 bytes in 164453 usecs, 3264 MBytes/s Passed Signed-off-by: Logan Gunthorpe <logang@deltatee.com> Acked-by: Shuah Khan <shuahkh@osg.samsung.com> Acked-by: Allen Hubbe <Allen.Hubbe@emc.com> Signed-off-by: Jon Mason <jdmason@kudzu.us>
2016-08-05ntb_perf: clear link_is_up flag when the link goes down.Logan Gunthorpe1-19/+9
When the link goes down, the link_is_up flag did not return to false. This could have caused some subtle corner case bugs when the link goes up and down quickly. Once that was fixed, there was found to be a race if the link was brought down then immediately up. The link_cleanup work would occasionally be scheduled after the next link up event. This would cancel the link_work that was supposed to occur and leave ntb_perf in an unusable state. To fix this we get rid of the link_cleanup work and put the actions directly in the link_down event. Signed-off-by: Logan Gunthorpe <logang@deltatee.com> Acked-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Jon Mason <jdmason@kudzu.us>
2016-08-05ntb_pingpong: Add a debugfs file to get the ping countLogan Gunthorpe1-1/+61
This commit adds a debugfs 'count' file to ntb_pingpong. This is so testing with ntb_pingpong can be automated beyond just checking the logs for pong messages. The count file returns a number which increments every pong. The counter can be cleared by writing a zero. Signed-off-by: Logan Gunthorpe <logang@deltatee.com> Acked-by: Allen Hubbe <Allen.Hubbe@emc.com> Signed-off-by: Jon Mason <jdmason@kudzu.us>
2016-08-05ntb_tool: Add link status and files to debugfsLogan Gunthorpe1-0/+92
In order to more successfully script with ntb_tool it's useful to have a link file to check the link status so that the script doesn't use the other files until the link is up. This commit adds a 'link' file to the debugfs directory which reads boolean (Y or N) depending on the link status. Writing to the file change the link state using ntb_link_enable or ntb_link_disable. A 'link_event' file is also provided so an application can block until the link changes to the desired state. If the user writes a 1, it will block until the link is up. If the user writes a 0, it will block until the link is down. Signed-off-by: Logan Gunthorpe <logang@deltatee.com> Acked-by: Allen Hubbe <Allen.Hubbe@emc.com> Signed-off-by: Jon Mason <jdmason@kudzu.us>
2016-08-05ntb_tool: Postpone memory window initialization for the userLogan Gunthorpe1-138/+228
In order to make the interface closer to the raw NTB API, this commit changes memory windows so they are not initialized on link up. Instead, the 'peer_trans*' debugfs files are introduced. When read, they return information provided by ntb_mw_get_range. When written, they create a buffer and initialize the memory window. The value written is taken as the requested size of the buffer (which is then rounded for alignment). Writing a value of zero frees the buffer and tears down the memory window translation. The 'peer_mw*' file is only created once the memory window translation is setup by the user. Additionally, it was noticed that the read and write functions for the 'peer_mw*' files should have checked for a NULL pointer. Signed-off-by: Logan Gunthorpe <logang@deltatee.com> Acked-by: Allen Hubbe <Allen.Hubbe@emc.com> Signed-off-by: Jon Mason <jdmason@kudzu.us>
2016-08-05ntb_perf: Wait for link before running testLogan Gunthorpe1-1/+4
Instead of returning immediately with an error when the link is down, wait for the link to come up (or the user sends a SIGINT). This is to make scripting ntb_perf easier. Signed-off-by: Logan Gunthorpe <logang@deltatee.com> Acked-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Jon Mason <jdmason@kudzu.us>
2016-08-05ntb_perf: Return results by reading the run fileLogan Gunthorpe1-12/+55
Instead of having to watch logs, allow the results to be retrieved by reading back the run file. This file will return "running" when the test is running and nothing if no tests have been run yet. It returns 1 line per thread, and will display an error message if the corresponding thread returns an error. With the above change, the pr_info calls that returned the results are then changed to pr_debug calls. Signed-off-by: Logan Gunthorpe <logang@deltatee.com> Acked-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Jon Mason <jdmason@kudzu.us>
2016-08-05ntb_perf: Improve thread handling to increase robustnessLogan Gunthorpe1-48/+76
This commit accomplishes a few things: 1) Properly prevent multiple sets of threads from running at once using a mutex. Lots of race issues existed with the thread_cleanup. 2) The mutex allows us to ensure that threads are finished before tearing down the device or module. 3) Don't use kthread_stop when the threads can exit by themselves, as this is counter-indicated by the kthread_create documentation. Threads now wait for kthread_stop to occur. 4) Writing to the run file now blocks until the threads are complete. The test can then be safely interrupted by a SIGINT. Also, while I was at it: 5) debugfs_run_write shouldn't return 0 in the early check cases as this could cause debugfs_run_write to loop undesirably. Signed-off-by: Logan Gunthorpe <logang@deltatee.com> Acked-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Jon Mason <jdmason@kudzu.us>
2016-08-05ntb_perf: Schedule based on time not on performanceLogan Gunthorpe1-2/+4
When debugging performance problems, if some issue causes the ntb hardware to be significantly slower than expected, ntb_perf will hang requiring a reboot because it only schedules once every 4GB. Instead, schedule based on jiffies so it will not hang the CPU if the transfer is slow. Signed-off-by: Logan Gunthorpe <logang@deltatee.com> Acked-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Jon Mason <jdmason@kudzu.us>
2016-08-05ntb_transport: Check the number of spads the hardware supportsLogan Gunthorpe2-4/+13
I'm working on hardware that currently has a limited number of scratchpad registers and ntb_ndev fails with no clue as to why. I feel it is better to fail early and provide a reasonable error message then to fail later on. The same is done to ntb_perf, but it doesn't currently require enough spads to actually fail. I've also removed the unused SPAD_MSG and SPAD_ACK enums so that MAX_SPAD accurately reflects the number of spads used. Signed-off-by: Logan Gunthorpe <logang@deltatee.com> Acked-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Jon Mason <jdmason@kudzu.us>
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