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2020-07-01drm/amd/display: Added local_sink null check before accessJake Wang1-2/+4
[Why & How] Need to check if local_sink is NULL before accessing. Signed-off-by: Jake Wang <haonan.wang2@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01drm/amd/display: clip plane rects in DM before passing into DCAurabindo Pillai1-0/+25
[Why] DC global validation can fail when userspace requests to draw large plane without performing the clipping themselves. This is observed in the IGT kms_plane panning tests for 4K displays where they draw an 8K plane without any clipping while expecting only the top 4K to be drawn. [How] DRM already has helpers to take care of the clipping necessary and to mark whether a plane is visible or not, so make use of these helpers in DM before passing the plane to DC. Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01drm/amd/display: 3.2.90Aric Cyr1-1/+1
Signed-off-by: Aric Cyr <aric.cyr@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01drm/amd/display: [FW Promotion] Release 1.0.18Anthony Koo1-6/+39
[Header Changes] - Update scratch information for boot status Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01drm/amd/display: Correctly respond in psr enablement interfaceCamille Cho1-2/+4
[Why] dc_link_set_psr_allow_active() always returns true, even in the case that PSR is not supported. [How] Hook up the return value of dc_link_set_psr_allow_active(). Signed-off-by: Camille Cho <Camille.Cho@amd.com> Reviewed-by: Josip Pavic <Josip.Pavic@amd.com> Acked-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01drm/amd/display: Fix DML failures caused by doubled stereo viewportNicholas Kazlauskas2-2/+17
[Why] Side-by-side and Top-and-bottom stereo configurations fail DML mode validation due to Viewport exceeded. This is because we consider the planes as being pipe split in pipe population so we end up doubling the viewport width, eg. from 4k to 8k. [How] These pipes technically aren't hsplit, so add a check for determining whether is_hsplit should be set. Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01drm/amd/display: enable assrBhawanpreet Lakha2-0/+38
[Why] assr is content protection for eDP, in order to use it we need to call psp ta (dtm) [How] We have a enable_assr callback, hook into this and call the correct psp cmd id to enable assr. Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Hersen Wu <hersenxs.wu@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01drm/amd/display: implement edid max TMDS clock check in DCMichael Strauss2-0/+13
[WHY] Currently DC doesn't check requested pixel clock against an EDID specified TMDS max clock if it exists, passing modes that should fail [HOW] Add max TMDS clk to edid caps and perform check during validation Signed-off-by: Michael Strauss <michael.strauss@amd.com> Reviewed-by: Eric Yang <eric.yang2@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01drm/amd/display: [FW Promotion] Release 1.0.17Anthony Koo1-2/+2
Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01drm/amd/display: Fixed using wrong eDP power sequence function pointerYi-Ling Chen1-2/+2
[why] dc->hwss->edp_backlight_control is null, it would casue it only be off main-link of eDP. It is not worng behavior for eDP power sequence off. [how] Must use hwseq->funcs.edp_backlight_control finction pointer for edp backlight. Signed-off-by: Yi-Ling Chen <Yi-Ling.Chen2@amd.com> Reviewed-by: Sung Lee <Sung.Lee@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01drm/amd/display: Fix calculation of virtual channel payloadMikita Lipski2-11/+10
[why] The calculation of virtual channel payload would not take link settings in account. As we calculate VCPI slots needed both PBN for stream and also PBN per time slot. Before we would use generic PBN per time slot, which would not change with link settings causing wrong Payload allocation. [how] Provide PBN per time slot for each Virtual channel payload calculation. Signed-off-by: Mikita Lipski <mikita.lipski@amd.com> Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01drm/amd/display: [FW Promotion] Release 1.0.16Anthony Koo1-2/+2
Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01drm/amd/display: Use dmub fw to lock pipe, cursor, digWyatt Wood8-14/+200
[Why] Hw lock manager adds the ability to lock pipe, cursor, and dig in fw. [How] Send hw lock command to fw to lock pipe, cursor, and dig. Signed-off-by: Wyatt Wood <wyatt.wood@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01drm amdgpu: SI UVD enabled on Verde, Tahiti, PitcairnSonny Jiang1-1/+1
Enable asic Verde, Tahiti and Pitcairn UVD block. Signed-off-by: Sonny Jiang <sonny.jiang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01drm amdgpu: SI UVD enable for OlandSonny Jiang1-2/+2
Enable Oland UVD block. Signed-off-by: Sonny Jiang <sonny.jiang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01drm amdgpu: SI UVD add uvd_v3_1 to makefileSonny Jiang1-1/+2
Signed-off-by: Sonny Jiang <sonny.jiang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01drm amdgpu: SI UVD context rreg/wregSonny Jiang1-2/+24
Implement SI uvd_ctx_rreg/wreg functions. Signed-off-by: Sonny Jiang <sonny.jiang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01drm amdgpu: SI UVD v3_1 (v2)Sonny Jiang2-0/+822
Implement SI UVD. The SI UVD firmware requires validation. v2: squash in missing brace fix (Colin Ian King) Signed-off-by: Sonny Jiang <sonny.jiang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01drm amdgpu: SI UVD registersSonny Jiang2-0/+902
Add SI UVD registers files. Signed-off-by: Sonny Jiang <sonny.jiang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01drm amdgpu: SI UVD PACKET_TYPE0Sonny Jiang1-3/+4
Fix packet_type0 definition in sid. Signed-off-by: Sonny Jiang <sonny.jiang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01drm amdgpu: SI UVD add firmwaresSonny Jiang1-0/+26
For implement UVD on SI asic, add Oland, Pitcairn, Verde, Tahiti firmwares. Signed-off-by: Sonny Jiang <sonny.jiang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01drm/amdgpu/uvd3.x: fix register definition warningsAlex Deucher3-19/+3
drop the duplicate register macros from sid.h and use the standard ones in the oss register headers. Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01drm/amd/display: fix compilation error on allmodconfigQingqing Zhuo1-5/+1
when compiled with allmodconfig option, there are error messages as below: ERROR: modpost: "mod_color_is_table_init" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined! ERROR: modpost: "mod_color_get_table" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined! ERROR: modpost: "mod_color_set_table_init_state" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined! To fix the issue, this commits removes CONFIG_DRM_AMD_DC_DCN guard in color/makefile. Signed-off-by: Qingqing Zhuo <qingqing.zhuo@amd.com> CC: Lewis Huang <Lewis.Huang@amd.com> CC: Aric Cyr <Aric.Cyr@amd.com> CC: Alexander Deucher <Alexander.Deucher@amd.com> CC: Harry Wentland <hwentlan@amd.com> CC: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> CC: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> CC: Stephen Rothwell <sfr@canb.auug.org.au> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01drm/amdgpu: fix unused variableJames Zhu8-113/+102
SOC15_WAIT_ON_RREG's return value needn't always been handled by caller. new design is to fix this kind of unused variable. Signed-off-by: James Zhu <James.Zhu@amd.com> Reported-by: kernel test robot <lkp@intel.com> Acked-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01drm/amdgpu: add fw release for sdma v5_0Wenhui Sheng1-1/+5
sdma fw isn't released when module exit Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Wenhui Sheng <Wenhui.Sheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01drm/amdgpu: sdma v5_2 ring bo mem leakWenhui Sheng1-0/+4
invoke amdgpu_ring_fini for each sdma instance Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Wenhui Sheng <Wenhui.Sheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01drm/amdgpu: remove perf level dpm in one-VFWenhui Sheng1-1/+1
On Navi12 platform, node power_dpm_force_performance_level doesn't work correctly in one-VF mode with at least three smu messages not supported: SMU_MSG_SetSoftMaxByFreq SMU_MSG_SetSoftMinByFreq SMU_MSG_TransferTableDram2Smu Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Signed-off-by: Wenhui Sheng <Wenhui.Sheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01drm/amdgpu: add XGMI support for sienna cichlidJohn Clements3-0/+51
support for setting up XGMI FB address regions Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: John Clements <john.clements@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01drm/amdgpu: restrict the hw sched jobs number to power of twoKevin Wang2-2/+11
the module parameter sched_hw_submission is probably from user mode, and the kernel need to check whether it is legal. 1. align hw sched jobs to power of 2 and set minimum number is 2. 2. use kernel api is_power_of_2() to simplify driver code. Signed-off-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01drm/amd/display: Update bounding box states (v2)Alvin Lee1-41/+22
[Why] We need to update each p-state in the bounding box [How] Update states when assigning values to clocks v2: squash in patch to set min values (Alex) Signed-off-by: Alvin Lee <alvin.lee2@amd.com> Signed-off-by: Jerry (Fangzhi) Zuo <Jerry.Zuo@amd.com> Reviewed-by: Hersen Wu <hersenxs.wu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01drm/amdgpu: remove redundant initialization of variable retColin Ian King1-1/+1
The variable ret is being initialized with a value that is never read and it is being updated later with a new value. The initialization is redundant and can be removed. Addresses-Coverity: ("Unused value") Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01drm/amdgpu: remove unused functionsNirmoy Das2-11/+0
Remove unused amdgpu_xgmi_hive_try_lock() and smu7_reset_asic_tasks(). Signed-off-by: Nirmoy Das <nirmoy.das@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01drm/amdgpu/display: properly guard the calls to swSMU functionsAlex Deucher1-2/+2
It's only applicable on newer asics. We could end up here when using DC on older asics like SI or KV. Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1170 Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01drm/amdgpu/display bail early in dm_pp_get_static_clocksAlex Deucher1-0/+2
If there are no supported callbacks. We'll fall back to the nominal clocks. Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1170 Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01drm/amdgpu/vcn2.0: fix no previous prototype for functionsJames Zhu1-0/+1
Include header file vcn_v2_0.h Signed-off-by: James Zhu <James.Zhu@amd.com> Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01drm/amdgpu/vcn1.0: fix no previous prototype for functionsJames Zhu1-0/+1
Include header file vcn_v1_0.h Signed-off-by: James Zhu <James.Zhu@amd.com> Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01drm/amdgpu/pm: fix ref count leak when pm_runtime_get_sync failsAlex Deucher1-55/+165
The call to pm_runtime_get_sync increments the counter even in case of failure, leading to incorrect ref count. In case of failure, decrement the ref count before returning. Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01drm/amdgpu/debugfs: fix ref count leak when pm_runtime_get_sync failsAlex Deucher1-25/+70
The call to pm_runtime_get_sync increments the counter even in case of failure, leading to incorrect ref count. In case of failure, decrement the ref count before returning. Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01drm/amd/display: label internally used symbols as staticNirmoy Das4-26/+28
Used sparse(make C=1) to find these loose ends. Signed-off-by: Nirmoy Das <nirmoy.das@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01drm/powerplay: label internally used symbols as staticNirmoy Das12-22/+22
Used sparse(make C=1) to find these loose ends. Signed-off-by: Nirmoy Das <nirmoy.das@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01drm/amdkfd: label internally used symbols as staticNirmoy Das2-3/+3
Used sparse(make C=1) to find these loose ends. v2: removed unwanted extra line Signed-off-by: Nirmoy Das <nirmoy.das@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01drm/amdgpu: label internally used symbols as staticNirmoy Das9-14/+14
Used sparse(make C=1) to find these loose ends. v2: removed unwanted extra line Signed-off-by: Nirmoy Das <nirmoy.das@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01drm/amdgpu/jpeg2.0: fix no previous prototype for functionsJames Zhu1-0/+1
Include header file jpeg_v2_0.h. Signed-off-by: James Zhu <James.Zhu@amd.com> Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01drm/amdgpu/jpeg1.0: fix no previous prototype for functionsJames Zhu1-0/+1
Include header file jpeg_v1_0.h. Signed-off-by: James Zhu <James.Zhu@amd.com> Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01drm/amdkfd: fix ref count leak when pm_runtime_get_sync failsAlex Deucher1-1/+3
The call to pm_runtime_get_sync increments the counter even in case of failure, leading to incorrect ref count. In case of failure, decrement the ref count before returning. Reviewed-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01drm/amdgpu/fence: fix ref count leak when pm_runtime_get_sync failsAlex Deucher1-1/+3
The call to pm_runtime_get_sync increments the counter even in case of failure, leading to incorrect ref count. In case of failure, decrement the ref count before returning. Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Acked-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01drm/amdgpu/debugfs: fix memory leak when amdgpu_virt_enable_access_debugfs failedChen Tao1-1/+1
Fix memory leak in amdgpu_debugfs_gpr_read not freeing data when amdgpu_virt_enable_access_debugfs failed. Fixes: 95a2f917387a2 ("drm/amdgpu: restrict debugfs register access under SR-IOV") Signed-off-by: Chen Tao <chentao107@huawei.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01drm/amdgpu/debugfs: fix memory leak when pm_runtime_get_sync failedChen Tao1-3/+6
Fix memory leak in amdgpu_debugfs_gpr_read not freeing data when pm_runtime_get_sync failed. Fixes: a9ffe2a983383 ("drm/amdgpu/debugfs: properly handle runtime pm") Signed-off-by: Chen Tao <chentao107@huawei.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01drm/amdgpu: vcn_v2_5_mc_resume_dpg_mode() can be statickernel test robot1-3/+3
Fixes: c422a628925d ("drm/amdgpu: rename macro for VCN2.0 2.5 and 3.0") Signed-off-by: kernel test robot <lkp@intel.com> Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: James Zhu <James.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01drm/amdgpu: fix compiler warningNirmoy Das1-1/+1
Fixes below warning: drivers/gpu/drm/amd/amdgpu/df_v3_6.c: In function ‘df_v3_6_reset_perfmon_cntr’: drivers/gpu/drm/amd/amdgpu/df_v3_6.c:571:2: warning: ‘hi_base_addr’ may be used uninitialized in this function [-Wmaybe-uninitialized] 571 | df_v3_6_perfmon_wreg(adev, lo_base_addr, 0, hi_base_addr, 0); | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Signed-off-by: Nirmoy Das <nirmoy.das@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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