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2021-10-21soc: fsl: dpio: rename the enqueue descriptor variableYouri Querry1-4/+4
The struct qbman_eq_desc 'd' variable declaration is covering one of the function parameters. This has no functional impact since this function parameter was not used after the new declaration. Even so, rename the variable so that we make the code more readable. Fixes: 3b2abda7d28c ("soc: fsl: dpio: Replace QMAN array mode with ring mode enqueue") Signed-off-by: Youri Querry <youri.querry_1@nxp.com> Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
2021-10-21soc: fsl: dpio: use an explicit NULL instead of 0Ioana Ciornei1-1/+1
Use an explicit NULL pointer when calling qbman_swp_enqueue_multiple() instead of a plain integer. Without this fix, we get the following compile time error. drivers/soc/fsl/dpio/dpio-service.c:466:60: warning: Using plain integer as NULL pointer Fixes: 9d98809711ae ("soc: fsl: dpio: Adding QMAN multiple enqueue interface") Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
2021-10-21soc: fsl: rcpm: Make use of the helper function devm_platform_ioremap_resource()Cai Huoqing1-6/+1
Use the devm_platform_ioremap_resource() helper instead of calling platform_get_resource() and devm_ioremap_resource() separately Signed-off-by: Cai Huoqing <caihuoqing@baidu.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
2021-10-21soc: fsl: guts: Make use of the helper function devm_platform_ioremap_resource()Cai Huoqing1-3/+1
Use the devm_platform_ioremap_resource() helper instead of calling platform_get_resource() and devm_ioremap_resource() separately Signed-off-by: Cai Huoqing <caihuoqing@baidu.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
2021-10-21optee: smc_abi.c: add missing #include <linux/mm.h>Jens Wiklander1-0/+1
Adds missing #include <linux/mm.h> drivers/tee/optee/smc_abi.c to fix compile errors like: drivers/tee/optee/smc_abi.c:405:15: error: implicit declaration of function 'page_to_section' [-Werror,-Wimplicit-function-declaration] optee_page = page_to_phys(*pages) + ^ arch/arm/include/asm/memory.h:148:43: note: expanded from macro 'page_to_phys' ^ include/asm-generic/memory_model.h:52:21: note: expanded from macro 'page_to_pfn' ^ include/asm-generic/memory_model.h:35:14: note: expanded from macro '__page_to_pfn' int __sec = page_to_section(__pg); \ ^ drivers/tee/optee/smc_abi.c:405:15: note: did you mean '__nr_to_section'? arch/arm/include/asm/memory.h:148:43: note: expanded from macro 'page_to_phys' ^ include/asm-generic/memory_model.h:52:21: note: expanded from macro 'page_to_pfn' ^ include/asm-generic/memory_model.h:35:14: note: expanded from macro '__page_to_pfn' int __sec = page_to_section(__pg); \ ^ include/linux/mmzone.h:1365:35: note: '__nr_to_section' declared here static inline struct mem_section *__nr_to_section(unsigned long nr) Fixes: c51a564a5b48 ("optee: isolate smc abi") Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Link: https://lore.kernel.org/r/20211021125539.3858495-1-jens.wiklander@linaro.org' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-21memory: tegra20-emc: Add runtime dependency on devfreq governor moduleDmitry Osipenko1-0/+1
Tegra20 EMC driver uses simple devfreq governor. Add simple devfreq governor to the list of the Tegra20 EMC driver module softdeps to allow userspace initramfs tools like dracut to automatically pull the devfreq module into ramfs image together with the EMC module. Reported-by: Nicolas Chauvet <kwizart@gmail.com> Suggested-by: Nicolas Chauvet <kwizart@gmail.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Link: https://lore.kernel.org/r/20211019231524.888-1-digetx@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-10-20ep93xx: clock: convert in-place to COMMON_CLKNikita Shubin4-440/+581
Converted in-place without moving file to drivers/clk. tested on ts7250 (EP9302). Only setting rate and change parent tested for, as they are missing on ts7250: - video - I2S - ADC/KEYPAD - PWM Only video and I2S clock are interesting, as they are GATE + double DIV + MUX, all other are pretty much common but require ep93xx_syscon_swlocked_write to set registers. Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me> Signed-off-by: Alexander Sverdlin <alexander.sverdlin@gmail.com> Tested-by: Alexander Sverdlin <alexander.sverdlin@gmail.com> Acked-by: Alexander Sverdlin <alexander.sverdlin@gmail.com> Link: https://lore.kernel.org/r/20211018103105.146380-3-alexander.sverdlin@gmail.com' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-20ASoC: cirrus: i2s: Prepare clock before using itAlexander Sverdlin1-6/+6
Use clk_prepare_enable()/clk_disable_unprepare() in preparation for switch to Common Clock Framework, otherwise the following is visible: WARNING: CPU: 0 PID: 97 at drivers/clk/clk.c:1011 clk_core_enable+0x9c/0xbc Enabling unprepared mclk ... Hardware name: Cirrus Logic EDB9302 Evaluation Board ... clk_core_enable clk_core_enable_lock ep93xx_i2s_hw_params snd_soc_dai_hw_params soc_pcm_hw_params snd_pcm_hw_params snd_pcm_ioctl ... Signed-off-by: Alexander Sverdlin <alexander.sverdlin@gmail.com> Acked-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20211018103105.146380-2-alexander.sverdlin@gmail.com' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-18reset: mchp: sparx5: Extend support for lan966xHoratiu Vultur2-9/+33
This patch extends sparx5 driver to support also the lan966x. The process to reset the switch is the same only it has different offsets. Therefore make the driver more generic and add support for lan966x. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Steen Hegelund <steen.hegelund@microchip.com> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Link: https://lore.kernel.org/r/20211018091522.1113510-3-horatiu.vultur@microchip.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2021-10-18dt-bindings: reset: Add lan966x supportHoratiu Vultur1-1/+3
This patch extends the existing file microchip,rst.yaml to support also the lan966x. For this is added only a new compatible string. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Link: https://lore.kernel.org/r/20211018091522.1113510-2-horatiu.vultur@microchip.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2021-10-18optee: add FF-A supportJens Wiklander7-13/+1143
Adds support for using FF-A [1] as transport to the OP-TEE driver. Introduces struct optee_msg_param_fmem which carries all information needed when OP-TEE is calling FFA_MEM_RETRIEVE_REQ to get the shared memory reference mapped by the hypervisor in S-EL2. Register usage is also updated to include the information needed. The FF-A part of this driver is enabled if CONFIG_ARM_FFA_TRANSPORT is enabled. [1] https://developer.arm.com/documentation/den0077/latest Acked-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
2021-10-18optee: isolate smc abiJens Wiklander8-1388/+1506
Isolate the ABI based on raw SMCs. Code specific to the raw SMC ABI is moved into smc_abi.c. This makes room for other ABIs with a clear separation. The driver changes to use module_init()/module_exit() instead of module_platform_driver(). The platform_driver_register() and platform_driver_unregister() functions called directly to keep the same behavior. This is needed because module_platform_driver() is based on module_driver() which can only be used once in a module. A function optee_rpc_cmd() is factored out from the function handle_rpc_func_cmd() to handle the ABI independent part of RPC processing. This patch is not supposed to change the driver behavior, it's only a matter of reorganizing the code. Reviewed-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
2021-10-15optee: refactor driver with internal callbacksJens Wiklander4-106/+182
The OP-TEE driver is refactored with three internal callbacks replacing direct calls to optee_from_msg_param(), optee_to_msg_param() and optee_do_call_with_arg(). These functions a central to communicating with OP-TEE in secure world by using the SMC Calling Convention directly. This refactoring makes room for using other primitives to communicate with OP-TEE in secure world while being able to reuse as much as possible from the present driver. Reviewed-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
2021-10-15optee: simplify optee_release()Jens Wiklander3-49/+39
Simplifies optee_release() with a new helper function, optee_close_session_helper() which has been factored out from optee_close_session(). A separate optee_release_supp() is added for the supplicant device. Reviewed-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
2021-10-15tee: add sec_world_id to struct tee_shmJens Wiklander1-1/+6
Adds sec_world_id to struct tee_shm which describes a shared memory object. sec_world_id can be used by a driver to store an id assigned by secure world. Reviewed-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
2021-10-15memory: tegra20-emc: Support matching timings by LPDDR2 configurationDmitry Osipenko2-14/+186
ASUS Transformer TF101 doesn't provide RAM code and in this case memory timings should be selected based on identity information read out from SDRAM chip. Support matching timings by LPDDR2 configuration. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Link: https://lore.kernel.org/r/20211006224659.21434-10-digetx@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-10-15memory: Add LPDDR2-info helpersDmitry Osipenko4-0/+184
Add common helpers for reading and parsing standard LPDDR2 configuration properties. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Link: https://lore.kernel.org/r/20211006224659.21434-9-digetx@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-10-15dt-bindings: memory: tegra20: emc: Document new LPDDR2 sub-nodeDmitry Osipenko1-2/+21
Some Tegra20 boards don't have RAM code stored in NVMEM, which is used for the memory chip identification and the identity information should be read out from LPDDR2 chip in this case. Document new sub-node containing generic LPDDR2 properties that will be used for the memory chip identification if RAM code isn't available. The identification is done by reading out memory configuration values from generic LPDDR2 mode registers of SDRAM chip and comparing them with the values of device-tree 'lpddr2' sub-node. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211006224659.21434-8-digetx@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-10-15dt-bindings: Add vendor prefix for Elpida MemoryDmitry Osipenko1-0/+2
Elpida Memory designed, manufactured and sold dynamic random-access memory (DRAM) products. It was acquired by Micron Technology in 2013, still there are many devices with components from Elpida. Document the vendor prefix. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211006224659.21434-6-digetx@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-10-15dt-bindings: memory: lpddr2: Document Elpida B8132B2PB-6D-FDmitry Osipenko1-0/+1
Elpida B8132B2PB-6D-F memory chip is used by ASUS Transformer TF101 tablet, add compatible for it. We need to specify this compatible it for a device-tree node containing corresponding memory timings in order to allow software to match the timings with the detected hardware. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211006224659.21434-5-digetx@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-10-15dt-bindings: memory: lpddr2: Add revision-id propertiesDmitry Osipenko1-0/+14
Add optional revision-id standard LPDDR2 properties which will help to identify memory chip. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211006224659.21434-4-digetx@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-10-15dt-bindings: memory: lpddr2: Convert to schemaDmitry Osipenko2-102/+208
Convert LPDDR2 binding to schema. I removed obsolete ti,jedec-lpddr2-* compatibles since they were never used by device-trees and by the code. I also changed "Elpida" compatible prefix to lowercase "elpida". Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211006224659.21434-3-digetx@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-10-15dt-bindings: Relocate DDR bindingsDmitry Osipenko5-3/+5
Move DDR bindings to memory-controllers directory to make them more discoverable. Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211006224659.21434-2-digetx@gmail.com [krzysztof: Correct path in lpddr3.txt and samsung,exynos5422-dmc.yaml] Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-10-15soc: imx: imx8m-blk-ctrl: off by one in imx8m_blk_ctrl_xlate()Dan Carpenter1-1/+1
The > comparison should be >= to prevent reading one element beyond the end of the array. The onecell_data->domains[] array is allocated in imx8m_blk_ctrl_probe() and it has "onecell_data->num_domains" elements. Fixes: 5b340e7813d4 ("soc: imx: add i.MX8M blk-ctrl driver") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-13bus: sun50i-de2: Adjust printing error messageJernej Skrabec1-4/+3
SRAM driver often returns -EPROBE_DEFER and thus this bus driver often prints error message, even if it probes successfully later. This is confusing for users and they often think that something is wrong. Use dev_err_probe() helper for printing error message. It handles -EPROBE_DEFER automatically. Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20211010071812.145178-1-jernej.skrabec@gmail.com
2021-10-12tee: optee: Fix missing devices unregister during optee_removeSumit Garg3-0/+26
When OP-TEE driver is built as a module, OP-TEE client devices registered on TEE bus during probe should be unregistered during optee_remove. So implement optee_unregister_devices() accordingly. Fixes: c3fa24af9244 ("tee: optee: add TEE bus device enumeration support") Reported-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
2021-10-08soc/tegra: pmc: Use devm_platform_ioremap_resource()Cai Huoqing1-2/+1
Use the devm_platform_ioremap_resource() helper instead of calling platform_get_resource() and devm_ioremap_resource() separately. Signed-off-by: Cai Huoqing <caihuoqing@baidu.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-10-08soc/tegra: Add Tegra186 ARI driverMikko Perttunen2-0/+81
Add a driver to hook into panic notifiers and print machine check status for debugging. Status information is retrieved via SMC. This is supported by upstream ARM Trusted Firmware. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-10-08drm/mediatek: mtk_dsi: Reset the dsi0 hardwareEnric Balletbo i Serra1-1/+4
Reset dsi0 HW to default when power on. This prevents to have different settingis between the bootloader and the kernel. As not all Mediatek boards have the reset consumer configured in their board description, also is not needed on all of them, the reset is optional, so the change is compatible with all boards. Cc: Jitao Shi <jitao.shi@mediatek.com> Suggested-by: Chun-Kuang Hu <chunkuang.hu@kernel.org> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Acked-by: Chun-Kuang Hu <chunkuang.hu@kernel.org> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Link: https://lore.kernel.org/r/20210930103105.v4.7.Idbb4727ddf00ba2fe796b630906baff10d994d89@changeid Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-10-08soc: mediatek: mmsys: Add reset controller supportEnric Balletbo i Serra2-0/+70
Among other features the mmsys driver should implement a reset controller to be able to reset different bits from their space. Cc: Jitao Shi <jitao.shi@mediatek.com> Suggested-by: Chun-Kuang Hu <chunkuang.hu@kernel.org> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Link: https://lore.kernel.org/r/20210930103105.v4.6.I15e2419141a69b2e5c7e700c34d92a69df47e04d@changeid Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-10-08soc: mediatek: add mtk mutex support for MT8192Yongqiang Niu1-0/+35
Add mtk mutex support for MT8192 SoC. Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> Reviewed-by: CK Hu <ck.hu@mediatek.com> Link: https://lore.kernel.org/r/20210930155222.5861-5-yongqiang.niu@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-10-07firmware: tegra: bpmp: Use devm_platform_ioremap_resource()Cai Huoqing1-5/+2
Use the devm_platform_ioremap_resource() helper instead of calling platform_get_resource() and devm_ioremap_resource() separately. Signed-off-by: Cai Huoqing <caihuoqing@baidu.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-10-07firmware: tegra: Reduce stack usageArnd Bergmann1-9/+17
Building the bpmp-debugfs driver for Arm results in a warning for stack usage: drivers/firmware/tegra/bpmp-debugfs.c:321:16: error: stack frame size of 1224 bytes in function 'bpmp_debug_store' [-Werror,-Wframe-larger-than=] static ssize_t bpmp_debug_store(struct file *file, const char __user *buf, It should be possible to rearrange the code to not require two separate buffers for the file name, but the easiest workaround is to use dynamic allocation. Fixes: 5e37b9c137ee ("firmware: tegra: Add support for in-band debug") Link: https://lore.kernel.org/all/20201204193714.3134651-1-arnd@kernel.org/ Signed-off-by: Arnd Bergmann <arnd@arndb.de> [treding@nvidia.com: consistently return NULL on failure] Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-10-07memory: fsl_ifc: fix leak of irq and nand_irq in fsl_ifc_ctrl_probeDongliang Mu1-7/+6
The error handling code of fsl_ifc_ctrl_probe is problematic. When fsl_ifc_ctrl_init fails or request_irq of fsl_ifc_ctrl_dev->irq fails, it forgets to free the irq and nand_irq. Meanwhile, if request_irq of fsl_ifc_ctrl_dev->nand_irq fails, it will still free nand_irq even if the request_irq is not successful. Fix this by refactoring the error handling code. Fixes: d2ae2e20fbdd ("driver/memory:Move Freescale IFC driver to a common driver") Signed-off-by: Dongliang Mu <mudongliangabcd@gmail.com> Link: https://lore.kernel.org/r/20210925151434.8170-1-mudongliangabcd@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-10-07memory: tegra210-emc: replace DEFINE_SIMPLE_ATTRIBUTE withKai Song1-1/+1
fix debugfs_simple_attr.cocci warning: drivers/memory/tegra/tegra210-emc-core.c:1665:0-23: WARNING:tegra210_emc_debug_min_rate_fops should be defined with DEFINE_DEBUGFS_ATTRIBUTE Commit 6fc5f1adf5a1 ("memory: tegra210-emc: replace DEFINE_SIMPLE_ATTRIBUTE with DEFINE_DEBUGFS_ATTRIBUTE") fixed the same warning, but didn't fix all matches in this file at once. Signed-off-by: Kai Song <songkai01@inspur.com> Acked-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20211005043514.9650-1-songkai01@inspur.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-10-07memory: renesas-rpc-if: RENESAS_RPCIF should select RESET_CONTROLLERGeert Uytterhoeven1-0/+1
The Renesas RPC-IF driver calls devm_reset_control_get_exclusive(), which returns -ENOTSUPP if CONFIG_RESET_CONTROLLER is not enabled. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/e443aa66d146da5646b7ebece8876545b8621063.1633447756.git.geert+renesas@glider.be Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-10-07memory: tegra186-emc: Fix error return code in tegra186_emc_probe()Yang Yingliang1-0/+1
Return the error code when command fails. Fixes: 13324edbe926 ("memory: tegra186-emc: Handle errors in BPMP response") Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com> Link: https://lore.kernel.org/r/20210928021545.3774677-1-yangyingliang@huawei.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-10-07soc/tegra: Fix an error handling path in tegra_powergate_power_up()Christophe JAILLET1-1/+1
If an error occurs after a successful tegra_powergate_enable_clocks() call, it must be undone by a tegra_powergate_disable_clocks() call, as already done in the below and above error handling paths of this function. Update the 'goto' to branch at the correct place of the error handling path. Fixes: a38045121bf4 ("soc/tegra: pmc: Add generic PM domain support") Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Reviewed-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-10-06soc: imx: imx8m-blk-ctrl: add DISP blk-ctrlLucas Stach1-0/+70
This adds the description for the i.MX8MM disp blk-ctrl. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-06soc: imx: add i.MX8M blk-ctrl driverLucas Stach2-0/+454
This adds a driver for the blk-ctrl blocks found in the i.MX8M* line of SoCs. The blk-ctrl is a top-level peripheral located in the various *MIX power domains and interacts with the GPC power controller to provide the peripherals in the power domain access to the NoC and ensures that those peripherals are properly reset when their respective power domain is brought back to life. Software needs to do different things to make the bus handshake happen after the GPC *MIX domain is powered up and before it is powered down. As the requirements are quite different between the various blk-ctrls there is a callback function provided to hook in the proper sequence. The peripheral domains are quite uniform, they handle the soft clock enables and resets in the blk-ctrl address space and sequencing with the upstream GPC power domains. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Acked-by: Frieder Schrempf <frieder.schrempf@kontron.de> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-06soc: imx: gpcv2: support system suspend/resumeLucas Stach1-0/+31
Our usage of runtime PM to control the hierarchy of power domains is slightly unusual and means that powering up a domain may fail in early system resume, as runtime PM is still disallowed at this stage. However the system suspend/resume path takes care of powering down/up the power domains in the order defined by the device parent/child and power-domain provider/consumer hierarachy. So we can just runtime resume all our power-domain devices to allow the power-up to work properly in the resume path. System suspend will still disable all domains as intended. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Acked-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-06soc: imx: gpcv2: keep i.MX8M* bus clocks enabledLucas Stach1-0/+6
Annotate the domains with bus clocks to keep those clocks enabled as long as the domain is active. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-06soc: imx: gpcv2: add domain option to keep domain clocks enabledLucas Stach1-5/+9
Some of the MIX domains are using clocks to drive the bus bridges. Those must be enabled at all times, as long as the domain is powered up and they don't have any other consumer than the power domain. Add an option to keep the clocks attached to a domain enabled as long as the domain is power up and only disable them after the domain is powered down. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-06soc: imx: gpcv2: add lockdep annotationLucas Stach1-0/+4
Some of the GPCv2 power domains are nested inside each other without visibility to lockdep at the genpd level, as they are in separate driver instances and don't have a parent/child power-domain relationship. Add a subclass annotation to the nested domains to let lockdep know that it is okay to take the genpd lock in a nested fashion. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-06bus: ti-sysc: Fix variable set but not used warning for reinit_modulesTony Lindgren1-2/+1
Fix drivers/bus/ti-sysc.c:2494:13: error: variable 'error' set but not used introduced by commit 9d881361206e ("bus: ti-sysc: Add quirk handling for reinit on context lost"). Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-10-05cpuidle: tegra: Check whether PMC is readyDmitry Osipenko1-0/+3
Check whether PMC is ready before proceeding with the cpuidle registration. This fixes racing with the PMC driver probe order, which results in a disabled deepest CC6 idling state if cpuidle driver is probed before the PMC. Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-10-05cpuidle: tegra: Enable compile testingDmitry Osipenko1-1/+1
Enable compile testing of tegra-cpuidle driver. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-10-05clk: tegra: Add stubs needed for compile testingThierry Reding1-1/+23
These stubs are needed to allow the tegra-cpuidle driver to be compile-tested. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-10-05reset: uniphier: Add NX1 reset supportKunihiko Hayashi2-0/+29
Add basic reset data for UniPhier NX1 SoC. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Link: https://lore.kernel.org/r/1633399842-1402-4-git-send-email-hayashi.kunihiko@socionext.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2021-10-05dt-bindings: reset: uniphier: Add NX1 reset control bindingKunihiko Hayashi2-0/+4
Update reset controller binding document for UniPhier NX1 SoC. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Link: https://lore.kernel.org/r/1633399842-1402-3-git-send-email-hayashi.kunihiko@socionext.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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