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2020-05-30mailbox: Add support for Qualcomm IPCCManivannan Sadhasivam3-0/+298
Add support for the Inter-Processor Communication Controller (IPCC) block from Qualcomm that coordinates the interrupts (inbound & outbound) for Multiprocessor (MPROC), COMPUTE-Level0 (COMPUTE-L0) & COMPUTE-Level1 (COMPUTE-L1) protocols for the Application Processor Subsystem (APSS). This driver is modeled as an irqchip+mailbox driver. The irqchip part helps in receiving the interrupts from the IPCC clients such as modems, DSPs, PCI-E etc... and forwards them to respective entities in APSS. On the other hand, the mailbox part is used to send interrupts to the IPCC clients from the entities of APSS. Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Raghavendra Rao Ananta <rananta@codeaurora.org> Signed-off-by: Venkata Narendra Kumar Gutta <vnkgutta@codeaurora.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> [mani: moved to mailbox, added static mbox channels and cleanups] Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2020-05-30dt-bindings: mailbox: Add devicetree binding for Qcom IPCCManivannan Sadhasivam2-0/+113
Add devicetree YAML binding for Qualcomm Inter-Processor Communication Controller (IPCC) block. Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2020-05-30mailbox: zynqmp-ipi: Fix NULL vs IS_ERR() check in zynqmp_ipi_mbox_probe()Wei Yongjun1-12/+8
In case of error, the function devm_ioremap() returns NULL pointer not ERR_PTR(). So we should check whether the return value of devm_ioremap() is NULL instead of IS_ERR. Fixes: 4981b82ba2ff ("mailbox: ZynqMP IPI mailbox controller") Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2020-05-30mailbox: imx-mailbox: fix scu msg header size checkPeng Fan1-5/+9
The i.MX8 SCU message header size is the number of "u32" elements, not "u8", so fix the check. Reported-by: coverity-bot <keescook+coverity-bot@chromium.org> Addresses-Coverity-ID: 1461658 ("Memory - corruptions") Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com> Acked-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2020-05-30mailbox: sprd: Add Spreadtrum mailbox driverBaolin Wang3-0/+371
The Spreadtrum mailbox controller supports 8 channels to communicate with MCUs, and it contains 2 different parts: inbox and outbox, which are used to send and receive messages by IRQ mode. Signed-off-by: Baolin Wang <baolin.wang@unisoc.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>