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2022-03-12mailbox: ti-msgmgr: Refactor message read during interrupt handlerDave Gerlach1-39/+49
Refactor the portion of code that actually reads received messages from a queue into its own function, ti_msgmgr_queue_rx_data, that is called by the interrupt handler instead of reading directly from the handler. Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-03-12mailbox: imx: support i.MX93 S401 MUPeng Fan1-0/+12
Add i.MX93 S401 MU cfg Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-03-12mailbox: imx: support dual interruptsPeng Fan1-15/+30
i.MX93 S401 MU support two interrupts: tx empty and rx full. - Introduce a new flag IMX_MU_V2_IRQ for the dual interrupt case - Update Copyright Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-03-12mailbox: imx: extend irq to an arrayPeng Fan1-7/+7
To i.MX93 S401 MU, there are two interrupts: rx full and tx empty. So extend irq to an array to prepare i.MX93 S401 MU support. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-03-12dt-bindings: mailbox: imx-mu: add i.MX93 S4 MU supportPeng Fan1-1/+30
Similar to i.MX8ULP S4 MU, i.MX93 MU is dedicated for communication between Sentinel and Cortex-A cores from hardware design, it could not be reused for other purpose. However i.MX93 S4 MU use separate tx/rx interrupt, so update interrupts and add interrupt-names property. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-03-12dt-bindings: mailbox: imx-mu: add i.MX93 MUPeng Fan1-0/+3
Add bindings for i.MX93 MU which derived from i.MX8ULP Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-03-12mailbox: imx: add i.MX8 SECO MU supportFranck LENORMAND1-1/+212
i.MX8/8X SECO firmware IPC is an implementation of passing messages. But current imx-mailbox driver only support one word message, i.MX8/8X linux side firmware has to request four TX, four RX and a TXDB to support IPC to SECO firmware. This is low efficent and more interrupts triggered compared with one TX and one RX. To make SECO MU work, - parse the size of msg. - Only enable TR0/RR0 interrupt for transmit/receive message. - For TX/RX, only support one TX channel and one RX channel - For RX, support receive msg of any size, limited by hardcoded value of 30. Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-03-12mailbox: imx: introduce rxdb callbackPeng Fan1-3/+17
Add a rxdb callback to prepare for i.MX8 SECO MU rxdb which has a different logic. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-03-12dt-bindings: mailbox: imx-mu: add i.MX8 SECO MU supportPeng Fan1-0/+1
Similar to i.MX8QM/QXP SCU, i.MX8 SECO MU is dedicated for communication between SECO and Cortex-A cores from hardware design, it could not be reused for other purpose. To use SECO MU more effectivly, add "fsl,imx8-mu-seco" compatile to support fast IPC. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-03-12mailbox: imx: enlarge timeout while reading/writing messages to SCFWRanjani Vaidyanathan1-2/+3
Mailbox driver needs to wait and read all the words in response to a SCFW API call, else the protocol gets messed up and results in kernel hang. When the responses are longer than 3 words its possible that SCFW will take some time to fill up the rest of the words in the MU, a timeout of 100us is arbritrary and too short. While waiting for Linux to consume the first 3 words of the response SCFW can be busy doing other stuff and hence Linux needs to wait for the rest of the words. Similar restriction applies when writing messages that are longer than 3 words. This patch increases the timeout to 5secs while waiting for response or writing long messages to SCFW. Signed-off-by: Ranjani Vaidyanathan <ranjani.vaidyanathan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-03-12mailbox: imx: fix crash in resume on i.mx8ulpRobin Gong1-1/+1
check 'priv->clk' before 'imx_mu_read()' otherwise crash happens on i.mx8ulp, since clock not enabled. Fixes: 4f0b776ef5831 ("mailbox: imx-mailbox: support i.MX8ULP MU") Reviewed-by: Jacky Bai <ping.bai@nxp.com> Signed-off-by: Robin Gong <yibin.gong@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-03-12mailbox: imx: fix wakeup failure from freeze modeRobin Gong1-0/+9
Since IRQF_NO_SUSPEND used for imx mailbox driver, that means this irq can't be used for wakeup source so that can't wakeup from freeze mode. Add pm_system_wakeup() to wakeup from freeze mode. Fixes: b7b2796b9b31e("mailbox: imx: ONLY IPC MU needs IRQF_NO_SUSPEND flag") Reviewed-by: Jacky Bai <ping.bai@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Robin Gong <yibin.gong@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-03-12mailbox: mediatek: add support for adsp mailbox controllerAllen-KH Cheng3-0/+187
This patch is to for MediaTek ADSP IPC mailbox controller driver It is used to send short messages between processors with adsp Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> Reviewed-by: Tzung-Bi Shih <tzungbi@google.com> Reviewed-by: YC Hung <yc.hung@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>