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2015-08-21ARM: tegra: Add entries for cpufreq on Tegra124Tuomas Tynkkynen1-0/+9
2015-08-21ARM: tegra: Enable the DFLL on the Jetson TK1Tuomas Tynkkynen1-1/+8
2015-08-21ARM: tegra: Add the DFLL to Tegra124 device treeTuomas Tynkkynen1-0/+25
2015-08-13pinctrl: tegra: Only set the gpio range if neededTomeu Vizoso1-1/+18
2015-07-16clk: tegra: Add the DFLL as a possible parent of the cclk_g clockTuomas Tynkkynen1-1/+3
2015-07-16clk: tegra: Save/restore CCLKG_BURST_POLICY on suspendTuomas Tynkkynen1-0/+14
2015-07-16clk: tegra: Add Tegra124 DFLL clocksource platform driverTuomas Tynkkynen4-4/+172
2015-07-16clk: tegra: Add DFLL DVCO reset control for Tegra124Paul Walmsley2-0/+80
2015-07-16clk: tegra: Introduce ability for SoC-specific reset control callbacksMikko Perttunen2-8/+34
2015-07-16clk: tegra: Add functions for parsing CVB tablesTuomas Tynkkynen3-0/+208
2015-07-16clk: tegra: Add closed loop support for the DFLLTuomas Tynkkynen1-3/+663
2015-07-16clk: tegra: Add library for the DFLL clock source (open-loop mode)Tuomas Tynkkynen3-0/+1150