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2017-06-14drm/i915: expose _SLICE_MASK GETPARMRobert Bragg2-0/+8
2017-06-14drm/i915: Reinstate reservation_object zapping for batch_pool objectsChris Wilson1-2/+17
2017-06-14drm/i915: Spin for struct_mutex inside shrinkerChris Wilson1-7/+12
2017-06-14drm/i915: Only restrict noreclaim in the early shrink passesChris Wilson1-2/+1
2017-06-14drm/i915: Remove __GFP_NORETRY from our buffer allocatorChris Wilson1-1/+14
2017-06-14drm/i915: Encourage our shrinker more when our shmemfs allocations failsChris Wilson1-21/+29
2017-06-12drm/i915/cfl: Basic DDI plumbing for Coffee Lake.Rodrigo Vivi2-6/+9
2017-06-12drm/i915/cnl: Enable wrpll computation for CNLKahola, Mika1-2/+138
2017-06-12drm/i915/cnl: LSPCON support is gen9+Rodrigo Vivi1-1/+1
2017-06-12drm/i915/cnl: Enable fifo underrun for Cannonlake.Rodrigo Vivi1-1/+1
2017-06-12drm/i915/cnl: Fix Cannonlake scaler mode programing.Rodrigo Vivi1-1/+1
2017-06-12drm/i915: Use HAS_CSR instead of gen number on DMC load.Rodrigo Vivi1-1/+1
2017-06-12drm/i915/DMC/CNL: Load DMC on CNLAnusha Srivatsa2-2/+10
2017-06-12drm/i915/cnl: Enable loadgen_select bit for vswing sequenceClint Taylor1-6/+32
2017-06-12drm/i915/cnl: Implement voltage swing sequence.Rodrigo Vivi3-2/+177
2017-06-12drm/i915/cnl: Add DDI Buffer translation tables for Cannonlake.Rodrigo Vivi1-0/+140
2017-06-12drm/i915/cnl: Add registers related to voltage swing sequences.Rodrigo Vivi1-0/+140
2017-06-12drm/i915: Add MMIO helper for 6 ports with different offsets.Rodrigo Vivi1-0/+3
2017-06-12drm/i915/cnl: Initialize PLLsRodrigo Vivi3-2/+350
2017-06-12drm/i915: Configure DPLL's for CannonlakeKahola, Mika1-1/+19
2017-06-12drm/i915/cnl: DDI - PLL mappingRodrigo Vivi2-3/+29
2017-06-12drm/i915/cnl: Allow dynamic cdclk changes on CNLRodrigo Vivi1-4/+56
2017-06-12drm/i915/cnl: Implement CNL display init/unit sequenceVille Syrjälä4-3/+243
2017-06-12drm/i915/cnl: Implement .set_cdclk() for CNLVille Syrjälä1-0/+106
2017-06-12drm/i915/cnl: Implement .get_display_clock_speed() for CNLVille Syrjälä2-1/+60
2017-06-12drm/i915: Pass atomic state to backlight enable/disable/set callbacks.Maarten Lankhorst4-96/+115
2017-06-12drm/i915: Pass connector state to intel_panel_set_backlight_acpiMaarten Lankhorst3-6/+6
2017-06-12drm/i915: Pass crtc_state and connector state to backlight enable/disable functionsMaarten Lankhorst6-35/+32
2017-06-12drm/i915: Fix GVT-g PVINFO version compatibility checkZhenyu Wang2-12/+6
2017-06-09drm/i915/cfl: Coffee Lake reuses Kabylake DMC.Rodrigo Vivi2-2/+3
2017-06-09drm/i915/huc: Load HuC on Coffee LakeAnusha Srivatsa1-1/+1
2017-06-09drm/i915/guc: Load GuC on Coffee LakeAnusha Srivatsa2-1/+2
2017-06-09drm/i915/cfl: Add Coffee Lake PCI IDs for U Sku.Anusha Srivatsa2-0/+8
2017-06-09drm/i915/cfl: Add Coffee Lake PCI IDs for H Sku.Anusha Srivatsa2-0/+6
2017-06-09drm/i915/cfl: Add Coffee Lake PCI IDs for S Skus.Anusha Srivatsa2-0/+9
2017-06-09drm/i915/glk: Remove the alpha_support flagAnder Conselvan de Oliveira1-1/+0
2017-06-08drm/i915/cfl: Introduce Display workarounds for Coffee Lake.Rodrigo Vivi1-10/+11
2017-06-08drm/i915/cfl: Coffee Lake uses CNP PCH.Rodrigo Vivi1-3/+6
2017-06-08drm/i915/cfl: Introduce Coffee Lake platform definition.Rodrigo Vivi3-0/+19
2017-06-08drm/i915: Remove the spin-request during execbuf await_requestChris Wilson1-12/+6
2017-06-08drm/i915: Skip adding the request to the signal tree is completeChris Wilson1-21/+28
2017-06-08drm/i915: Report back whether the irq was armed when adding the waiterChris Wilson1-9/+15
2017-06-08drm/i915: Check signaled state after enabling signalingChris Wilson1-1/+1
2017-06-08drm/i915/guc: Clear enable_guc_loading in case of init failureMichel Thierry1-2/+5
2017-06-08drm/i915: Move the unclaimed mmio detection into the powerwell for KMSChris Wilson1-14/+9
2017-06-07drm/i915: Unify GT* and GT3 definitionsRodrigo Vivi1-30/+27
2017-06-07drm/i915: Remove unnecessary PORT3 definition.Rodrigo Vivi1-4/+2
2017-06-07drm/i915/cnl: Also need power well sanitize.Rodrigo Vivi1-2/+1
2017-06-07drm/i915/cnl: Add power wells for CNLVille Syrjälä2-4/+137
2017-06-07drm/i915/gen10: Set value of Indirect Context Offset for gen10Michel Thierry1-0/+5
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