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2021-06-17hw_random: ixp4xx: Add OF supportLinus Walleij1-0/+10
This makes the hardware random number generator found in the IXP46x SoCs probe from the device tree. Cc: Deepak Saxena <dsaxena@plexity.net> Acked-by: Herbert Xu <herbert@gondor.apana.org.au> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-06-17hw_random: ixp4xx: Add DT bindingsLinus Walleij2-0/+37
This adds device tree bindings for the simple random number generator found in the IXP46x SoCs. Cc: Deepak Saxena <dsaxena@plexity.net> Cc: devicetree@vger.kernel.org Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-06-17hw_random: ixp4xx: Turn into a moduleLinus Walleij2-21/+40
Instead of just initializing always, which will invariably create problems on multiplatform builds, turn this driver into a module and pass a resource with the memory location. The device only exist on the IXP46x so we only register the device for the IXP46x SoC. Cc: Deepak Saxena <dsaxena@plexity.net> Acked-by: Herbert Xu <herbert@gondor.apana.org.au> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-06-17hw_random: ixp4xx: Use SPDX license tagLinus Walleij1-4/+1
This switches the IXP4xx hardware random driver to use the SPDX type license tag. Cc: Deepak Saxena <dsaxena@plexity.net> Acked-by: Herbert Xu <herbert@gondor.apana.org.au> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-06-17hw_random: ixp4xx: enable compile-testingArnd Bergmann2-3/+2
The driver is almost portable already, it just needs to include the new header for the cpu definition. Cc: Deepak Saxena <dsaxena@plexity.net> Acked-by: Herbert Xu <herbert@gondor.apana.org.au> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-06-17pata: ixp4xx: split platform data to its own headerArnd Bergmann5-16/+24
Portable drivers cannot use mach/platform.h, so move the structure into its own header. With this, compile testing can be enabled. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-06-17soc: ixp4xx: move cpu detection to linux/soc/ixp4xx/cpu.hArnd Bergmann11-113/+138
Generic drivers are unable to use the feature macros from mach/cpu.h or the feature bits from mach/hardware.h, so move these into a global header file along with some dummy helpers that list these features as disabled elsewhere. Cc: David S. Miller <davem@davemloft.net> Cc: Jakub Kicinski <kuba@kernel.org> Cc: netdev@vger.kernel.org Cc: Zoltan HERPAI <wigyori@uid0.hu> Cc: Raylynn Knight <rayknight@me.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-06-17PCI: ixp4xx: Add a new driver for IXP4xxLinus Walleij4-0/+686
This adds a new PCI controller driver for the Intel IXP4xx (IX425, IXP435 etc), based on the XScale microarchitecture. This replaces the old driver in arch/arm/mach-ixp4xx/common-pci.c which utilized the ARM-specific BIOS32 PCI framework, and all parameterization for such things as memory and IO space as well as interrupt swizzling is done from the device tree. The plan is to phase out and delete the old driver piecemal. The __raw_writel() and __raw_readl() are used for accessing the PCI controller for the same reason that these accessors are used in the timer, IRQ and GPIO drivers: the platform will alter its address bus pattern based on whether the system is booted in big- or little-endian mode. For this reason all register on IXP4xx must always be accessed in native (CPU) endianness. This driver supports 64MB of PCI memory space, but not the indirect access of 1GB that is available in the old driver. We can address that later if and only if there are users that need all 1GB of PCI address space. Krzysztof reports having to use indirect MMIO only once for a VGA card. There is work ongoing for general indirect MMIO. (In practice the indirect MMIO is performed by writing address and writing and reading values into/from a controller register.) Tested by booting the NSLU2, attaching a USB stick, mounting and browsing the drive. Link: https://lore.kernel.org/linux-arm-kernel/m37edwuv8m.fsf@t19.piap.pl/ Cc: Arnd Bergmann <arnd@arndb.de> Cc: Imre Kaloz <kaloz@openwrt.org> Cc: Krzysztof Halasa <khalasa@piap.pl> Cc: Zoltan HERPAI <wigyori@uid0.hu> Cc: Raylynn Knight <rayknight@me.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>