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2019-12-30PM / devfreq: Move declaration of DEVICE_ATTR_RW(min_freq)Kamil Konieczny1-1/+1
Declaration of DEVICE_ATTR_RW(min_freq) is placed after function max_freq_store. Move it to the correct place after min_freq_show. Signed-off-by: Kamil Konieczny <k.konieczny@samsung.com> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
2019-12-30PM / devfreq: Move statistics to separate struct devfreq_statsKamil Konieczny2-30/+40
Count time and transitions between devfreq frequencies in separate struct devfreq_stats for improved code readability and maintenance. Signed-off-by: Kamil Konieczny <k.konieczny@samsung.com> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> [cw00.choi: Fix the merge conflict in trasn_stat_store and use 'devfreq->stats.*' style for consistent coding style and restore the clean-up code of 'devfreq->profile->*'] Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
2019-12-30PM / devfreq: Add clearing transitions statsKamil Konieczny2-5/+35
Add clearing transition table and time in states devfreq statistics by writing 0 (zero) to trans_stat file in devfreq sysfs. An example use is like following: echo 0 > /sys/class/devfreq/devfreqX/trans_stat Signed-off-by: Kamil Konieczny <k.konieczny@samsung.com> [cw00.choi: Edit return value if entering the wrong value for reset and use arrary3_size() to get the size of 3-dimensional array] Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
2019-12-30PM / devfreq: Change time stats to 64-bitKamil Konieczny2-9/+9
Change time stats counting to bigger type by using 64-bit jiffies. This will make devfreq stats code look similar to cpufreq stats and prevents overflow (for HZ = 1000 after 49.7 days). Signed-off-by: Kamil Konieczny <k.konieczny@samsung.com> Acked-by: Chanwoo Choi <cw00.choi@samsung.com> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
2019-12-30PM / devfreq: Add new name attribute for sysfsChanwoo Choi2-0/+16
The commit 4585fbcb5331 ("PM / devfreq: Modify the device name as devfreq(X) for sysfs") changed the node name to devfreq(x). After this commit, it is not possible to get the device name through /sys/class/devfreq/devfreq(X)/*. Add new name attribute in order to get device name. Cc: stable@vger.kernel.org Fixes: 4585fbcb5331 ("PM / devfreq: Modify the device name as devfreq(X) for sysfs") Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
2019-12-30PM / devfreq: Add dynamic scaling for imx8m ddr controllerLeonard Crestez3-0/+476
Add driver for dynamic scaling the DDR Controller on imx8m chips. Actual frequency switching is implemented inside TF-A, this driver wraps the SMC calls and synchronizes the clk tree. The DRAM clocks on imx8m have the following structure (abridged): +----------+ |\ +------+ | dram_pll |-------|M| dram_core | | +----------+ |U|---------->| D | /--|X| | D | dram_alt_root | |/ | R | | | C | +---------+ | | |FIX DIV/4| | | +---------+ | | composite: | | | +----------+ | | | | dram_alt |----/ | | +----------+ | | | dram_apb |-------------------->| | +----------+ +------+ The dram_pll is used for higher rates and dram_alt is used for lower rates. The dram_alt and dram_apb clocks are "imx composite" and their parent can also be modified. This driver will prepare/enable the new parents ahead of switching (so that the expected roots are enabled) and afterwards it will call clk_set_parent to ensure the parents in clock framework are up-to-date. The driver relies on dram_pll dram_alt and dram_apb being marked with CLK_GET_RATE_NOCACHE for rate updates. Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Acked-by: Chanwoo Choi <cw00.choi@samsung.com> [cw00.choi: Edit the COMPILE_TEST module dependency in Kconfig] Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>