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2021-08-13ARM: tegra: nexus7: Improve thermal zonesDmitry Osipenko1-4/+52
Use skin temperature for maintaining temperature that is suitable specifically for Nexus 7. Add CPU thermal zone that protects silicon. All these changes don't make a significant difference, but it is a more correct definition of thermal zones. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-08-13ARM: tegra: acer-a500: Improve thermal zonesDmitry Osipenko1-9/+46
Use skin temperature for maintaining temperature that is suitable specifically for A500. Add CPU thermal zone that protects silicon. All these changes don't make a significant difference, but it is a more correct definition of thermal zones. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-08-13ARM: tegra: acer-a500: Use verbose variant of atmel,wakeup-method valueDmitry Osipenko1-1/+2
The verbose variant of the atmel,wakeup-method value was lost when patch that added the property was merged because it conflicted with other patch, re-add it for consistency. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-08-13ARM: tegra: acer-a500: Add power supplies to accelerometerDmitry Osipenko1-0/+3
Add power supplies to accelerometer node, for completeness. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-08-13ARM: tegra: acer-a500: Remove bogus USB VBUS regulatorsDmitry Osipenko1-24/+1
The configuration of USB VBUS regulators was borrowed from downstream kernel, which is incorrect because the corresponding GPIOs are connected to PROX_EN (A501 3G model) and LED_EN pins in accordance to the board schematics. USB works fine with both GPIOs being disabled, so remove the bogus USB VBUS regulators. The USB VBUS of USB3 is supplied from the fixed 5v system regulator and device-mode USB1 doesn't have VBUS switches. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-08-13ARM: tegra: jetson-tk1: Correct interrupt trigger type of temperature sensorDmitry Osipenko1-1/+1
The LM90 temperature sensor should use edge-triggered interrupt because LM90 hardware doesn't deassert interrupt line until temperature is back to normal state, which results in interrupt storm. Correct the interrupt trigger type. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-08-13ARM: tegra: dalmore: Correct interrupt trigger type of temperature sensorDmitry Osipenko1-1/+1
The LM90 temperature sensor should use edge-triggered interrupt because LM90 hardware doesn't deassert interrupt line until temperature is back to normal state, which results in interrupt storm. Correct the interrupt trigger type. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-08-13ARM: tegra: cardhu: Correct interrupt trigger type of temperature sensorDmitry Osipenko1-1/+1
The LM90 temperature sensor should use edge-triggered interrupt because LM90 hardware doesn't deassert interrupt line until temperature is back to normal state, which results in interrupt storm. Correct the interrupt trigger type. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-08-13ARM: tegra: apalis: Correct interrupt trigger type of temperature sensorDmitry Osipenko2-2/+2
The LM90 temperature sensor should use edge-triggered interrupt because LM90 hardware doesn't deassert interrupt line until temperature is back to normal state, which results in interrupt storm. Correct the interrupt trigger type. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-08-13ARM: tegra: nyan: Correct interrupt trigger type of temperature sensorDmitry Osipenko1-1/+1
The LM90 temperature sensor should use edge-triggered interrupt because LM90 hardware doesn't deassert interrupt line until temperature is back to normal state, which results in interrupt storm. Correct the interrupt trigger type. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-08-13ARM: tegra: acer-a500: Add interrupt to temperature sensor nodeDmitry Osipenko1-0/+4
The TEMP_ALERT pin of LM90 temperature sensor is connected to Tegra SoC. Add interrupt property to the temperature sensor for completeness. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-08-13ARM: tegra: nexus7: Add interrupt to temperature sensor nodeDmitry Osipenko1-0/+4
The TEMP_ALERT pin of LM90 temperature sensor is connected to Tegra SoC. Add interrupt property to the temperature sensor for completeness. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-08-13ARM: tegra: paz00: Add interrupt to temperature sensor nodeDmitry Osipenko1-0/+4
The TEMP_ALERT pin of LM90 temperature sensor is connected to Tegra SoC. Add interrupt property to the temperature sensor for completeness. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-08-13ARM: tegra: ouya: Add interrupt to temperature sensor nodeDmitry Osipenko1-7/+6
The TEMP_ALERT pin of LM90 temperature sensor is connected to Tegra SoC. Add interrupt property to the temperature sensor and enable it in pinmux, for completeness. Tested-by: Matt Merhar <mattmerhar@protonmail.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-08-13ARM: tegra: Add SoC thermal sensor to Tegra30 device-treesDmitry Osipenko1-4/+83
Add the on-chip SoC thermal sensor to Tegra30 device-trees. Now CPU temperature reporting and thermal throttling is available on all Tegra30 devices universally. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-08-12dt-bindings: tegra: Document NVIDIA Jetson TX2 NX developer kitThierry Reding1-0/+1
The Jetson TX2 NX Developer Kit is the same form factor as Jetson Nano, but uses the more powerful Tegra186 SoC for added performance. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-08-12dt-bindings: i2c: renesas,riic: Make interrupt-names requiredGeert Uytterhoeven1-0/+1
Now the I2C device nodes in all DTS files have gained "interrupt-names" properties, the "interrupt-names" property can be made required. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/da8d1973dcd419d8d9c8c662ee614952f3a6969e.1626267422.git.geert+renesas@glider.be
2021-08-12arm64: dts: renesas: r9a07g044: Add I2C interrupt-namesGeert Uytterhoeven1-0/+8
Add "interrupt-names" properties to the I2C device nodes, to make it easier to review the interrupt mappings. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/d35ba11bd705e3c728f94ff0414ac6ae1156244f.1626267422.git.geert+renesas@glider.be
2021-08-12ARM: dts: rza: Add I2C interrupt-namesGeert Uytterhoeven2-0/+16
Add "interrupt-names" properties to the I2C device nodes of the RZ/A1H and RZ/A2M DTS files, to make it easier to review the interrupt mappings. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/7a073439e37f6672e4809af0a2ee9cd4ac820ec6.1626267422.git.geert+renesas@glider.be
2021-08-12dt-bindings: i2c: renesas,riic: Add interrupt-namesGeert Uytterhoeven1-8/+21
The Renesas RZ/A and RZ/G2L I2C Bus Interface has no less than 8 interrupts. Hence document the "interrupt-names" property, to make it easier to review the interrupt mappings in DTS files. Note that this property cannot be made required yet, as the RIIC nodes in all DTS files lack the property. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/a81d0e14e395f297666e8c3a8ce3e292d2606a65.1626267422.git.geert+renesas@glider.be
2021-08-10arm64: dts: renesas: r9a07g044: Add CANFD nodeLad Prabhakar1-0/+41
Add CANFD node to R9A07G044 (RZ/G2L) SoC DTSI. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20210727133022.634-4-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-08-10arm64: dts: renesas: r9a07g044: Add ADC nodeLad Prabhakar1-0/+42
Add ADC node to R9A07G044 (RZ/G2L) SoC DTSI. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20210804202118.25745-4-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-08-10arm64: dts: renesas: r9a07g044: Add pinctrl nodeLad Prabhakar1-0/+13
Add GPIO/pinctrl node to R9A07G044 (RZ/G2L) SoC DTSI. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20210727112328.18809-4-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-08-10arm64: dts: meson: add audio playback to vega-s95 dtsiChristian Hewitt1-0/+61
Add initial support limited to HDMI i2s and SPDIF (LPCM). Tested-by: Oleg Ivanov <150balbes@yandex.ru> Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lore.kernel.org/r/20210804140258.4666-1-christianshewitt@gmail.com
2021-08-10arm64: dts: meson: add audio playback to nexbox-a1Christian Hewitt1-0/+61
Add initial support limited to HDMI i2s and SPDIF (LPCM). Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lore.kernel.org/r/20210804140029.4445-1-christianshewitt@gmail.com
2021-08-10ARM: dts: am335x-sancloud-bbe: Drop usb wifi commentPaul Barker1-1/+0
The wifi chip on USB port 4 may not be present on all BBE variants. Signed-off-by: Paul Barker <paul.barker@sancloud.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-08-10ARM: dts: am335x-sancloud-bbe: Fix missing pinctrl refsPaul Barker2-0/+6
pinctrl settings for the USB hub, barometer & accelerometer need to be referenced from the relevant nodes to work. Signed-off-by: Paul Barker <paul.barker@sancloud.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-08-09arm64: dts: exynos: correct GIC CPU interfaces address range on Exynos7Krzysztof Kozlowski1-1/+1
The GIC-400 CPU interfaces address range is defined as 0x2000-0x3FFF (by ARM). Reported-by: Sam Protsenko <semen.protsenko@linaro.org> Reported-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Fixes: b9024cbc937d ("arm64: dts: Add initial device tree support for exynos7") Link: https://lore.kernel.org/r/20210805072110.4730-1-krzysztof.kozlowski@canonical.com
2021-08-09ARM: dts: ixp4xx: Add a devicetree for Freecom FSG-3Linus Walleij2-0/+159
This adds a devicetree for the Freecom FSG-3, a combined router and NAS. Cc: Rod Whitby <rod@whitby.id.au> Cc: Marc Zyngier <maz@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-08-09ARM: dts: ixp4xx: Add devicetree for Linksys WRV54GLinus Walleij2-0/+174
This adds a device tree for the Linksys WRV54G also known as Gemtek GTWX5715. Some enhancements have been folded in from the OpenWrt patches. This supports everything in the upstream kernel with placeholders for the out-of-tree multiphy which exist in OpenWrt. Cc: phj@phj.hu Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-08-09ARM: dts: ixp4xx: Add device trees for Coyote and IXDPG425Linus Walleij3-0/+237
This adds device trees for the ADI Engineering Coyote and the Intel IXDPG425 reference design. The ethernet set-up on the IXDPG425 is a bit dubious because I think it uses a DSA switch chip, but this is a good as it gets right now. The Coyote boardfile claims an IDE port exist at 0xFFFE1000 but the implementation does not use this. If you have the board and can/want to test, please contact me. Cc: Deepak Saxena <dsaxena@plexity.net> Cc: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Cc: Zoltan HERPAI <wigyori@uid0.hu> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-08-09ARM: dts: ixp4xx: Add Intel IXDP425 etc reference designsLinus Walleij5-0/+313
The IXDP425, IXCDP1100, KIXRP435 and IXDP465 are similar Intel reference designs for IXP42x, IXP43x and IXP4[56]x. This adds device trees for these so the board files can be migrated. Cc: Deepak Saxena <dsaxena@plexity.net> Cc: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-08-09ARM: dts: ixp4xx: Add CF to GW2358Linus Walleij1-0/+23
This adds support for the compact flash card slot on the Gateworks GW2358 router. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-08-09ARM: dts: ixp4xx: Add Gateworks Avila GW2348 device treeLinus Walleij2-0/+173
This adds a device tree file for the Gateworks Avila GW2348 platform supporting all the features of the in-kernel boardfiles. There are more boards in the Avila family, but this is the one that is supported out-of-the-box by the current boardfiles. Some extra features have been folded in from the upstream OpenWrt sources, such as proper ethernet setup for both ethernet ports. More variants can be added based on this device tree. Some of those have DSA switches, multiple LEDs, multiple serial ports and similar and would need some more elaborate work. Cc: Michael-Luke Jones <mlj28@cam.ac.uk> Cc: Deepak Saxena <dsaxena@plexity.net> Cc: Tom Billman <kernel@giantshoulderinc.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-08-09ARM: dts: ixp4xx: Add Arcom Vulcan device treeLinus Walleij2-1/+169
This adds a device tree for the Arcom Vulcan IXP42x board. Cc: Marc Zyngier <maz@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-08-09ARM: dts: ixp4xx: Add devicetree for Netgear WG302v2Linus Walleij2-1/+97
This adds a devicetree for the Netgear WG302v2 router. The DTS is mostly based on the upstream boardfile but I also added in the ethernet from OpenWrt to get a more complete system. Cc: Imre Kaloz <kaloz@openwrt.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-08-09ARM: dts: ixp4xx: Use the expansion busLinus Walleij9-24/+62
Replace the "simple-bus" simplification by the proper bus for IXP4xx memory or device expansion. Use chip-select addressing with two address cells on all the flashes mounted on the IXP4xx devices. This includes all flash chips. Change the unit-name from @50000000 to @c4000000 as the DTS validation screams. The registers for controlling the bus are at c4000000 but the actual memory windows and ranges are at 50000000. Well it is just syntax, we can live with it. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-08-09ARM: dts: ixp4xx: Add second UARTLinus Walleij1-0/+14
The IXP4xx has two UARTs and some platforms make use of the second one so add this to the include DTSI. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-08-09ARM: dts: ixp4xx: Add devicetree for D-Link DSM-G600 rev ALinus Walleij2-0/+146
This adds a devicetree for the D-Link DSM-G600 Wireless Network Storage Enclosure so that we can delete the boardfile. The boardfile does not even define an ethernet interface as it has an external ethernet on PCI. This devicetree is for revision A using IXP420 the rev B version uses PowerPC. Cc: Michael-Luke Jones <mlj28@cam.ac.uk> Cc: Rod Whitby <rod@whitby.id.au> Cc: Alessandro Zummo <a.zummo@towertech.it> Cc: Michael Westerhof <mwester@dls.net> Cc: Deepak Saxena <dsaxena@plexity.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-08-09ARM: dts: ixp4xx: Move EPBX100 flash to external bus nodeLinus Walleij1-40/+44
This moves the EPBX100 flash under the external bus on CS0 like on the other IXP4xx systems. Cc: Corentin Labbe <clabbe@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-08-09ARM: dts: ixp4xx: Add devicetree for Iomega NAS 100DLinus Walleij2-0/+147
This creates a more or less fully featured device tree for the IXP42x-based Iomega NAS 100D. We can't read out the raw flash contents for ethernet MAC, and we cannot handle a power-off-button inside the kernel like the boardfile does. These two things are normally done in userspace. This conversion is part of moving all of the IXP4xx board files over to device tree to modernize the IXP4xx kernel. Cc: Rod Whitby <rod@whitby.id.au> Cc: Alessandro Zummo <a.zummo@towertech.it> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-08-09ARM: dts: ixp4xx: Fix up bad interrupt flagsLinus Walleij2-36/+36
The PCI hosts had bad IRQ semantics, these are all active low. Use the proper define and fix all in-tree users. Suggested-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-08-06ARM: dts: sti: remove clk_ignore_unused from bootargs for stih410-b2260Patrice Chotard1-1/+0
Remove clk_ignore_unused from bootargs as it's no more needed. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-08-06ARM: dts: sti: remove clk_ignore_unused from bootargs for stih418-b2199Patrice Chotard1-1/+0
Remove clk_ignore_unused from bootargs as it's no more needed. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-08-06ARM: dts: sti: remove clk_ignore_unused from bootargs for stih410-b2120Patrice Chotard1-1/+0
Remove clk_ignore_unused from bootargs as it's no more needed. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-08-06ARM: dts: sti: remove clk_ignore_unused from bootargs for stih407-b2120Patrice Chotard1-1/+0
Remove clk_ignore_unused from bootargs as it's no more needed. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-08-06ARM: dts: sti: Introduce 4KOpen (stih418-b2264) boardAlain Volmat2-1/+153
4KOpen (B2264) is a board based on the STMicroelectronics STiH418 soc: - 2GB DDR - HDMI - Ethernet 1000-BaseT - PCIe (mini PCIe connector) - MicroSD slot - USB2 and USB3 connectors - Sata - 40 pins GPIO header Signed-off-by: Alain Volmat <avolmat@me.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-08-06ARM: dts: sti: add the thermal sensor node within stih418Alain Volmat1-0/+8
The STiH418 embedded the same sensor as the STiH410. This commit adds the corresponding node, relying on the st_thermal driver. Signed-off-by: Alain Volmat <avolmat@me.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-08-06ARM: dts: sti: disable rng11 on the stih418 platformAlain Volmat1-0/+4
The rng11 is not available on the STiH418 hence is disabled in the stih418.dtsi Signed-off-by: Alain Volmat <avolmat@me.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-08-06ARM: dts: sti: add the spinor controller node within stih407-familyAlain Volmat1-0/+15
The STiH407 family (and further versions STiH410/STiH418) embedded a serial flash controller allowing fast access to SPI-NOR. This commit adds the corresponding node, relying on the st-spi-fsm drivers. Signed-off-by: Alain Volmat <avolmat@me.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
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