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2018-10-15mmc: mediatek: add MT8183 MMC driver supportChaotian Jing1-50/+233
MT8183 puts the tune register at top layer, so need add new code to support it. Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-15mmc: mediatek: tune CMD/DATA togetherChaotian Jing1-0/+87
for MSDC IP which supports both data tune and async fifo, it can tune cmd/data together. which can save the time and make the tune result of CMD more stable as data line are 4bit or 8bit. Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-15mmc: mediatek: fix cannot receive new request when msdc_cmd_is_ready failChaotian Jing1-1/+1
when msdc_cmd_is_ready return fail, the req_timeout work has not been inited and cancel_delayed_work() will return false, then, the request return directly and never call mmc_request_done(). so need call mod_delayed_work() before msdc_cmd_is_ready() Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-15mmc: mediatek: fill the actual clock for mmc debugfsChaotian Jing1-6/+7
as the mmc core layer has the mmc->actual_clock, so fill it and drop msdc_host->sclk. Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-15mmc: dt-bindings: add support for MT8183 SoCChaotian Jing1-0/+1
Add the devicetree binding for MT8183 SoC Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-15mmc: uniphier-sd: avoid using broken DMA RX channelMasahiro Yamada1-0/+3
host->chan_rx is NULL when UNIPHIER_SD_CAP_BROKEN_DMA_RX quirk flag is set. In this case, it should not set up DMA. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-15mmc: uniphier-sd: fix DMA disablingMasahiro Yamada1-1/+1
Once DMA is enabled, it is not possible to disable it because uniphier_sd_dma_endisable() always sets the DMA_ENABLE_DMASDRW bit regardless of the argument 'enable'. It should disable DMA when 'enable' is false. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-15mmc: tmio: simplify the DMA mode testMasahiro Yamada5-17/+18
host->chan_{rx,tx} represents the DMA capability of the platform. Even if DMA is supported, there are cases where we want to use PIO, for example, data length is short enough as commit 5f52c3552946 ("mmc: tmio: use PIO for short transfers") mentioned. Regarding the hardware control flow, we are interested in whether DMA is currently enabled or not, instead of whether the platform has the DMA capability. Hence, the several conditionals in tmio_mmc_core.c end up with checking host->chan_{rx,tx} and !host->force_pio. This is not nice. Let's flip the flag host->force_pio into host->dma_on. host->dma_on represents whether the DMA is currently enabled or not. This flag is set false in the beginning of each command, then should be set true by tmio_mmc_start_dma() when the DMA is turned on. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-15mmc: tmio: remove TMIO_MMC_HAVE_HIGH_REG flagMasahiro Yamada3-12/+5
TMIO_MMC_HAVE_HIGH_REG is confusing due to its counter-intuitive name. All the TMIO MMC variants (TMIO MMC, Renesas SDHI, UniPhier SD) actually have high registers. It is just that each of them implements its own registers there. The original IP from Panasonic only defines registers 0x00-0xff in the bus_shift=1 review. The register area above them is platform-dependent. In fact, TMIO_MMC_HAVE_HIGH_REG is set only by tmio-mmc.c and used to test the accessibility of CTL_SDIO_REGS. Because it is specific to the TMIO MFD variant, the right thing to do is to move such registers to tmio_mmc.c and delete the TMIO_MMC_HAVE_HIGH_REG flag. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-15mmc: tmio: move MFD variant reset to a platform hookMasahiro Yamada3-8/+24
CTL_RESET_SDIO register is specific to the TMIO MFD (tmio_mmc.c). Add a new hook host->reset() for performing a platform-specific reset sequence, and move CTL_RESET_SDIO over there. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-15mmc: renesas_sdhi: Add r8a77470 SDHI1 supportFabrizio Castro2-4/+6
The RZ/G1C (a.k.a. R8A77470) comes with three SDHI interfaces, SDHI0 and SDHI2 are compatible with the R-Car Gen2 SDHIs, SDHI1 is compatible with R-Car Gen3 SDHIs and it can be used as eMMC as well. This patch adds driver compatibility, and makes sure both drivers get compiled for the R8A77470. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Biju Das <biju.das@bp.renesas.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-15dt-bindings: mmc: renesas_sdhi: Add r8a77470 supportFabrizio Castro1-2/+4
The RZ/G1C (a.k.a. R8A77470) comes with three SDHI interfaces, SDHI0 and SDHI2 are compatible with R-Car Gen2 SDHIs, and SDHI1 is compatible with R-Car Gen3 SDHIs, as it comes with an internal DMAC, therefore SDHI1 is fully compatible with driver renesas_sdhi_internal_dmac driver. As a result, the compatible strings for the R8A77470 SDHI interfaces are a little bit special. Document SDHI support for the RZ/G1C SoC. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-10libertas: call into generic suspend code before turning off powerDaniel Mack1-0/+4
When powering down a SDIO connected card during suspend, make sure to call into the generic lbs_suspend() function before pulling the plug. This will make sure the card is successfully deregistered from the system to avoid communication to the card starving out. Fixes: 7444a8092906 ("libertas: fix suspend and resume for SDIO connected cards") Signed-off-by: Daniel Mack <daniel@zonque.org> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Kalle Valo <kvalo@codeaurora.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-09mmc: block: avoid multiblock reads for the last sector in SPI modeChris Boot1-0/+10
On some SD cards over SPI, reading with the multiblock read command the last sector will leave the card in a bad state. Remove last sectors from the multiblock reading cmd. Signed-off-by: Chris Boot <bootc@bootc.net> Signed-off-by: Clément Péron <peron.clem@gmail.com> Cc: stable@vger.kernel.org # v4.10+ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-09mmc: mmci: add stm32 sdmmc variantLudovic Barre5-0/+334
This patch adds a stm32 sdmmc variant, rev 1.1. Introduces a new Manufacturer id "0x53, ascii 'S' to define new stm32 sdmmc family with clean range of amba revision/configurations bits (corresponding to sdmmc_ver register with major/minor fields). Add 2 variants properties: -dma_lli, to enable link list support. -stm32_idmabsize_mask, defines the range of SDMMC_IDMABSIZER register which specify the number bytes per buffer. DT properties for sdmmc: -Indicate signal directions (only one property for d0dir, d123dir, cmd_dir) -Select command and data phase relation. -Select "clock in" from an external driver. Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-09dt-bindings: mmci: add stm32 sdmmc variantLudovic Barre1-0/+10
This patch adds properties for stm32 sdmmc variant. Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-09mmc: mmci: add stm32 sdmmc registersLudovic Barre1-0/+56
This patch adds stm32 sdmmc specific registers. Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-09mmc: mmci: add clock divider for stm32 sdmmcLudovic Barre2-0/+4
The STM32 sdmmc variant has a different clock divider. Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-09mmc: mmci: add optional reset propertyLudovic Barre2-0/+9
This patch adds a optional reset management. STM32 sdmmc variant needs to reset hardware block during the power cycle procedure (for re-initialization). Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-09dt-bindings: mmci: add optional reset propertyLudovic Barre1-0/+1
This patch adds a optional reset management. Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-09mmc: mmci: add variant property to not read datacntLudovic Barre2-2/+9
This patch adds a boolean property to not read datacnt register. Needed to support the STM32 sdmmc variant. MMCIDATACNT register should be read only after the data transfer is completed. When reading after an error event the read data count value may be different from the real number of data bytes transferred. Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-09mmc: mmci: add variant property to write datactrl before commandLudovic Barre2-2/+6
This patch adds a boolean property to allow to write datactrl before to send command, whatever the command type (read or write). Needed to support the STM32 sdmmc variant. Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-09mmc: mmci: add variant property to define irq pio maskLudovic Barre2-3/+15
This patch allows to define specific pio mask for variants. Needed to support the STM32 sdmmc variant which has some bits with different meaning (bits: 21,20,13,12,9) Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-09mmc: mmci: add variant property to define dpsm bitLudovic Barre2-3/+14
This patch adds datactrl variant property to define dpsm enable bit. Needed to support the STM32 variant (STM32 has no dpsm enable bit). Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-09mmc: mmci: add variant properties to define cpsm & cmdresp bitsLudovic Barre2-4/+51
This patch adds command variant properties to define cpsm enable bit and responses. Needed to support the STM32 variant (shift of cpsm bit, specific definition of commands response). Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-09mmc: mmci: expand startbiterr to irqmask and error checkLudovic Barre2-14/+19
All variants don't pretend to have a startbiterr. -While data error check, if status register return an error (like MCI_DATACRCFAIL) we must avoid to check MCI_STARTBITERR (if not desired). -expand start_err to MCI_IRQENABLE to avoid to set this bit by default. Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-09mmc: mmci: add datactrl block size variant propertyLudovic Barre2-2/+13
This patch allows to define a datactrl block size by variant, requested by STM32 sdmmc variant. Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-09mmc: mmci: add set_clk/pwrreg callbacksLudovic Barre2-4/+17
This patch adds set_clkreg and set_pwrreg callbacks at mmci_host_ops to allow to call specific variant. extends visibility of mmci_write_clk/pwrreg functions to be used into specific file variant. Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-09mmc: mmci: add validate_data callbackLudovic Barre2-18/+22
This patch adds validate_data callback at mmci_host_ops to check specific constraints of variant. Move mmci_validate_data function to regroup mmci_host_ops interfaces. Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-09mmc: mmci: add dma_error callbackLudovic Barre3-11/+18
This patch adds dma_error callback at mmci_host_ops to allow to call specific variant. Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-09mmc: mmci: add dma_finalize callbackLudovic Barre3-8/+15
This patch adds dma_finalize callback at mmci_host_ops to allow to call specific variant. Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-09mmc: mmci: add dma_start callbackLudovic Barre3-30/+42
This patch adds dma_start callback to mmci_host_ops. Create a generic mmci_dma_start function which regroup common action between variant. Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-09mmc: mmci: add get_next_data callbackLudovic Barre3-6/+13
This patch adds get_next_data callback to mmci_host_ops. Generic mmci_get_next_data factorizes next_cookie check and the host ops call. Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-09mmc: mmci: add prepare/unprepare_data callbacksLudovic Barre3-33/+78
This patch adds prepare/unprepare callbacks to mmci_host_ops. Like this mmci_pre/post_request can be generic, mmci_prepare_data and mmci_unprepare_data provide common next_cookie management. Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-09mmc: mmci: merge prepare data functionsLudovic Barre1-12/+7
This patch merges the prepare data functions. This allows to define a single access to prepare data service. This prepares integration for mmci host ops. Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-09mmc: mmci: introduce dma_priv pointer to mmci_hostLudovic Barre2-69/+94
-Introduces dma_priv pointer to define specific needs for each dma engine. This patch is needed to prepare sdmmc variant with internal dma which not use dmaengine API. -Moves next cookie to mmci host structure to share same cookie management between all variants. Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-09mmc: mmci: create common mmci_dma_setup/releaseLudovic Barre3-18/+75
This patch creates a common mmci_dma_setup/release which calls dma_setup/release callbacks of mmci_host_ops and manages common features like use_dma... If there is a fallbacks to pio mode, dma functions must check use_dma. error management: -mmci_dmae_setup fail if Tx and Rx dma channels are not defined -qcom_dma_setup fail if one of both dma channels is not defined, Qcom has no specific resource to release, just mmci dmae resource. Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-09mmc: sdhci-of-arasan: Add Support for AM654 MMC and PHYFaiz Abbas1-0/+46
The current arasan sdhci PHY configuration isn't compatible with the PHY on TI's AM654 devices. Therefore, add a new compatible, AM654 specific quirks and a new AM654 specific set_clock function which configures the PHY in a sane way. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-09mmc: sdhci-of-arasan: Add a single data structure to incorporate pdata and soc_ctl_mapFaiz Abbas1-15/+32
Currently, the driver passes platform data as a global structure and uses the .data of of_device_id to pass the soc_ctl_map. To make the implementation more flexible add a single data structure that incorporates both of the above and pass it in the .data of of_device_id. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-09dt-bindings: mmc: sdhci-of-arasan: Add new compatible for AM654 MMC PHYFaiz Abbas1-0/+1
Add a new compatible to use the host controller driver with the MMC PHY on TI's AM654 SOCs Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-08mmc: mediatek: add bus_clk controlChaotian Jing1-0/+6
when gate MSDC0_HCLK, access register will hang, even the MSDC driver will never accessing register after HCLK was gated, but for safety, need gate the bus_clk(which used to access register) too. Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-08mmc: dt-bindings: add "bus-clk" for MT2712Chaotian Jing1-0/+1
On MT2712 MSDC0/3, HCLK/bus-clk need gate/ungate together, or will hang when access MSDC register. Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-08mmc: dw_mmc-exynos: Add tuning for sdr and ddr timing for USH-I modeAnand Moon1-0/+11
Add tuning for sdr and ddr timing for USH-I mode sdr104/sdr50/ddr50 for host controller. Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Anand Moon <linux.amoon@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-08mmc: meson-mx-sdio: mark expected switch fall-throughGustavo A. R. Silva1-1/+1
In preparation to enabling -Wimplicit-fallthrough, mark switch cases where we are expecting to fall through. Notice that in this particular case, I replaced the "fall-through:" comment with a proper "fall through", which is what GCC is expecting to find. Addresses-Coverity-ID: 1373880 ("Missing break in switch") Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-08mmc: tifm_sd: Mark expected switch fall-throughGustavo A. R. Silva1-1/+2
In preparation to enabling -Wimplicit-fallthrough, mark switch cases where we are expecting to fall through. Notice that in this particular case, I replaced the "deliberate fall-through" comment with a proper "fall through" at the bottom of the case, which is what GCC is expecting to find. Addresses-Coverity-ID: 1373887 ("Missing break in switch") Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-08mmc: mmci: Change struct members from bool to u8Ludovic Barre1-16/+16
Recent versions of checkpatch have a new warning based on a documented preference of Linus to not use bool in structures due to wasted space and the size of bool is implementation dependent. For more information, see the email thread at https://lkml.org/lkml/2017/11/21/384 fix checkpatch --strict issues: -CHECK: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384 -WARNING: Avoid using bool as bitfield. Prefer bool bitfields as unsigned int or u<8|16|32> Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-08mmc: mmci: internalize dma_inprogress into mmci dma functionsLudovic Barre2-8/+10
This patch internalizes the dma_inprogress into mmci dma interfaces. This allows to simplify and prepare the next dma callbacks for mmci host ops. dma_inprogress is called in mmci_dma_data_error and mmci_dma_finalize. Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-08mmc: mmci: internalize dma map/unmap into mmci dma functionsLudovic Barre1-23/+17
This patch internalizes the management of dma map/unmap into mmci dma interfaces. This allows to simplify and prepare the next dma callbacks for mmci host ops. mmci_dma_unmap was called in mmci_data_irq & mmci_cmd_irq functions and can be integrated in mmci_dma_data_error. Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-08dt-bindings: mmc: sh_mmcif: Document r8a7744 DT bindingsBiju Das1-1/+3
Add support for r8a7744 SoC. Renesas RZ/G1N (R8A7744) MMCIF is identical to the R-Car Gen2 family. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-08dt-bindings: mmc: renesas_sdhi: Add r8a7744 supportBiju Das1-0/+1
Add support for r8a7744 SoC. Renesas RZ/G1N (R8A7744) SDHI is identical to the R-Car Gen2 family. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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