| Age | Commit message (Collapse) | Author | Files | Lines | |
|---|---|---|---|---|---|
| 2015-06-05 | ASoC: tas2552: Add support for pll and pdm source clock selection | 1 | -4/+29 | ||
| Instead of hard wiring the PLL_CLKIN and PDM_CLK to be sourced from BCLK add proper clock configuration via the set_dai_sysclk callback. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Mark Brown <broonie@kernel.org> | |||||
