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2014-11-21drm/msm/mdp5: dpms(OFF) cleanupsRob Clark2-0/+13
When disabling the interface (INTF), the change doesn't latch until next vblank, so we need to wait for vblank. Also, to be pedantic, in the crtc, set all the mixer stages to unused. It shouldn't really matter, since at this point we have already disabled the INTF and waited for necessary vblank. Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-11-21drm/msm/mdp5: atomicRob Clark4-368/+318
Convert mdp5 over to atomic helpers. Extend/wrap drm_plane_state to track plane zpos and to keep track of the needed when applying the atomic update. In mdp5's plane->atomic_check() we also need to check for updates which require SMP reallocation, in order to trigger full modeset. Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-11-21drm/msm: atomic fixesRob Clark3-2/+9
Fixes for a couple little issues found in testing. Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-11-21drm/msm/mdp5: remove global mdp5_ctl_mgrRob Clark1-10/+16
A bit cleaner.. and won't resulting in an attempt to kfree() a static global in unload path. Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-11-21drm/msm/mdp5: don't use void * for opaque typesRob Clark10-108/+88
For example, use 'struct mdp5_smp *' everywhere instead of 'void *', but only declare it as 'struct mdp5_smp;' in common headers, so the struct body is still private. The accomplishes the desired modularity while still letting the compiler provide some type checking for us. Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-11-21drm/msm: add multiple CRTC and overlay supportStephane Viau9-121/+811
MDP5 currently support one single CRTC with its private pipe. This change allows the configuration of multiple CRTCs with the possibility to attach several public planes to these CRTCs. Signed-off-by: Stephane Viau <sviau@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-11-21drm/msm/mdp5: set rate before enabling clkRob Clark1-0/+6
Set a "safe" rate at first, in order to read out the hw revision. And then after set the optimal value. Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-11-21drm/msm/mdp5: introduce mdp5_cfg moduleStephane Viau6-209/+354
The hardware configuration modification from a version to another is quite consequent. Introducing a configuration module (mdp5_cfg) may make things more clear and easier to access when a new hardware version comes up. Signed-off-by: Stephane Viau <sviau@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-11-21drm/msm/mdp5: make SMP module dynamically configurableStephane Viau5-153/+265
The Shared Memory Pool (SMP) has its own limitation, features and state. Some examples are: - the number of Memory Macro Block (MMB) and their size - the number of lines that can be fetched - the state of MMB currently allocated - the computation of number of blocks required per plane - client IDs ... In order to avoid private data to be overwritten by other modules, let's make these private to the SMP module. Some of these depend on the hardware configuration, let's add them to the mdp5_config struct. In some hw configurations, some MMBs are statically tied to RGB pipes and cannot be re-allocated dynamically. This change introduces the concept of MMB static usage and makes sure that dynamic MMB requests are dimensioned accordingly. A note on passing a pipe pointer, instead of client IDs: Client IDs are SMP-related information. Passing PIPE information to SMP lets SMP module to find out which SMP client(s) are used. This allows the SMP module to access the PIPE pointer, which can be used for FIFO watermark configuration. By the way, even though REG_MDP5_PIPE_REQPRIO_FIFO_WM_* registers are part of the PIPE registers, their functionality is to reflect the behavior of the SMP block. These registers access is now restricted to the SMP module. Signed-off-by: Stephane Viau <sviau@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-11-21drm/msm/hdmi: remove useless krefRob Clark4-32/+13
A left-over from prior to component framework. The original intent was to deal with hdmi getting unloaded before the master component, but that isn't really going to work anyways. These days with the component framework taking care to unload the master component first, we don't have to worry about this. Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-11-21drm/msm/mdp5: get the core clock rate from MDP5 configStephane Viau2-5/+7
The core clock rate depends on the hw configuration. Once we have read the hardware revision, we can set the core clock to its maximum value. Before then, the clock is set at a rate supported by all MDP5 revisions. Signed-off-by: Stephane Viau <sviau@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-11-21drm/msm/mdp5: use irqdomainsRob Clark6-26/+122
For mdp5, the irqs of hdmi/eDP/dsi0/dsi1 blocks get routed through the mdp block. In order to decouple hdmi/eDP/etc, register an irq domain in mdp5. When hdmi/dsi/etc are used with mdp4, they can directly setup their irqs in their DT nodes as normal. When used with mdp5, instead set the mdp device as the interrupt-parent, as in: mdp: qcom,mdss_mdp@fd900000 { compatible = "qcom,mdss_mdp"; interrupt-controller; #interrupt-cells = <1>; ... }; hdmi: qcom,hdmi_tx@fd922100 { compatible = "qcom,hdmi-tx-8074"; interrupt-parent = <&mdp>; interrupts = <8 0>; /* MDP5_HW_INTR_STATUS.INTR_HDMI */ ... }; There is a slight awkwardness, in that we cannot disable child irqs at the mdp level, they can only be cleared in the child block. So you must not use threaded irq handlers in the child. I'm not sure if there is a better way to deal with that. Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-11-21drm/vmwgfx: Deletion of an unnecessary check before the function call "vfree"Markus Elfring1-2/+1
The vfree() function performes also input parameter validation. Thus the test around the call is not needed. This issue was detected by using the Coccinelle software. Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> Reviewed-by: Thierry Reding <thierry.reding@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-11-21drm/udl: Deletion of an unnecessary check before the function call "vunmap"Markus Elfring1-2/+1
The vunmap() function performes also input parameter validation. Thus the test around the call is not needed. This issue was detected by using the Coccinelle software. Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> Reviewed-by: Thierry Reding <thierry.reding@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-11-21drm/tilcdc: Deletion of an unnecessary check before the function call "drm_fbdev_cma_hotplug_event"Markus Elfring1-2/+1
The drm_fbdev_cma_hotplug_event() function tests whether its argument is NULL and then returns immediately. Thus the test around the call is not needed. This issue was detected by using the Coccinelle software. Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> Reviewed-by: Thierry Reding <thierry.reding@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-11-21drm/edid: Deletion of an unnecessary check before the function call "release_firmware"Markus Elfring1-2/+1
The release_firmware() function tests whether its argument is NULL and then returns immediately. Thus the test around the call is not needed. This issue was detected by using the Coccinelle software. Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> Reviewed-by: Thierry Reding <thierry.reding@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-11-21drm/atomic: Add missing ERR_PTR castingDaniel Vetter1-1/+1
This is an oversight from commit f52b69f1ecfdd7ef6867a257620258c09e569552 Author: Daniel Vetter <daniel.vetter@ffwll.ch> Date: Wed Nov 19 18:38:08 2014 +0100 drm/atomic: Don't overrun the connector array when hotplugging Cc: Dave Airlie <airlied@redhat.com> Cc: Rob Clark <robdclark@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-11-21drm/gem: Warn on illegal use of the dumb buffer interface v2Thomas Hellstrom9-12/+74
It happens on occasion that developers of generic user-space applications abuse the dumb buffer API to get hold of drm buffers that they can both mmap() and use for GPU acceleration, using the assumptions that dumb buffers and buffers available for GPU are a) The same type and can be aribtrarily type-casted. b) fully coherent. This patch makes the most widely used drivers warn nicely when that happens, the next step will be to fail. v2: Move drmP.h changes to drm_gem.h. Fix Radeon dumb mmap breakage. Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-11-20drm/radeon: update the VM after setting BO address v4Christian König1-0/+64
This way the necessary VM update is kicked off immediately if all BOs involved are in GPU accessible memory. v2: fix vm lock v3: immediately update unmaps as well v4: use drm_free_large instead of kfree Tested-by: Kai Wasserbäch <kai@dev.carbon-project.org> Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-11-20drm/radeon: sync PT updates as shared v2Christian König1-1/+8
Only invalidating PTEs needs to be executed synchronized to using the PT. v2: fix sync to uses Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-11-20drm/radeon: sync PD updates as sharedChristian König1-1/+1
We never invalidate PD entries and making them valid can run with other users in parallel. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-11-20drm/radeon: fence BO_VAs manuallyChristian König3-16/+14
This allows us to finally remove the VM fence and so allow concurrent use of it from different engines. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-11-20drm/radeon: use one VMID for each ringChristian König7-48/+68
Use multiple VMIDs for each VM, one for each ring. That allows us to execute flushes separately on each ring, still not ideal cause in a lot of cases rings can share IDs. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-11-20drm/radeon: track VM update fences separatelyChristian König5-21/+33
Note for each fence if it's a VM page table update or not. This allows us to determine the last VM update in a sync object and so to figure out if we need to flush the TLB or not. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-11-20drm/radeon: fence PT updates manually v2Christian König3-24/+62
This allows us to add the real execution fence as shared. v2: fix typo Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-11-20drm/radeon: split semaphore and sync object handling v2Christian König14-260/+303
Previously we just allocated space for four hardware semaphores in each software semaphore object. Make software semaphore objects represent only one hardware semaphore address again by splitting the sync code into it's own object. v2: fix typo in comment Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-11-20drm/radeon: remove unnecessary VM syncsChristian König1-2/+0
The PD/PTs reservation object now contains everything needed. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-11-20drm/radeon: stop re-reserving the BO in radeon_vm_bo_set_addrChristian König3-5/+3
That's useless when all callers drop the reservation immediately after calling the function. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-11-20drm/radeon: rework vm_flush parametersChristian König9-75/+61
Use ring structure instead of index and provide vm_id and pd_addr separately. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-11-20drm/radeon/ci: disable needless sclk changesAlex Deucher1-1/+1
The current code always reprogrammed the sclk levels, but we don't currently handle disp sclk requirements so just skip it. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-11-20drm/radeon/ci: force pcie level before sclk and mclkAlex Deucher1-17/+17
Preferred ordering. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-11-20drm/radeon/ci: use different smc command for pcie dpmAlex Deucher1-2/+10
Use unforce levels rather than enable mask instruction. This is the preferred method. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-11-20drm/radeon/ci: apply disp voltage changes before clk changesAlex Deucher1-2/+2
Apply voltage changes for displays before changing clocks. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-11-20drm/radeon: fix PCC debugging message for CI DPMAlex Deucher1-1/+1
Add missing newline and print the bad gpio shift. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-11-20drm/radeon/dpm: add thermal dpm support for CIAlex Deucher3-0/+31
Not currently used. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-11-20drm/radeon/dpm: add smc fan control for CI (v2)Alex Deucher8-4/+443
Enable smc fan control for CI boards. Should reduce the fan noise on systems with a higher default fan profile. v2: disable by default, add additional fan setup, rpm control bug: https://bugs.freedesktop.org/show_bug.cgi?id=73338 Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-11-20drm/radeon/dpm: add smc fan control for SI (v2)Alex Deucher6-7/+401
Enable smc fan control for SI boards. Should reduce the fan noise on systems with a higher default fan profile. v2: disable by default, add rpm controls bug: https://bugs.freedesktop.org/show_bug.cgi?id=73338 Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-11-20drm/radeon: work around a hw bug in MGCG on CIKAlex Deucher1-1/+2
Always need to set bit 0 of RLC_CGTT_MGCG_OVERRIDE to avoid unreliable doorbell updates in some cases. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2014-11-20drm/radeon: Move radeon_cursor_move(_locked) to replace forward declarationMichel Dänzer1-111/+109
No functional change. Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-11-20drm/radeon: Use cursor_set2 hook for enabling / disabling the HW cursorMichel Dänzer3-17/+52
The cursor_set2 hook provides the cursor hotspot position within the cursor image. When the hotspot position changes, we can adjust the cursor position such that the hotspot doesn't move on the screen. This prevents the cursor from appearing to intermittently jump around on the screen when the position of the hotspot within the cursor image changes. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-11-20drm/cirrus: allow 32bpp framebuffers for cirrus drmZach Reizner3-5/+30
This patch allows framebuffers for cirrus to be created with 32bpp pixel formats provided that they do not violate certain restrictions of the cirrus hardware. v2: Use pci resource length for vram size. Signed-off-by: Zach Reizner <zachr@google.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-11-20drm/udl: add support to export a handle to a FD on UDL.Haixia Shi5-72/+278
Only importing an FD to a handle is currently supported on UDL, but the exporting functionality is equally useful. Signed-off-by: Haixia Shi <hshi@chromium.org> Reviewed-by: Stéphane Marchesin <marcheu@chromium.org> Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-11-20drm/udl: add cache flags definitions for udl_gem_objectHaixia Shi2-0/+25
By default set udl_gem_object as cacheable, but set WC flag when attaching dmabuf. In udl_gem_mmap() update cache attributes based on the flags, similar to exynos_drm_gem_mmap(). Signed-off-by: Haixia Shi <hshi@chromium.org> Reviewed-by: Sonny Rao <sonnyrao@chromium.org> Reviewed-by: Olof Johansson <olofj@chromium.org> Reviewed-by: Stéphane Marchesin <marcheu@chromium.org> Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-11-20drm/cirrus: fix leaky driver load error handlingZach Reizner1-4/+9
Before this patch, cirrus_device_init could have failed while cirrus_mm_init succeeded and the driver would have reported overall success on load. This patch causes cirrus_device_init to return on the first error encountered. Reviewed-by: Stéphane Marchesin <marcheu@chromium.org> Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-11-20drm/atomic_helper: Make it clear that commit_planes gets the old stateDaniel Vetter1-6/+6
Oversight from my kerneldoc cleanup when doing the original atomic helper series - I've only applied this clarification to the modeset related helpers, and not the plane update code. Remedy this asap. Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Reviewed-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-11-20drm: s/enum_blob_list/enum_list/ in drm_propertyDaniel Vetter3-37/+20
I guess for hysterical raisins this was meant to be the way to read blob properties. But that's done with the two-stage approach which uses separate blob kms object and the special-purpose get_blob ioctl. Shipping userspace seems to have never relied on this, and the kernel also never put any blob thing onto that property. And nowadays it would blow up, e.g. in drm_property_destroy. Also it makes no sense to return values in an ioctl that only returns metadata about everything. So let's ditch all the internal code for the blob list, rename the list to be unambiguous and sprinkle comments all over the place to explain this peculiar piece of api. v2: Squash in fixup from Rob to remove now unused variables. Cc: Rob Clark <robdclark@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Reviewed-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-11-20drm/crtc: Polish kerneldocDaniel Vetter1-38/+41
- Make it clear that it's a negative errno (more in line with everything else). - Clean up the confusion around get_properties vs. getproperty ioctls: One reads per-obj property values, the other reads property metadata. Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Reviewed-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-11-20drm/atomic: Don't overrun the connector array when hotpluggingDaniel Vetter3-20/+31
Yet another fallout from not considering DP MST hotplug. With the previous patches we have stable indices, but it might still happen that a connector gets added between when we allocate the array and when we actually add a connector. Especially when we back off due to ww mutex contention or similar issues. So store the sizes of the arrays in struct drm_atomic_state and double check them. We don't really care about races except that we want to use a consistent value, so ACCESS_ONCE is all we need. And if we indeed notice that we'd overrun the array then just give up and restart the entire ioctl. Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Reviewed-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-11-20drm/atomic: Only destroy connector states with connection mutex heldDaniel Vetter2-10/+13
Otherwise the connector might have been unplugged and destroyed while we didn't look. Yet another fallout from DP MST hotplugging that I didn't consider. To make sure we get this right add an appropriate WARN_ON to drm_atomic_state_clear (obviously only when we actually have a state to clear up). And reorder all the state_clear and backoff calls to make it work out properly. Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Reviewed-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-11-20drm/atomic: Ensure that drm_connector_index is stableDaniel Vetter2-4/+9
I've totally forgotten that with DP MST connectors can now be hotplugged. And failed to adapt Rob's drm_atomic_state code (which predates connector hotplugging) to the new realities. The first step is to make sure that the connector indices used to access the arrays of pointers are stable. The connection mutex gives us enough guarantees for that, which means we won't unecessarily block on concurrent modesets or background probing. So add a locking WARN_ON and shuffle the code slightly to make sure we always hold the right lock. Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Reviewed-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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