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2013-12-19ARM: tegra: fix missing pincontrol configuration for Venice2Laxman Dewangan1-48/+260
Compare the initial population of default pinmux configuration of Venice2 with the chrome branch and add/fix the missing configurations. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-18ARM: tegra: set up /aliases entries for RTCsStephen Warren11-0/+55
This ensures that the PMIC RTC provides the system time, rather than the on-SoC RTC, which is not battery-backed. tegra124-venice2.dts isn't touched yet since we haven't added any off- SoC RTC device to its device tree. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-16ARM: tegra: Add SPI controller nodes for Tegra124Thierry Reding1-0/+90
The SPI controllers on Tegra124 are compatible with those found on the Tegra114 SoC. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-16ARM: tegra: Fix misconfiguration of pin PH2 on Venice2Thierry Reding1-0/+7
This pin needs to be configured in pull-down, non-tristate mode in order for the backlight to work correctly. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-16ARM: tegra: fix pinctrl misconfiguration on Venice2Stephen Warren1-2/+2
Other boards use PULL_NONE for their debug UART pins, and without this change, the board doesn't accept any serial input. Don't set the I2S port pins to tristate mode, or no audio signal will be sent out. Fixes: 605ae5804385 ("ARM: tegra: add default pinctrl nodes for Venice2") Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-16ARM: tegra: add default pinctrl nodes for Venice2Laxman Dewangan2-0/+338
Add the default pinmux configuration for the Tegra124 based Venice2 platform. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-16ARM: tegra: correct Colibri T20 regulator settingsStefan Agner1-15/+15
Set the parent of the regulators LDO2 to LDO9 according to the schematic. Set the base voltage to 3.3V, there is only 3.3V on the module itself. Set the Core and CPU voltage to the specified voltages of 1.2V and 1.0V respectivly. LDO6 should deliver 2.85V. The attached peripherals were not in use so far. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-16ARM: tegra: convert dts files of Tegra30 platforms to use pinctrl definesLaxman Dewangan3-37/+38
Use Tegra pinconrol dt-binding macro to set the values of different pinmux properties of Tegra30 platforms. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-16ARM: tegra: convert dts files of Tegra20 platforms to use pinctrl definesLaxman Dewangan10-183/+184
Use Tegra pinconrol dt-binding macro to set the values of different pinmux properties of Tegra20 platforms. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-16ARM: tegra: convert dts files of Tegra114 platforms to use pinctrl definesLaxman Dewangan2-274/+275
Use Tegra pinconrol dt-binding macro to set the values of different pinmux properties of Tegra114 platforms. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>