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2019-09-22firmware: bcm47xx_nvram: _really_ correct size_t printf formatLinus Torvalds1-1/+1
Commit feb4eb060c3a ("firmware: bcm47xx_nvram: Correct size_t printf format") was wrong, and changed a printout of 'header.len' - which is an u32 type - to use '%zu'. It apparently did pattern matching on the other case, where it printed out 'nvram_len', which is indeed of type 'size_t'. Rather than undoing the change, this just makes it use the variable that the change seemed to expect to be used. Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Philippe Mathieu-Daudé <f4bug@amsat.org> Cc: Paul Burton <paul.burton@mips.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2019-09-22modules: make MODULE_IMPORT_NS() work even when modular builds are disabledLinus Torvalds1-2/+2
It's an unusual configuration, and was apparently never tested, and not caught in linux-next because of a combination of travels and it making it into the tree too late. The fix is to simply move the #define to outside the CONFIG_MODULE section, since MODULE_INFO() will do the right thing. Cc: Martijn Coenen <maco@android.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Matthias Maennich <maennich@google.com> Cc: Jessica Yu <jeyu@kernel.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2019-09-21PCI: Add pci_irq_vector() and other stubs when !CONFIG_PCIHerbert Xu1-13/+26
Add stub functions pci_alloc_irq_vectors_affinity() and pci_irq_vector() when CONFIG_PCI is off so drivers can use them without resorting to ifdefs. Also move the PCI_IRQ_* macros outside of the ifdefs so they are always available. Fixes: 625f269a5a7a ("crypto: inside-secure - add support for PCI based FPGA development board") Link: https://lore.kernel.org/r/20190904122600.GA28660@gondor.apana.org.au Reported-by: kbuild test robot <lkp@intel.com> Reported-by: YueHaibing <yuehaibing@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2019-09-20MIPS: Detect bad _PFN_SHIFT valuesPaul Burton1-0/+6
2 recent commits have fixed issues where _PFN_SHIFT grew too large due to the introduction of too many pgprot bits in our PTEs for some MIPS32 kernel configurations. Tracking down such issues can be tricky, so add a BUILD_BUG_ON() to help. Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: linux-mips@vger.kernel.org
2019-09-20MIPS: Disable pte_special() for MIPS32 with RiXiPaul Burton2-2/+14
Commit 61cbfff4b1a7 ("MIPS: pte_special()/pte_mkspecial() support") added a _PAGE_SPECIAL bit to the pgprot bits of our PTEs. Unfortunately for MIPS32 configurations with RiXi support this pushed the number of pgprot bits to 13. Since the PFN field in EntryLo begins at bit 12 this results in us shifting the most significant bit of the physical address beyond the end of the PTE, leading any mapped access to a physical address above 2GB to incorrectly access an address 2GB lower than intended. For now, disable the pte_special() support for MIPS32 configurations that support RiXi. Fixes: 61cbfff4b1a7 ("MIPS: pte_special()/pte_mkspecial() support") Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Dmitry Korotin <dkorotin@wavecomp.com> Cc: linux-mips@vger.kernel.org
2019-09-20arm64: tegra: Add PCIe slot supply information in p2972-0000 platformVidya Sagar2-1/+27
Add 3.3V and 12V supplies regulators information of x16 PCIe slot in p2972-0000 platform which is owned by C5 controller and also enable C5 controller. Signed-off-by: Vidya Sagar <vidyas@nvidia.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Andrew Murray <andrew.murray@arm.com>
2019-09-20arm64: tegra: Add configuration for PCIe C5 sideband signalsVidya Sagar1-1/+37
Add support to configure PCIe C5's sideband signals PERST# and CLKREQ# as output and bi-directional signals respectively which unlike other PCIe controllers sideband signals are not configured by default. Signed-off-by: Vidya Sagar <vidyas@nvidia.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Andrew Murray <andrew.murray@arm.com>
2019-09-20PCI: tegra: Add support to enable slot regulatorsVidya Sagar1-0/+83
Add support to get regulator information of 3.3V and 12V supplies of a PCIe slot from the respective controller's device-tree node and enable those supplies. This is required in platforms like p2972-0000 where the supplies to x16 slot owned by C5 controller need to be enabled before attempting to enumerate the devices. Signed-off-by: Vidya Sagar <vidyas@nvidia.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Andrew Murray <andrew.murray@arm.com> Acked-by: Thierry Reding <treding@nvidia.com>
2019-09-20PCI: tegra: Add support to configure sideband pinsVidya Sagar1-2/+10
Add support to configure sideband signal pins when the information is present in the respective controller device-tree node. Signed-off-by: Vidya Sagar <vidyas@nvidia.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> [bhelgaas: fold in YueHaibing's fix for build error without CONFIG_PINCTRL; https://lore.kernel.org/r/20190920014807.38288-1-yuehaibing@huawei.com] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Andrew Murray <andrew.murray@arm.com> Acked-by: Thierry Reding <treding@nvidia.com>
2019-09-20lz4: do not export static symbolLinus Torvalds1-1/+0
Kbuild now complains (rightly) about it. Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2019-09-20crypto: hisilicon - avoid unused function warningArnd Bergmann1-5/+2
The only caller of hisi_zip_vf_q_assign() is hidden in an #ifdef, so the function causes a warning when CONFIG_PCI_IOV is disabled: drivers/crypto/hisilicon/zip/zip_main.c:740:12: error: unused function 'hisi_zip_vf_q_assign' [-Werror,-Wunused-function] Replace the #ifdef with an IS_ENABLED() check that leads to the function being dropped based on the configuration. Fixes: 79e09f30eeba ("crypto: hisilicon - add SRIOV support for ZIP") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2019-09-20hwrng: core - don't wait on add_early_randomness()Laurent Vivier1-1/+1
add_early_randomness() is called by hwrng_register() when the hardware is added. If this hardware and its module are present at boot, and if there is no data available the boot hangs until data are available and can't be interrupted. For instance, in the case of virtio-rng, in some cases the host can be not able to provide enough entropy for all the guests. We can have two easy ways to reproduce the problem but they rely on misconfiguration of the hypervisor or the egd daemon: - if virtio-rng device is configured to connect to the egd daemon of the host but when the virtio-rng driver asks for data the daemon is not connected, - if virtio-rng device is configured to connect to the egd daemon of the host but the egd daemon doesn't provide data. The guest kernel will hang at boot until the virtio-rng driver provides enough data. To avoid that, call rng_get_data() in non-blocking mode (wait=0) from add_early_randomness(). Signed-off-by: Laurent Vivier <lvivier@redhat.com> Fixes: d9e797261933 ("hwrng: add randomness to system from rng...") Cc: <stable@vger.kernel.org> Reviewed-by: Theodore Ts'o <tytso@mit.edu> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2019-09-20crypto: hisilicon - Fix return value check in hisi_zip_acompress()Yunfeng Ye1-2/+2
The return valude of add_comp_head() is int, but @head_size is size_t, which is a unsigned type. size_t head_size; ... if (head_size < 0) // it will never work return -ENOMEM Modify the type of @head_size to int, then change the type to size_t when invoke hisi_zip_create_req() as a parameter. Fixes: 62c455ca853e ("crypto: hisilicon - add HiSilicon ZIP accelerator support") Signed-off-by: Yunfeng Ye <yeyunfeng@huawei.com> Acked-by: Zhou Wang <wangzhou1@hisilicon.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2019-09-20crypto: hisilicon - Matching the dma address for dma_pool_free()Yunfeng Ye1-25/+19
When dma_pool_zalloc() fail in sec_alloc_and_fill_hw_sgl(), dma_pool_free() is invoked, but the parameters that sgl_current and sgl_current->next_sgl is not match. Using sec_free_hw_sgl() instead of the original free routine. Fixes: 915e4e8413da ("crypto: hisilicon - SEC security accelerator driver") Signed-off-by: Yunfeng Ye <yeyunfeng@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2019-09-20crypto: hisilicon - Fix double free in sec_free_hw_sgl()Yunfeng Ye1-6/+7
There are two problems in sec_free_hw_sgl(): First, when sgl_current->next is valid, @hw_sgl will be freed in the first loop, but it free again after the loop. Second, sgl_current and sgl_current->next_sgl is not match when dma_pool_free() is invoked, the third parameter should be the dma address of sgl_current, but sgl_current->next_sgl is the dma address of next chain, so use sgl_current->next_sgl is wrong. Fix this by deleting the last dma_pool_free() in sec_free_hw_sgl(), modifying the condition for while loop, and matching the address for dma_pool_free(). Fixes: 915e4e8413da ("crypto: hisilicon - SEC security accelerator driver") Signed-off-by: Yunfeng Ye <yeyunfeng@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2019-09-20crypto: inside-secure - Fix unused variable warning when CONFIG_PCI=nPascal van Leeuwen1-11/+29
This patch fixes an unused variable warning from the compiler when the driver is being compiled without PCI support in the kernel. Fixes: 625f269a5a7a ("crypto: inside-secure - add support for...") Signed-off-by: Pascal van Leeuwen <pvanleeuwen@verimatrix.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2019-09-20crypto: talitos - fix missing break in switch statementGustavo A. R. Silva1-0/+1
Add missing break statement in order to prevent the code from falling through to case CRYPTO_ALG_TYPE_AHASH. Fixes: aeb4c132f33d ("crypto: talitos - Convert to new AEAD interface") Cc: stable@vger.kernel.org Reported-by: kbuild test robot <lkp@intel.com> Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Reviewed-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2019-09-19clk: Drop !clk checks in debugfs dumpingStephen Boyd1-12/+0
These recursive functions have checks for !clk being passed in, but the callers are always looping through lists and therefore the pointers can't be NULL. Drop the checks to simplify the code. Signed-off-by: Stephen Boyd <sboyd@kernel.org> Link: https://lkml.kernel.org/r/20190826234729.145593-1-sboyd@kernel.org
2019-09-19Hexagon: change maintainer to Brian CainBrian Cain1-2/+1
Signed-off-by: Brian Cain <bcain@codeaurora.org> Signed-off-by: Richard Kuo <rkuo@codeaurora.org>
2019-09-19selftests/ftrace: Update kprobe event error testcaseMasami Hiramatsu1-0/+1
Update kprobe event error testcase to test if it correctly finds the exact same probe event. Link: http://lkml.kernel.org/r/156879695513.31056.1580235733738840126.stgit@devnote2 Signed-off-by: Masami Hiramatsu <mhiramat@kernel.org> Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
2019-09-19tracing/probe: Reject exactly same probe eventMasami Hiramatsu3-17/+90
Reject exactly same probe events as existing probes. Multiprobe allows user to define multiple probes on same event. If user appends a probe which exactly same definition (same probe address and same arguments) on existing event, the event will record same probe information twice. That can be confusing users, so reject it. Link: http://lkml.kernel.org/r/156879694602.31056.5533024778165036763.stgit@devnote2 Signed-off-by: Masami Hiramatsu <mhiramat@kernel.org> Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
2019-09-19tracing/probe: Fix to allow user to enable events on unloaded modulesMasami Hiramatsu1-12/+5
Fix to allow user to enable probe events on unloaded modules. This operations was allowed before commit 60d53e2c3b75 ("tracing/probe: Split trace_event related data from trace_probe"), because if users need to probe module init functions, they have to enable those probe events before loading module. Link: http://lkml.kernel.org/r/156879693733.31056.9331322616994665167.stgit@devnote2 Cc: stable@vger.kernel.org Fixes: 60d53e2c3b75 ("tracing/probe: Split trace_event related data from trace_probe") Signed-off-by: Masami Hiramatsu <mhiramat@kernel.org> Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
2019-09-19of: restore old handling of cells_name=NULL in of_*_phandle_with_args()Uwe Kleine-König1-2/+33
Before commit e42ee61017f5 ("of: Let of_for_each_phandle fallback to non-negative cell_count") the iterator functions calling of_for_each_phandle assumed a cell count of 0 if cells_name was NULL. This corner case was missed when implementing the fallback logic in e42ee61017f5 and resulted in an endless loop. Restore the old behaviour of of_count_phandle_with_args() and of_parse_phandle_with_args() and add a check to of_phandle_iterator_init() to prevent a similar failure as a safety precaution. of_parse_phandle_with_args_map() doesn't need a similar fix as cells_name isn't NULL there. Affected drivers are: - drivers/base/power/domain.c - drivers/base/power/domain.c - drivers/clk/ti/clk-dra7-atl.c - drivers/hwmon/ibmpowernv.c - drivers/i2c/muxes/i2c-demux-pinctrl.c - drivers/iommu/mtk_iommu.c - drivers/net/ethernet/freescale/fman/mac.c - drivers/opp/of.c - drivers/perf/arm_dsu_pmu.c - drivers/regulator/of_regulator.c - drivers/remoteproc/imx_rproc.c - drivers/soc/rockchip/pm_domains.c - sound/soc/fsl/imx-audmix.c - sound/soc/fsl/imx-audmix.c - sound/soc/meson/axg-card.c - sound/soc/samsung/tm2_wm5110.c - sound/soc/samsung/tm2_wm5110.c Thanks to Geert Uytterhoeven for reporting the issue, Peter Rosin for helping pinpoint the actual problem and the testers for confirming this fix. Fixes: e42ee61017f5 ("of: Let of_for_each_phandle fallback to non-negative cell_count") Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Tested-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Rob Herring <robh@kernel.org>
2019-09-19powerpc/mm/mce: Keep irqs disabled during lockless page table walkAneesh Kumar K.V1-8/+12
__find_linux_mm_pte() returns a page table entry pointer after walking the page table without holding locks. To make it safe against a THP split and/or collapse, we disable interrupts around the lockless page table walk. However we need to keep interrupts disabled as long as we use the page table entry pointer that is returned. Fix addr_to_pfn() to do that. Fixes: ba41e1e1ccb9 ("powerpc/mce: Hookup derror (load/store) UE errors") Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com> [mpe: Rearrange code slightly and tweak change log wording] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20190918145328.28602-1-aneesh.kumar@linux.ibm.com
2019-09-18HID: core: fix dmesg flooding if report field larger than 32bitJoshua Clayton1-2/+2
Only warn once of oversize hid report value field On HP spectre x360 convertible the message: hid-sensor-hub 001F:8087:0AC2.0002: hid_field_extract() called with n (192) > 32! (kworker/1:2) is continually printed many times per second, crowding out all else. Protect dmesg by printing the warning only one time. The size of the hid report field data structure should probably be increased. The data structure is treated as a u32 in Linux, but an unlimited number of bits in the USB hid spec, so there is some rearchitecture needed now that devices are sending more than 32 bits. Signed-off-by: Joshua Clayton <stillcompiling@gmail.com> Signed-off-by: Benjamin Tissoires <benjamin.tissoires@redhat.com>
2019-09-18HID: core: Add printk_once variants to hid_warn() etcJoshua Clayton1-0/+11
hid_warn_once() is needed. Add the others as part of the block. Signed-off-by: Joshua Clayton <stillcompiling@gmail.com> Signed-off-by: Benjamin Tissoires <benjamin.tissoires@redhat.com>
2019-09-18HID: core: reformat and reduce hid_printk macrosJoshua Clayton1-20/+12
Reformat hid_printk macros to use standard __VA_ARGS__ syntax. Per Joe Perches hid_printk(), hid_emerg(), hid_crit(), and hid_alert() are unlikely ever to be used. Remove them. Signed-off-by: Joshua Clayton <stillcompiling@gmail.com> Signed-off-by: Benjamin Tissoires <benjamin.tissoires@redhat.com>
2019-09-18KVM: coalesced_mmio: add bounds checkingMatt Delco1-8/+11
The first/last indexes are typically shared with a user app. The app can change the 'last' index that the kernel uses to store the next result. This change sanity checks the index before using it for writing to a potentially arbitrary address. This fixes CVE-2019-14821. Cc: stable@vger.kernel.org Fixes: 5f94c1741bdc ("KVM: Add coalesced MMIO support (common part)") Signed-off-by: Matt Delco <delco@chromium.org> Signed-off-by: Jim Mattson <jmattson@google.com> Reported-by: syzbot+983c866c3dd6efa3662a@syzkaller.appspotmail.com [Use READ_ONCE. - Paolo] Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-09-18arm64: Fix reference to docs for ARM64_TAGGED_ADDR_ABIJeremy Cline1-1/+1
The referenced file does not exist, but tagged-address-abi.rst does. Signed-off-by: Jeremy Cline <jcline@redhat.com> Signed-off-by: Will Deacon <will@kernel.org>
2019-09-17clk: imx: imx8mn: fix pll mux bitPeng Fan1-22/+10
pll BYPASS bit should be kept inside pll driver for glitchless freq setting following spec. If exposing the bit, that means pll driver and clk driver has two paths to touch this bit, which is wrong. So use EXT_BYPASS bit here. And drop uneeded set parent, because EXT_BYPASS default is 0. Suggested-by: Jacky Bai <ping.bai@nxp.com> Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Link: https://lkml.kernel.org/r/1568043491-20680-5-git-send-email-peng.fan@nxp.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-09-17clk: imx: imx8mm: fix pll mux bitPeng Fan1-22/+10
pll BYPASS bit should be kept inside pll driver for glitchless freq setting following spec. If exposing the bit, that means pll driver and clk driver has two paths to touch this bit, which is wrong. So use EXT_BYPASS bit here. And drop uneeded set parent, because EXT_BYPASS default is 0. Fixes: ba5625c3e272 ("clk: imx: Add clock driver support for imx8mm") Suggested-by: Jacky Bai <ping.bai@nxp.com> Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Link: https://lkml.kernel.org/r/1568043491-20680-4-git-send-email-peng.fan@nxp.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-09-17clk: imx: clk-pll14xx: unbypass PLL by defaultPeng Fan1-0/+5
When registering the PLL, unbypass the PLL. The PLL has two bypass control bit, BYPASS and EXT_BYPASS. we will expose EXT_BYPASS to clk driver for mux usage, and keep BYPASS inside pll14xx usage. The PLL has a restriction that when M/P change, need to RESET/BYPASS pll to avoid glitch, so we could not expose BYPASS. To make it easy for clk driver usage, unbypass PLL which does not hurt current function. Fixes: 8646d4dcc7fb ("clk: imx: Add PLLs driver for imx8mm soc") Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Link: https://lkml.kernel.org/r/1568043491-20680-3-git-send-email-peng.fan@nxp.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-09-17clk: imx: pll14xx: avoid glitch when set ratePeng Fan1-1/+21
According to PLL1443XA and PLL1416X spec, "When BYPASS is 0 and RESETB is changed from 0 to 1, FOUT starts to output unstable clock until lock time passes. PLL1416X/PLL1443XA may generate a glitch at FOUT." So set BYPASS when RESETB is changed from 0 to 1 to avoid glitch. In the end of set rate, BYPASS will be cleared. When prepare clock, also need to take care to avoid glitch. So we also follow Spec to set BYPASS before RESETB changed from 0 to 1. And add a check if the RESETB is already 0, directly return 0; Fixes: 8646d4dcc7fb ("clk: imx: Add PLLs driver for imx8mm soc") Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Link: https://lkml.kernel.org/r/1568043491-20680-2-git-send-email-peng.fan@nxp.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-09-17clk: mvebu: ap80x: add AP807 clock supportBen Peled1-0/+28
Add driver support for AP807 clock. Signed-off-by: Ben Peled <bpeled@marvell.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lkml.kernel.org/r/20190805100310.29048-9-miquel.raynal@bootlin.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-09-17clk: mvebu: ap806: Prepare the introduction of AP807 clock supportBen Peled1-63/+77
Factor out the code that is only useful to AP806 so it will be easier to support AP807. No functional changes. Signed-off-by: Ben Peled <bpeled@marvell.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lkml.kernel.org/r/20190805100310.29048-8-miquel.raynal@bootlin.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-09-17clk: mvebu: ap806: add AP-DCLK (hclk) to system controller driverOmri Itach1-2/+46
Add dynamic AP-DCLK clock (hclk) to system controller driver. AP-DCLK is half the rate of DDR clock, so its derrived from Sample At Reset configuration. The clock frequency is required for AP806 AXI monitor profiling feature. Signed-off-by: Omri Itach <omrii@marvell.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lkml.kernel.org/r/20190805100310.29048-7-miquel.raynal@bootlin.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-09-17clk: mvebu: ap806: be more explicit on what SaR isMiquel Raynal1-1/+1
"SaR" means Sample at Reset. DIP switches can be changed on the board, their states at reset time is available through a register read. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lkml.kernel.org/r/20190805100310.29048-6-miquel.raynal@bootlin.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-09-17clk: mvebu: ap80x-cpu: add AP807 CPU clock supportBen Peled1-2/+57
Enhance the ap-cpu-clk driver to support both AP806 and AP807 CPU clocks. Signed-off-by: Ben Peled <bpeled@marvell.com> [<miquel.raynal@bootlin.com>: use device data instead of conditions on the compatible] Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lkml.kernel.org/r/20190805100310.29048-5-miquel.raynal@bootlin.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-09-17clk: mvebu: ap806-cpu: prepare mapping of AP807 CPU clockChristine Gharzuzi1-20/+62
This patch allows same flow to be executed on chips with different register mappings like AP806 and, in the future, AP807. Note: this patch has no functional effect, and only prepares the driver for additional chips to be supported by retrieving the right device data depenging on the compatible property. Signed-off-by: Christine Gharzuzi <chrisg@marvell.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lkml.kernel.org/r/20190805100310.29048-4-miquel.raynal@bootlin.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-09-17dt-bindings: ap806: Document AP807 clock compatibleMiquel Raynal1-3/+5
Add AP807 clock compatible to the bindings. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lkml.kernel.org/r/20190805100310.29048-3-miquel.raynal@bootlin.com Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-09-17dt-bindings: ap80x: Document AP807 CPU clock compatibleMiquel Raynal1-3/+6
Add AP807 CPU clock compatible to the bindings. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lkml.kernel.org/r/20190805100310.29048-2-miquel.raynal@bootlin.com Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-09-17clk: sprd: add missing kfreeChunyan Zhang1-0/+2
The number of config registers for different pll clocks probably are not same, so we have to use malloc, and should free the memory before return. Fixes: 3e37b005580b ("clk: sprd: add adjustable pll support") Signed-off-by: Chunyan Zhang <chunyan.zhang@unisoc.com> Signed-off-by: Chunyan Zhang <zhang.lyra@gmail.com> Link: https://lkml.kernel.org/r/20190905103009.27166-1-zhang.lyra@gmail.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-09-17clk: at91: allow 24 Mhz clock as input for PLLEugen Hristev1-1/+1
The PLL input range needs to be able to allow 24 Mhz crystal as input Update the range accordingly in plla characteristics struct Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com> Link: https://lkml.kernel.org/r/1568183622-7858-1-git-send-email-eugen.hristev@microchip.com Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Fixes: c561e41ce4d2 ("clk: at91: add sama5d2 PMC driver") Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-09-18powerpc: Use ftrace_graph_ret_addr() when unwindingNaveen N. Rao1-13/+6
With support for HAVE_FUNCTION_GRAPH_RET_ADDR_PTR, ftrace_graph_ret_addr() provides more robust unwinding when function graph is in use. Update show_stack() to use the same. With dump_stack() added to sysrq_sysctl_handler(), before this patch: root@(none):/sys/kernel/debug/tracing# cat /proc/sys/kernel/sysrq CPU: 0 PID: 218 Comm: cat Not tainted 5.3.0-rc7-00868-g8453ad4a078c-dirty #20 Call Trace: [c0000000d1e13c30] [c00000000006ab98] return_to_handler+0x0/0x40 (dump_stack+0xe8/0x164) (unreliable) [c0000000d1e13c80] [c000000000145680] sysrq_sysctl_handler+0x48/0xb8 [c0000000d1e13cd0] [c00000000006ab98] return_to_handler+0x0/0x40 (proc_sys_call_handler+0x274/0x2a0) [c0000000d1e13d60] [c00000000006ab98] return_to_handler+0x0/0x40 (return_to_handler+0x0/0x40) [c0000000d1e13d80] [c00000000006ab98] return_to_handler+0x0/0x40 (__vfs_read+0x3c/0x70) [c0000000d1e13dd0] [c00000000006ab98] return_to_handler+0x0/0x40 (vfs_read+0xb8/0x1b0) [c0000000d1e13e20] [c00000000006ab98] return_to_handler+0x0/0x40 (ksys_read+0x7c/0x140) After this patch: Call Trace: [c0000000d1e33c30] [c00000000006ab58] return_to_handler+0x0/0x40 (dump_stack+0xe8/0x164) (unreliable) [c0000000d1e33c80] [c000000000145680] sysrq_sysctl_handler+0x48/0xb8 [c0000000d1e33cd0] [c00000000006ab58] return_to_handler+0x0/0x40 (proc_sys_call_handler+0x274/0x2a0) [c0000000d1e33d60] [c00000000006ab58] return_to_handler+0x0/0x40 (__vfs_read+0x3c/0x70) [c0000000d1e33d80] [c00000000006ab58] return_to_handler+0x0/0x40 (vfs_read+0xb8/0x1b0) [c0000000d1e33dd0] [c00000000006ab58] return_to_handler+0x0/0x40 (ksys_read+0x7c/0x140) [c0000000d1e33e20] [c00000000006ab58] return_to_handler+0x0/0x40 (system_call+0x5c/0x68) Signed-off-by: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/dc89c9a887121342d9c7819482c3dabdece2a323.1567707399.git.naveen.n.rao@linux.vnet.ibm.com
2019-09-18powerpc/ftrace: Enable HAVE_FUNCTION_GRAPH_RET_ADDR_PTRNaveen N. Rao7-4/+11
This associates entries in the ftrace_ret_stack with corresponding stack frames, enabling more robust stack unwinding. Also update the only user of ftrace_graph_ret_addr() to pass the stack pointer. Signed-off-by: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/0224f2d0971b069c678e2ff678cfc2cd1e114cfe.1567707399.git.naveen.n.rao@linux.vnet.ibm.com
2019-09-18ftrace: Look up the address of return_to_handler() using helpersNaveen N. Rao1-2/+2
This ensures that we use the right address on architectures that use function descriptors. Signed-off-by: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> Acked-by: Steven Rostedt (VMware) <rostedt@goodmis.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/8f6f14d192a994008ac370ce14036bbe67224c7d.1567707399.git.naveen.n.rao@linux.vnet.ibm.com
2019-09-17rpmsg: glink-smem: Name the edge based on parent remoteprocBjorn Andersson1-1/+1
Naming the glink edge device on the parent of_node short name causes collisions when multiple remoteproc instances with only different unit address are described on the platform_bus in DeviceTree. Base the edge's name on the parent remoteproc's name instead, to ensure that it's unique. Reviewed-by: Niklas Cassel <niklas.cassel@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-09-17f2fs: add a condition to detect overflow in f2fs_ioc_gc_range()Sahitya Tummala1-2/+2
end = range.start + range.len; If the range.start/range.len is a very large value, then end can overflow in this operation. It results into a crash in get_valid_blocks() when accessing the invalid range.start segno. This issue is reported in ioctl fuzz testing. Signed-off-by: Sahitya Tummala <stummala@codeaurora.org> Reviewed-by: Chao Yu <yuchao0@huawei.com> Signed-off-by: Jaegeuk Kim <jaegeuk@kernel.org>
2019-09-17clk: Make clk_bulk_get_all() return a valid "id"Bjorn Andersson1-1/+4
The adreno driver expects the "id" field of the returned clk_bulk_data to be filled in with strings from the clock-names property. But due to the use of kmalloc_array() in of_clk_bulk_get_all() it receives a list of bogus pointers instead. Zero-initialize the "id" field and attempt to populate with strings from the clock-names property to resolve both these issues. Fixes: 616e45df7c4a ("clk: add new APIs to operate on all available clocks") Fixes: 8e3e791d20d2 ("drm/msm: Use generic bulk clock function") Cc: Dong Aisheng <aisheng.dong@nxp.com> Cc: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lkml.kernel.org/r/20190913024029.2640-1-bjorn.andersson@linaro.org Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-09-17clk: actions: Fix factor clk struct member accessManivannan Sadhasivam1-4/+3
Since the helper "owl_factor_helper_round_rate" is shared between factor and composite clocks, using the factor clk specific helper function like "hw_to_owl_factor" to access its members will create issues when called from composite clk specific code. Hence, pass the "factor_hw" struct pointer directly instead of fetching it using factor clk specific helpers. This issue has been observed when a composite clock like "sd0_clk" tried to call "owl_factor_helper_round_rate" resulting in pointer dereferencing error. While we are at it, let's rename the "clk_val_best" function to "owl_clk_val_best" since this is an owl SoCs specific helper. Fixes: 4bb78fc9744a ("clk: actions: Add factor clock support") Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Link: https://lkml.kernel.org/r/20190916154546.24982-2-manivannan.sadhasivam@linaro.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>