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2020-03-21tools/power turbostat: update versionLen Brown1-1/+1
A stitch in time saves nine. Signed-off-by: Len Brown <len.brown@intel.com>
2020-03-21tools/power turbostat: Print cpuidle informationLen Brown1-0/+26
Print cpuidle driver and governor. Originally-by: Antti Laakso <antti.laakso@linux.intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2020-03-20tools/power turbostat: Fix 32-bit capabilities warningLen Brown2-17/+31
warning: `turbostat' uses 32-bit capabilities (legacy support in use) Signed-off-by: Len Brown <len.brown@intel.com>
2020-03-20tools/power turbostat: Fix missing SYS_LPI counter on some ChromebooksLen Brown1-9/+14
Some Chromebook BIOS' do not export an ACPI LPIT, which is how Linux finds the residency counter for CPU and SYSTEM low power states, that is exports in /sys/devices/system/cpu/cpuidle/*residency_us When these sysfs attributes are missing, check the debugfs attrubte from the pmc_core driver, which accesses the same counter value. Signed-off-by: Len Brown <len.brown@intel.com>
2020-03-20tools/power turbostat: Support Elkhart LakeChen Yu1-1/+30
From a turbostat point of view the Tremont-based Elkhart Lake is very similar to Goldmont, reuse the code of Goldmont. Elkhart Lake does not support 'group turbo limit counter' nor C3, adjust the code accordingly. Signed-off-by: Chen Yu <yu.c.chen@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2020-03-20tools/power turbostat: Support Jasper LakeChen Yu1-0/+3
Jasper Lake, like Elkhart Lake, uses a Tremont CPU. So reuse the code. Signed-off-by: Chen Yu <yu.c.chen@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2020-03-20tools/power turbostat: Support Ice Lake serverChen Yu1-0/+3
From a turbostat point of view, Ice Lake server looks like Sky Lake server. Signed-off-by: Chen Yu <yu.c.chen@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2020-03-20tools/power turbostat: Support Tiger LakeChen Yu1-0/+2
From a turbostat point of view, Tiger Lake looks like Ice Lake. Signed-off-by: Chen Yu <yu.c.chen@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2020-03-20tools/power turbostat: Fix gcc build warningsLen Brown1-2/+2
Warning: ‘__builtin_strncpy’ specified bound 20 equals destination size [-Wstringop-truncation] reduce param to strncpy, to guarantee that a null byte is always copied into destination buffer. Signed-off-by: Len Brown <len.brown@intel.com>
2020-03-20tools/power turbostat: Support CometlakeChen Yu1-0/+2
From a turbostat point of view, Cometlake is like Kabylake. Suggested-by: Rui Zhang <rui.zhang@intel.com> Signed-off-by: Chen Yu <yu.c.chen@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2020-03-02cpupower: avoid multiple definition with gcc -fno-commonMike Gilbert4-3/+5
Building cpupower with -fno-common in CFLAGS results in errors due to multiple definitions of the 'cpu_count' and 'start_time' variables. ./utils/idle_monitor/snb_idle.o:./utils/idle_monitor/cpupower-monitor.h:28: multiple definition of `cpu_count'; ./utils/idle_monitor/nhm_idle.o:./utils/idle_monitor/cpupower-monitor.h:28: first defined here ... ./utils/idle_monitor/cpuidle_sysfs.o:./utils/idle_monitor/cpuidle_sysfs.c:22: multiple definition of `start_time'; ./utils/idle_monitor/amd_fam14h_idle.o:./utils/idle_monitor/amd_fam14h_idle.c:85: first defined here The -fno-common option will be enabled by default in GCC 10. Bug: https://bugs.gentoo.org/707462 Signed-off-by: Mike Gilbert <floppym@gentoo.org> Signed-off-by: Shuah Khan <skhan@linuxfoundation.org>
2020-01-28tools/power/x86/intel_pstate_tracer: change several graphs to autoscale y-axisDoug Smythies1-9/+7
Processors have exceeded some of the fixed y-axis scale maximum values. Change them to autoscale the y-axis. Signed-off-by: Doug Smythies <dsmythies@telus.net> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2020-01-28tools/power/x86/intel_pstate_tracer: changes for python 3 compatibilityDoug Smythies1-11/+11
Some syntax needs to be more rigorous for python 3. Backwards compatibility tested with python 2.7 Signed-off-by: Doug Smythies <dsmythies@telus.net> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2020-01-27Correction to manpage of cpupowerBrahadambal Srinivasan1-3/+3
Manpage of cpupower is listing wrong sub-commands in "See Also" section. The option for cpupower-idle(1) should actually be cpupower-idle-info(1) and cpupower-idle-set(1). This patch corrects this anomaly. Signed-off-by: Brahadambal Srinivasan <latha@linux.vnet.ibm.com> Signed-off-by: Shuah Khan <skhan@linuxfoundation.org>
2020-01-20tools/power/x86/intel-speed-select: Update versionSrinivas Pandruvada1-1/+1
As we added new set of mailbox commands, increment version. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-01-20tools/power/x86/intel-speed-select: Change the order for clos disableSrinivas Pandruvada1-16/+14
In turbo-freq or base-freq auto mode, for disable, first disable the feature and then disable clos. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-01-20tools/power/x86/intel-speed-select: Fix result display for turbo-freq auto modeSrinivas Pandruvada2-8/+10
The turbo-freq enable with auto mode, prints result for the last possible CPU, which is not correct when either CPU is not present or user wants command to be limited to a single die/package. For example, in the below command user wants to limit to die/package 0, but the "turbo-freq --auto" result is displayed using the other package. $ sudo intel-speed-select -c 0 turbo-freq enable -a Intel(R) Speed Select Technology package-0 die-0 cpu-0 turbo-freq enable:success package--1 die-0 cpu-31 turbo-freq --auto enable:success Since we do have to traverse all CPUs, don't display CPU info for "turbo-freq --auto", as we already displayed the result for turbo-freq enable with the CPU information. With the fix, the same command results in: $ sudo intel-speed-select -c 0 turbo-freq enable -a Intel(R) Speed Select Technology package-0 die-0 cpu-0 turbo-freq enable:success turbo-freq --auto enable:success Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-01-20tools/power/x86/intel-speed-select: Add support for core-power discoverySrinivas Pandruvada3-0/+72
It is possible that BIOS may not enable core-power feature. In this case this additional interface will allow to enable from this utility. Also the information dump, includes the current status of core-power. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-01-17cpupower: Revert library ABI changes from commit ae2917093fb60bdc1ed3eThomas Renninger3-23/+87
Commit ae2917093fb6 ("tools/power/cpupower: Display boost frequency separately") modified the library function: struct cpufreq_available_frequencies *cpufreq_get_available_frequencies(unsigned int cpu) to struct cpufreq_frequencies *cpufreq_get_frequencies(const char *type, unsigned int cpu) This patch recovers the old API and implements the new functionality in a newly introduce method: struct cpufreq_boost_frequencies *cpufreq_get_available_frequencies(unsigned int cpu) This one should get merged into stable kernels back to 5.0 when the above had been introduced. Fixes: ae2917093fb6 ("tools/power/cpupower: Display boost frequency separately") Cc: stable@vger.kernel.org Signed-off-by: Thomas Renninger <trenn@suse.de> Signed-off-by: Shuah Khan <skhan@linuxfoundation.org>
2020-01-13tools/x86: Sync msr-index.h from kernel sourcesSean Christopherson1-2/+2
Sync msr-index.h to pull in recent renames of the IA32_FEATURE_CONTROL MSR definitions. Update KVM's VMX selftest and turbostat accordingly. Keep the full name in turbostat's output to avoid breaking someone's workflow, e.g. if a script is looking for the full name. While using the renamed defines is by no means necessary, do the sync now to avoid leaving a landmine that will get stepped on the next time msr-index.h needs to be refreshed for some other reason. No functional change intended. Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lkml.kernel.org/r/20191221044513.21680-4-sean.j.christopherson@intel.com
2020-01-13ACPICA: All acpica: Update copyrights to 2020 Including tool signons.Bob Moore10-10/+10
ACPICA commit 8b9c69d0984067051ffbe8526f871448ead6a26b Link: https://github.com/acpica/acpica/commit/8b9c69d0 Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Kaneda <erik.kaneda@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2019-12-17tools/power/acpi: fix compilation errorZhengyuan Liu1-1/+1
If we compile tools/acpi target in the top source directory, we'd get a compilation error showing as bellow: # make tools/acpi DESCEND power/acpi DESCEND tools/acpidbg CC tools/acpidbg/acpidbg.o Assembler messages: Fatal error: can't create /home/lzy/kernel-upstream/power/acpi/\ tools/acpidbg/acpidbg.o: No such file or directory ../../Makefile.rules:26: recipe for target '/home/lzy/kernel-upstream/\ power/acpi/tools/acpidbg/acpidbg.o' failed make[3]: *** [/home/lzy/kernel-upstream//power/acpi/tools/acpidbg/\ acpidbg.o] Error 1 Makefile:19: recipe for target 'acpidbg' failed make[2]: *** [acpidbg] Error 2 Makefile:54: recipe for target 'acpi' failed make[1]: *** [acpi] Error 2 Makefile:1607: recipe for target 'tools/acpi' failed make: *** [tools/acpi] Error 2 Fixes: d5a4b1a540b8 ("tools/power/acpi: Remove direct kernel source include reference") Signed-off-by: Zhengyuan Liu <liuzhengyuan@kylinos.cn> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2019-11-21tools/power/x86/intel-speed-select: Display TRL buckets for just base config levelSrinivas Pandruvada1-0/+1
When only base config level is present, this tool is displaying TRL (Turbo-ratio-limits) by reading legacy MSR. In this case, also present core count for TRL by reading MSR 0x1AE. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2019-11-21tools/power/x86/intel-speed-select: Ignore missing config levelSrinivas Pandruvada2-5/+6
It is possible that certain config levels are not available, even if the max level includes the level. There can be missing levels in some platforms. So ignore the level when called for information dump for all levels and fail if specifically ask for the missing level. Here the changes is to continue reading information about other levels even if we fail to get information for the current level. But use the "processed" flag to indicate the failure. When the "processed" flag is not set, don't dump information about that level. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2019-11-07tools/power/x86/intel-speed-select: Increment versionSrinivas Pandruvada1-1/+1
Since the tool now adds support for another Intel SST implementation, increment version number. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2019-11-07tools/power/x86/intel-speed-select: Use core count for base-freq maskSrinivas Pandruvada3-3/+28
Some firmware implementation gives error when a command is sent get mask for core count 32-61. So use core count to decide. But there is no function to get core count. So introduce one function to get core count. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2019-11-07tools/power/x86/intel-speed-select: Support platform with limited Intel(R) Speed SelectSrinivas Pandruvada4-60/+113
There are some platforms, where there limited support of Intel(R) SST features. Here perf-profile has only one base configuration and limited support of commands. But still has support for discovery of base-freq and turbo-freq features. So it is important to show minimum features to use base-freq and turbo-freq features. Here the change are: - When there is no support of CONFIG_TDP_GET_LEVELS_INFO, then instead of treating this as fatal error, treat this with number of config levels = 0, that means only base level 0 is present. - There is no support of mail box commands to get base frequencies or turbo frequencies. Here present base frequency by reading cpufreq base freq and turbo frequency by reading MSR 0x1AD. - Don't display any field, which has value == 0. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2019-11-07tools/power/x86/intel-speed-select: Use Frequency weight for CLOSSrinivas Pandruvada1-6/+6
Use different frequency weights for CLOS 0 and and CLOS1-3, to define relative priority for power budgeting. This will be used for --auto mode to enable base-freq and turbo-freq feature. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2019-11-07tools/power/x86/intel-speed-select: Make CLOS frequency in MHzSrinivas Pandruvada2-7/+10
To be consistant with the other frequency units, change the CLOS unit to MHz instead of ratios. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2019-11-07tools/power/x86/intel-speed-select: Use mailbox for CLOS_PM_QOS_CONFIGSrinivas Pandruvada1-6/+0
Use mailbox to read/write CLOS_PM_QOS_CONFIG instead of read/write to MMIO offset. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2019-11-07tools/power/x86/intel-speed-select: Auto mode for CLXSrinivas Pandruvada1-12/+100
There is an expectation in the CLX platform for SST base-freq feature that Scaling min frequency be different for high and low priority cores. This is the way the firmware will understand the priority. So this change will look at high priority and low priority cores, and set scaling_min_freq to P1High for high priority cores and P1Low to low priority cores. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2019-11-07tools/power/x86/intel-speed-select: Correct CLX-N frequency unitsSrinivas Pandruvada1-3/+3
In CLX_N base_frequency is read from cpufreq sysfs, where units are in KHz. The internal units in the code matches the real ratios which are in 100MHz scale. So when storing units for CLX-N frequencies, convert to 100MHz scale. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2019-11-07tools/power/x86/intel-speed-select: Change display of "avx" to "avx2"Srinivas Pandruvada1-1/+1
Make the avx level display consistent. Except for "turbo-ratio-limits-avx", everywhere else it is avx2. So change "turbo-ratio-limits-avx" to "turbo-ratio-limits-avx2". Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2019-11-07tools/power/x86/intel-speed-select: Extend command set for perf-profileSrinivas Pandruvada2-1/+105
Add support for uncore P0, uncore P1, P1 for base and AVX levels and memory frequency. These commands are optional, so continue on failure. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2019-11-05cpupower: ToDo: Update ToDo with ideas for per_cpu_schedule handlingJanakarajan Natarajan1-0/+14
Based on Thomas Renninger's feedback/ideas. Re-structure the code to better handle the per_cpu_schedule mechanism which was introduced when adding support for AMD Zen based processors. Signed-off-by: Janakarajan Natarajan <Janakarajan.Natarajan@amd.com> Acked-by: Thomas Renninger <trenn@suse.de> Signed-off-by: Shuah Khan <skhan@linuxfoundation.org>
2019-11-05cpupower: mperf_monitor: Update cpupower to use the RDPRU instructionJanakarajan Natarajan3-0/+25
AMD Zen 2 introduces the RDPRU instruction which can be used to access some processor registers which are typically only accessible in privilege level 0. ECX specifies the register to read and EDX:EAX will contain the value read. ECX: 0 - Register MPERF 1 - Register APERF This has the added advantage of not having to use the msr module, since the userspace to kernel transitions which occur during each read_msr() might cause APERF and MPERF to go out of sync. Signed-off-by: Janakarajan Natarajan <Janakarajan.Natarajan@amd.com> Acked-by: Thomas Renninger <trenn@suse.de> Signed-off-by: Shuah Khan <skhan@linuxfoundation.org>
2019-11-05cpupower: mperf_monitor: Introduce per_cpu_schedule flagJanakarajan Natarajan2-10/+33
The per_cpu_schedule flag is used to move the cpupower process to the cpu on which we are looking to read the APERF/MPERF registers. This prevents IPIs from being generated by read_msr()s as we are already on the cpu of interest. Ex: If cpupower is running on CPU 0 and we execute read_msr(20, MSR_APERF, val) then, read_msr(20, MSR_MPERF, val) the msr module will generate an IPI from CPU 0 to CPU 20 to query for the MSR_APERF and then the MSR_MPERF in separate IPIs. This delay, caused by IPI latency, between reading the APERF and MPERF registers may cause both of them to go out of sync. The use of the per_cpu_schedule flag reduces the probability of this from happening. It comes at the cost of a negligible increase in cpu consumption caused by the migration of cpupower across each of the cpus of the system. Signed-off-by: Janakarajan Natarajan <Janakarajan.Natarajan@amd.com> Acked-by: Thomas Renninger <trenn@suse.de> Signed-off-by: Shuah Khan <skhan@linuxfoundation.org>
2019-11-05cpupower: Move needs_root variable into a sub-structJanakarajan Natarajan8-8/+10
Move the needs_root variable into a sub-struct. This is in preparation for adding a new flag for cpuidle_monitor. Update all uses of the needs_root variable to reflect this change. Signed-off-by: Janakarajan Natarajan <Janakarajan.Natarajan@amd.com> Acked-by: Thomas Renninger <trenn@suse.de> Signed-off-by: Shuah Khan <skhan@linuxfoundation.org>
2019-11-04cpupower : Handle set and info subcommands correctlyAbhishek Goel2-0/+18
Cpupower tool has set and info options which are being used only by x86 machines. This patch removes support for these two subcommands from cpupower utility for POWER. Thus, these two subcommands will now be available only for intel. This removes the ambiguous error message while using set option in case of using non-intel systems. Without this patch on a POWER system: root@ubuntu:~# cpupower info System does not support Intel's performance bias setting root@ubuntu:~# cpupower set -b 10 Error setting perf-bias value on CPU With this patch on a POWER box: root@ubuntu:~# cpupower info Subcommand not supported on POWER Same result for set subcommand. This patch does not affect results on a intel box. Signed-off-by: Abhishek Goel <huntbag@linux.vnet.ibm.com> Acked-by: Thomas Renninger <trenn@suse.de> Reviewed-by: Shuah Khan <skhan@linuxfoundation.org> Signed-off-by: Shuah Khan <skhan@linuxfoundation.org>
2019-10-15tools/power/x86/intel-speed-select: Implement base-freq commands on CascadeLake-NPrarit Bhargava1-4/+47
Add functionality for base-freq info|enable|disable info on CascadeLake-N. Sample output: Intel(R) Speed Select Technology Executing on CPU model:85[0x55] package-0 die-0 cpu-0 speed-select-base-freq high-priority-base-frequency(MHz):2700000 high-priority-cpu-mask:00000000,0000e8c0 high-priority-cpu-list:6,7,11,13,14,15 low-priority-base-frequency(MHz):2100000 package-1 die-0 cpu-20 speed-select-base-freq high-priority-base-frequency(MHz):2700000 high-priority-cpu-mask:0000000e,8c000000 high-priority-cpu-list:26,27,31,33,34,35 low-priority-base-frequency(MHz):2100000 The enable command always returns success, and the disable command always returns failed because SST-BF cannot be enabled or disabled from the OS on CascadeLake-N. Enable command also have support for --auto|-a option, which sets cpufreq scaling_min to max, so that the high priority base frequency can be the required minimum for high priority cores. Disable command with -a/--auto option reset the setting back to the min frequency. Signed-off-by: Prarit Bhargava <prarit@redhat.com> Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2019-10-15tools/power/x86/intel-speed-select: Implement 'perf-profile info' on CascadeLake-NPrarit Bhargava3-7/+173
Add functionality for "perf-profile info" on CascadeLake-N. Sample output: intel-speed-select perf-profile info Intel(R) Speed Select Technology Executing on CPU model:85[0x55] package-0 die-0 cpu-0 perf-profile-level-0 cpu-count:20 enable-cpu-mask:00000000,000fffff enable-cpu-list:0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19 thermal-design-power-ratio:23 base-frequency(MHz):2300 speed-select-turbo-freq:unsupported speed-select-base-freq:enabled speed-select-base-freq high-priority-base-frequency(MHz):2700000 high-priority-cpu-mask:00000000,0000e8c0 high-priority-cpu-list:6,7,11,13,14,15 low-priority-base-frequency(MHz):2100000 package-1 die-0 cpu-20 perf-profile-level-0 cpu-count:20 enable-cpu-mask:000000ff,fff00000 enable-cpu-list:20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39 thermal-design-power-ratio:23 base-frequency(MHz):2300 speed-select-turbo-freq:unsupported speed-select-base-freq:enabled speed-select-base-freq high-priority-base-frequency(MHz):2700000 high-priority-cpu-mask:0000000e,8c000000 high-priority-cpu-list:26,27,31,33,34,35 low-priority-base-frequency(MHz):2100000 Signed-off-by: Prarit Bhargava <prarit@redhat.com> Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2019-10-15tools/power/x86/intel-speed-select: Implement CascadeLake-N help and command functions structuresPrarit Bhargava1-10/+27
CascadeLake-N only supports SST-BF and needs some of the perf-profile commands, and the base-freq commands. Add help functions, and create an empty command structures (the functions will be implemented later in this patchset). Call these functions when running on CascadeLake-N. Signed-off-by: Prarit Bhargava <prarit@redhat.com> Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2019-10-15tools/power/x86/intel-speed-select: Add check for CascadeLake-N modelsPrarit Bhargava1-2/+41
Three CascadeLake-N models (6252N, 6230N, and 5218N) have SST-PBF support. Return an error if the CascadeLake processor is not one of these specific models. Signed-off-by: Prarit Bhargava <prarit@redhat.com> Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2019-10-15tools/power/x86/intel-speed-select: Make process_command genericPrarit Bhargava1-9/+11
Make the process_command take any help command and command list. This will make it easier to help commands and a command list for CascadeLake-N. Signed-off-by: Prarit Bhargava <prarit@redhat.com> Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2019-10-15tools/power/x86/intel-speed-select: Add int argument to command functionsPrarit Bhargava1-127/+86
The current code structure has similar but separate command functions for the enable and disable operations. This can be improved by adding an int argument to the command function structure, and interpreting 1 as enable and 0 as disable. This change results in the removal of the disable command functions. Add int argument to the command function structure. Signed-off-by: Prarit Bhargava <prarit@redhat.com> Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2019-10-15tools/power/x86/intel-speed-select: Refuse to disable core-power when getting usedSrinivas Pandruvada1-0/+21
The turbo-freq feature is dependent on the core-power feature. If the core-power feature is disabled while the turbo-freq feature is enabled, this will break the turbo-freq feature. This is a firmware limitation, where they can't return error under this scenario. So when trying to disable core-power, make sure that the turbo-freq feature is not enabled. If it enabled, return error if user is trying to disable the core-power feature. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2019-10-15tools/power/x86/intel-speed-select: Turbo-freq feature auto modeSrinivas Pandruvada1-28/+124
Introduce --auto|-a option to turbo-freq enable feature, so that it does in one step for users who are OK by setting all passed target cores as high priority and set in CLOS 0 and remaining in CLOS 3. In this way, users don't have to take multiple steps to enable turbo-freq feature. For users who want more fine grain control, they can always use core-power feature to set custom CLOS configuration and assignment. While here also print the error to output when clos configuration fails. For example intel-speed-select -c 0-4 turbo-freq enable --auto The above command will enable turbo-freq and core-power feature. Also mark CPU 0 to CPU 4 as high priority. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2019-10-15tools/power/x86/intel-speed-select: Base-freq feature auto modeSrinivas Pandruvada1-9/+223
Introduce --auto|-a option to base-freq enable feature, so that it does in one step for users who are OK by setting all cores with higher base frequency to be set in CLOS 0 and remaining in CLOS 3. This option also sets corresponding clos.min to CLOS 0 and CLOS3. In this way, users don't have to take multiple steps to enable base-freq feature. For users who want more fine grain control, they can always use core-power feature to set custom CLOS configuration and assignment. Also adjust cpufreq/scaling_min_freq for higher and lower priority cores. For example user can use: intel-speed-select base-freq enable --auto Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2019-10-15tools/power/x86/intel-speed-select: Remove warning for unused resultSrinivas Pandruvada1-3/+6
Fix warning for: isst-config.c: In function ‘set_cpu_online_offline’: isst-config.c:221:3: warning: ignoring return value of ‘write’, declared with attribute warn_unused_result [-Wunused-result] write(fd, "1\n", 2); Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2019-10-01tools/power/cpupower: Fix initializer override in hsw_ext_cstatesNathan Chancellor1-1/+0
When building cpupower with clang, the following warning appears: utils/idle_monitor/hsw_ext_idle.c:42:16: warning: initializer overrides prior initialization of this subobject [-Winitializer-overrides] .desc = N_("Processor Package C2"), ^~~~~~~~~~~~~~~~~~~~~~ ./utils/helpers/helpers.h:25:33: note: expanded from macro 'N_' #define N_(String) gettext_noop(String) ^~~~~~ ./utils/helpers/helpers.h:23:30: note: expanded from macro 'gettext_noop' #define gettext_noop(String) String ^~~~~~ utils/idle_monitor/hsw_ext_idle.c:41:16: note: previous initialization is here .desc = N_("Processor Package C9"), ^~~~~~~~~~~~~~~~~~~~~~ ./utils/helpers/helpers.h:25:33: note: expanded from macro 'N_' #define N_(String) gettext_noop(String) ^~~~~~ ./utils/helpers/helpers.h:23:30: note: expanded from macro 'gettext_noop' #define gettext_noop(String) String ^~~~~~ 1 warning generated. This appears to be a copy and paste or merge mistake because the name and id fields both have PC9 in them, not PC2. Remove the second assignment to fix the warning. Fixes: 7ee767b69b68 ("cpupower: Add Haswell family 0x45 specific idle monitor to show PC8,9,10 states") Link: https://github.com/ClangBuiltLinux/linux/issues/718 Signed-off-by: Nathan Chancellor <natechancellor@gmail.com> Signed-off-by: Shuah Khan <skhan@linuxfoundation.org>