From d782f33df706f1b8a4496b41fd7d339c6e23aa59 Mon Sep 17 00:00:00 2001 From: Russell King Date: Thu, 8 Jun 2006 17:59:31 +0100 Subject: [ARM] Fix Neponset IRQ handling While testing the genirq code on ARM, a condition was found whereby the Neponset IRQ handler was being re-entered, causing the system to deadlock. Under the ARM IRQ code, this would not have been a visible problem because the "simple" IRQ handling had no re-entrancy protection. Resolve this by acknowledging the parent interrupt after we mask it when we are going to handle one of our "special" level-based sources (from ethernet or USAR chip.) Signed-off-by: Russell King --- arch/arm/mach-sa1100/neponset.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/mach-sa1100/neponset.c b/arch/arm/mach-sa1100/neponset.c index 9e02bc3712a0..af6d2775cf82 100644 --- a/arch/arm/mach-sa1100/neponset.c +++ b/arch/arm/mach-sa1100/neponset.c @@ -59,6 +59,14 @@ neponset_irq_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *reg if (irr & (IRR_ETHERNET | IRR_USAR)) { desc->chip->mask(irq); + /* + * Ack the interrupt now to prevent re-entering + * this neponset handler. Again, this is safe + * since we'll check the IRR register prior to + * leaving. + */ + desc->chip->ack(irq); + if (irr & IRR_ETHERNET) { d = irq_desc + IRQ_NEPONSET_SMC9196; desc_handle_irq(IRQ_NEPONSET_SMC9196, d, regs); -- cgit v1.2.3-59-g8ed1b From 0c27c5d5b93339df4def7ced77ea5be26df4d84b Mon Sep 17 00:00:00 2001 From: Richard Purdie Date: Thu, 8 Jun 2006 22:44:07 +0100 Subject: [ARM] 3547/1: PXA-OHCI: Allow platforms to specify a power budget Patch from Richard Purdie Add a power budget variable to the PXA OHCI platform data and add a default value for the spitz platform(s) which prevents known failures with certain USB devices. Signed-off-by: Richard Purdie Signed-off-by: Russell King --- arch/arm/mach-pxa/spitz.c | 1 + drivers/usb/host/ohci-pxa27x.c | 3 +++ include/asm-arm/arch-pxa/ohci.h | 2 ++ 3 files changed, 6 insertions(+) diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c index 19b372df544a..44bcb8097c7a 100644 --- a/arch/arm/mach-pxa/spitz.c +++ b/arch/arm/mach-pxa/spitz.c @@ -371,6 +371,7 @@ static int spitz_ohci_init(struct device *dev) static struct pxaohci_platform_data spitz_ohci_platform_data = { .port_mode = PMM_NPS_MODE, .init = spitz_ohci_init, + .power_budget = 150, }; diff --git a/drivers/usb/host/ohci-pxa27x.c b/drivers/usb/host/ohci-pxa27x.c index acde8868da21..fafe7c1265b3 100644 --- a/drivers/usb/host/ohci-pxa27x.c +++ b/drivers/usb/host/ohci-pxa27x.c @@ -185,6 +185,9 @@ int usb_hcd_pxa27x_probe (const struct hc_driver *driver, struct platform_device /* Select Power Management Mode */ pxa27x_ohci_select_pmm(inf->port_mode); + if (inf->power_budget) + hcd->power_budget = inf->power_budget; + ohci_hcd_init(hcd_to_ohci(hcd)); retval = usb_add_hcd(hcd, pdev->resource[1].start, SA_INTERRUPT); diff --git a/include/asm-arm/arch-pxa/ohci.h b/include/asm-arm/arch-pxa/ohci.h index 7da89569061e..e848a47128cd 100644 --- a/include/asm-arm/arch-pxa/ohci.h +++ b/include/asm-arm/arch-pxa/ohci.h @@ -11,6 +11,8 @@ struct pxaohci_platform_data { #define PMM_NPS_MODE 1 #define PMM_GLOBAL_MODE 2 #define PMM_PERPORT_MODE 3 + + int power_budget; }; extern void pxa_set_ohci_info(struct pxaohci_platform_data *info); -- cgit v1.2.3-59-g8ed1b From e2f04e18941dbd3826901540a0be03f1728f8822 Mon Sep 17 00:00:00 2001 From: Matt Reimer Date: Thu, 8 Jun 2006 22:46:48 +0100 Subject: [ARM] 3546/1: PATCH: subtle lost interrupts bug on i.MX Patch from Matt Reimer There is a subtle bug in the GPIO interrupt status register handling in arch/arm/mach-imx/irq.c:imx_gpio_ack_irq(). The documentation states that a 1 should be written to the relevant bit to acknowledge a GPIO interrupt, but that is not what the code does. The problem is that the |= writes back 1s for all the *other* interrupts represented in the register, so interrupts could get lost. For example, if interrupts are pending for GPIO B10 and B12, ISR_B would have the value 0x00001400. Then when the interrupt code handles GPIO B10, it eventually calls imx_gpio_ack_irq(IRQ_GPIOB(10)), which effectively does this: ISR_B |= 1 << 10; with the result that (0x00001400 | 0x00000400) is written, clearing the interrupt status bits for *both* GPIO B10 and B12. The fix is to write 1s only for the interrupts we want to clear. The same problem seems to be occurring in the DMA code; this patch does not address those issues. Acked-by: Sascha Hauer Signed-off-by: Matt Reimer Signed-off-by: Russell King --- arch/arm/mach-imx/irq.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-imx/irq.c b/arch/arm/mach-imx/irq.c index eeb8a6d4a399..a5de5f1da9f2 100644 --- a/arch/arm/mach-imx/irq.c +++ b/arch/arm/mach-imx/irq.c @@ -127,7 +127,7 @@ static void imx_gpio_ack_irq(unsigned int irq) { DEBUG_IRQ("%s: irq %d\n", __FUNCTION__, irq); - ISR(IRQ_TO_REG(irq)) |= 1 << ((irq - IRQ_GPIOA(0)) % 32); + ISR(IRQ_TO_REG(irq)) = 1 << ((irq - IRQ_GPIOA(0)) % 32); } static void -- cgit v1.2.3-59-g8ed1b From 56f1319e877a969b814b3805c77ea9c31d849f54 Mon Sep 17 00:00:00 2001 From: Russell King Date: Sat, 10 Jun 2006 12:42:12 +0100 Subject: [ARM] Fix Integrator and Versatile interrupt initialisation Both Integrator and Versatile were using set_irq_handler() and enable_irq(), and working around the initialisation of the chained interrupt, instead of the more correct set_irq_chained_handler() function. Fix Integrator and Versatile to use the right function, and remove these work-arounds. Signed-off-by: Russell King --- arch/arm/mach-integrator/integrator_cp.c | 5 +---- arch/arm/mach-versatile/core.c | 5 ++--- 2 files changed, 3 insertions(+), 7 deletions(-) diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c index a0724f2b24ce..9f55f5ae1044 100644 --- a/arch/arm/mach-integrator/integrator_cp.c +++ b/arch/arm/mach-integrator/integrator_cp.c @@ -232,8 +232,6 @@ static void __init intcp_init_irq(void) for (i = IRQ_PIC_START; i <= IRQ_PIC_END; i++) { if (i == 11) i = 22; - if (i == IRQ_CP_CPPLDINT) - i++; if (i == 29) break; set_irq_chip(i, &pic_chip); @@ -259,8 +257,7 @@ static void __init intcp_init_irq(void) set_irq_flags(i, IRQF_VALID | IRQF_PROBE); } - set_irq_handler(IRQ_CP_CPPLDINT, sic_handle_irq); - pic_unmask_irq(IRQ_CP_CPPLDINT); + set_irq_chained_handler(IRQ_CP_CPPLDINT, sic_handle_irq); } /* diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c index 799697d32dec..cebd48a3dae4 100644 --- a/arch/arm/mach-versatile/core.c +++ b/arch/arm/mach-versatile/core.c @@ -112,10 +112,9 @@ void __init versatile_init_irq(void) { unsigned int i; - vic_init(VA_VIC_BASE, IRQ_VIC_START, ~(1 << 31)); + vic_init(VA_VIC_BASE, IRQ_VIC_START, ~0); - set_irq_handler(IRQ_VICSOURCE31, sic_handle_irq); - enable_irq(IRQ_VICSOURCE31); + set_irq_chained_handler(IRQ_VICSOURCE31, sic_handle_irq); /* Do second interrupt controller */ writel(~0, VA_SIC_BASE + SIC_IRQ_ENABLE_CLEAR); -- cgit v1.2.3-59-g8ed1b