From 414f552ad872e19a7471644317a60f3cbba25ced Mon Sep 17 00:00:00 2001 From: Ladislav Michl Date: Fri, 11 Dec 2009 16:16:33 -0800 Subject: omap1: Use gen_nand Since omapnand driver never find its way into mainline, switch to gen_nand instead. Following patch is compile tested only, but it is based on code I wrote for NetStar board and runtime tested it there. Signed-off-by: Ladislav Michl Cc: Imre Deak Cc: Brian Swetland Cc: Kevin Hilman Signed-off-by: Tony Lindgren --- arch/arm/mach-omap1/board-fsample.c | 50 +++++++++++++++++++++++--------- arch/arm/mach-omap1/board-h2.c | 49 ++++++++++++++++++++++++------- arch/arm/mach-omap1/board-h3.c | 56 +++++++++++++++++++++++++----------- arch/arm/mach-omap1/board-perseus2.c | 48 +++++++++++++++++++++++-------- 4 files changed, 152 insertions(+), 51 deletions(-) diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c index 91e7b2f2bc05..7e70c3c08da6 100644 --- a/arch/arm/mach-omap1/board-fsample.c +++ b/arch/arm/mach-omap1/board-fsample.c @@ -31,7 +31,6 @@ #include #include #include -#include #include #include #include @@ -174,8 +173,40 @@ static struct platform_device nor_device = { .resource = &nor_resource, }; -static struct omap_nand_platform_data nand_data = { - .options = NAND_SAMSUNG_LP_OPTIONS, +static void nand_cmd_ctl(struct mtd_info *mtd, int cmd, unsigned int ctrl) +{ + struct nand_chip *this = mtd->priv; + unsigned long mask; + + if (cmd == NAND_CMD_NONE) + return; + + mask = (ctrl & NAND_CLE) ? 0x02 : 0; + if (ctrl & NAND_ALE) + mask |= 0x04; + writeb(cmd, (unsigned long)this->IO_ADDR_W | mask); +} + +#define FSAMPLE_NAND_RB_GPIO_PIN 62 + +static int nand_dev_ready(struct mtd_info *mtd) +{ + return gpio_get_value(FSAMPLE_NAND_RB_GPIO_PIN); +} + +static const char *part_probes[] = { "cmdlinepart", NULL }; + +static struct platform_nand_data nand_data = { + .chip = { + .nr_chips = 1, + .chip_offset = 0, + .options = NAND_SAMSUNG_LP_OPTIONS, + .part_probe_types = part_probes, + }, + .ctrl = { + .cmd_ctrl = nand_cmd_ctl, + .dev_ready = nand_dev_ready, + }, }; static struct resource nand_resource = { @@ -185,7 +216,7 @@ static struct resource nand_resource = { }; static struct platform_device nand_device = { - .name = "omapnand", + .name = "gen_nand", .id = 0, .dev = { .platform_data = &nand_data, @@ -243,13 +274,6 @@ static struct platform_device *devices[] __initdata = { &lcd_device, }; -#define P2_NAND_RB_GPIO_PIN 62 - -static int nand_dev_ready(struct omap_nand_platform_data *data) -{ - return gpio_get_value(P2_NAND_RB_GPIO_PIN); -} - static struct omap_lcd_config fsample_lcd_config __initdata = { .ctrl_name = "internal", }; @@ -260,9 +284,9 @@ static struct omap_board_config_kernel fsample_config[] = { static void __init omap_fsample_init(void) { - if (gpio_request(P2_NAND_RB_GPIO_PIN, "NAND ready") < 0) + if (gpio_request(FSAMPLE_NAND_RB_GPIO_PIN, "NAND ready") < 0) BUG(); - nand_data.dev_ready = nand_dev_ready; + gpio_direction_input(FSAMPLE_NAND_RB_GPIO_PIN); omap_cfg_reg(L3_1610_FLASH_CS2B_OE); omap_cfg_reg(M8_1610_FLASH_CS2B_WE); diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c index eeafe6ed15cb..fa7cecea19f9 100644 --- a/arch/arm/mach-omap1/board-h2.c +++ b/arch/arm/mach-omap1/board-h2.c @@ -41,7 +41,6 @@ #include #include #include -#include #include #include #include @@ -180,11 +179,43 @@ static struct mtd_partition h2_nand_partitions[] = { }, }; -/* dip switches control NAND chip access: 8 bit, 16 bit, or neither */ -static struct omap_nand_platform_data h2_nand_data = { - .options = NAND_SAMSUNG_LP_OPTIONS, - .parts = h2_nand_partitions, - .nr_parts = ARRAY_SIZE(h2_nand_partitions), +static void h2_nand_cmd_ctl(struct mtd_info *mtd, int cmd, unsigned int ctrl) +{ + struct nand_chip *this = mtd->priv; + unsigned long mask; + + if (cmd == NAND_CMD_NONE) + return; + + mask = (ctrl & NAND_CLE) ? 0x02 : 0; + if (ctrl & NAND_ALE) + mask |= 0x04; + writeb(cmd, (unsigned long)this->IO_ADDR_W | mask); +} + +#define H2_NAND_RB_GPIO_PIN 62 + +static int h2_nand_dev_ready(struct mtd_info *mtd) +{ + return gpio_get_value(H2_NAND_RB_GPIO_PIN); +} + +static const char *h2_part_probes[] = { "cmdlinepart", NULL }; + +struct platform_nand_data h2_nand_platdata = { + .chip = { + .nr_chips = 1, + .chip_offset = 0, + .nr_partitions = ARRAY_SIZE(h2_nand_partitions), + .partitions = h2_nand_partitions, + .options = NAND_SAMSUNG_LP_OPTIONS, + .part_probe_types = h2_part_probes, + }, + .ctrl = { + .cmd_ctrl = h2_nand_cmd_ctl, + .dev_ready = h2_nand_dev_ready, + + }, }; static struct resource h2_nand_resource = { @@ -192,10 +223,10 @@ static struct resource h2_nand_resource = { }; static struct platform_device h2_nand_device = { - .name = "omapnand", + .name = "gen_nand", .id = 0, .dev = { - .platform_data = &h2_nand_data, + .platform_data = &h2_nand_platdata, }, .num_resources = 1, .resource = &h2_nand_resource, @@ -378,8 +409,6 @@ static struct omap_board_config_kernel h2_config[] __initdata = { { OMAP_TAG_LCD, &h2_lcd_config }, }; -#define H2_NAND_RB_GPIO_PIN 62 - static void __init h2_init(void) { /* Here we assume the NOR boot config: NOR on CS3 (possibly swapped diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c index e0aee66e43e6..6a7f9c391cf1 100644 --- a/arch/arm/mach-omap1/board-h3.c +++ b/arch/arm/mach-omap1/board-h3.c @@ -43,7 +43,6 @@ #include #include #include -#include #include #include #include @@ -182,11 +181,43 @@ static struct mtd_partition nand_partitions[] = { }, }; -/* dip switches control NAND chip access: 8 bit, 16 bit, or neither */ -static struct omap_nand_platform_data nand_data = { - .options = NAND_SAMSUNG_LP_OPTIONS, - .parts = nand_partitions, - .nr_parts = ARRAY_SIZE(nand_partitions), +static void nand_cmd_ctl(struct mtd_info *mtd, int cmd, unsigned int ctrl) +{ + struct nand_chip *this = mtd->priv; + unsigned long mask; + + if (cmd == NAND_CMD_NONE) + return; + + mask = (ctrl & NAND_CLE) ? 0x02 : 0; + if (ctrl & NAND_ALE) + mask |= 0x04; + writeb(cmd, (unsigned long)this->IO_ADDR_W | mask); +} + +#define H3_NAND_RB_GPIO_PIN 10 + +static int nand_dev_ready(struct mtd_info *mtd) +{ + return gpio_get_value(H3_NAND_RB_GPIO_PIN); +} + +static const char *part_probes[] = { "cmdlinepart", NULL }; + +struct platform_nand_data nand_platdata = { + .chip = { + .nr_chips = 1, + .chip_offset = 0, + .nr_partitions = ARRAY_SIZE(nand_partitions), + .partitions = nand_partitions, + .options = NAND_SAMSUNG_LP_OPTIONS, + .part_probe_types = part_probes, + }, + .ctrl = { + .cmd_ctrl = nand_cmd_ctl, + .dev_ready = nand_dev_ready, + + }, }; static struct resource nand_resource = { @@ -194,10 +225,10 @@ static struct resource nand_resource = { }; static struct platform_device nand_device = { - .name = "omapnand", + .name = "gen_nand", .id = 0, .dev = { - .platform_data = &nand_data, + .platform_data = &nand_platdata, }, .num_resources = 1, .resource = &nand_resource, @@ -342,13 +373,6 @@ static struct i2c_board_info __initdata h3_i2c_board_info[] = { }, }; -#define H3_NAND_RB_GPIO_PIN 10 - -static int nand_dev_ready(struct omap_nand_platform_data *data) -{ - return gpio_get_value(H3_NAND_RB_GPIO_PIN); -} - static void __init h3_init(void) { /* Here we assume the NOR boot config: NOR on CS3 (possibly swapped @@ -366,7 +390,7 @@ static void __init h3_init(void) nand_resource.end += SZ_4K - 1; if (gpio_request(H3_NAND_RB_GPIO_PIN, "NAND ready") < 0) BUG(); - nand_data.dev_ready = nand_dev_ready; + gpio_direction_input(H3_NAND_RB_GPIO_PIN); /* GPIO10 Func_MUX_CTRL reg bit 29:27, Configure V2 to mode1 as GPIO */ /* GPIO10 pullup/down register, Enable pullup on GPIO10 */ diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c index b9ea31289b50..1387a4f15da9 100644 --- a/arch/arm/mach-omap1/board-perseus2.c +++ b/arch/arm/mach-omap1/board-perseus2.c @@ -31,7 +31,6 @@ #include #include #include -#include #include #include #include @@ -141,8 +140,40 @@ static struct platform_device nor_device = { .resource = &nor_resource, }; -static struct omap_nand_platform_data nand_data = { - .options = NAND_SAMSUNG_LP_OPTIONS, +static void nand_cmd_ctl(struct mtd_info *mtd, int cmd, unsigned int ctrl) +{ + struct nand_chip *this = mtd->priv; + unsigned long mask; + + if (cmd == NAND_CMD_NONE) + return; + + mask = (ctrl & NAND_CLE) ? 0x02 : 0; + if (ctrl & NAND_ALE) + mask |= 0x04; + writeb(cmd, (unsigned long)this->IO_ADDR_W | mask); +} + +#define P2_NAND_RB_GPIO_PIN 62 + +static int nand_dev_ready(struct mtd_info *mtd) +{ + return gpio_get_value(P2_NAND_RB_GPIO_PIN); +} + +static const char *part_probes[] = { "cmdlinepart", NULL }; + +static struct platform_nand_data nand_data = { + .chip = { + .nr_chips = 1, + .chip_offset = 0, + .options = NAND_SAMSUNG_LP_OPTIONS, + .part_probe_types = part_probes, + }, + .ctrl = { + .cmd_ctrl = nand_cmd_ctl, + .dev_ready = nand_dev_ready, + }, }; static struct resource nand_resource = { @@ -152,7 +183,7 @@ static struct resource nand_resource = { }; static struct platform_device nand_device = { - .name = "omapnand", + .name = "gen_nand", .id = 0, .dev = { .platform_data = &nand_data, @@ -211,13 +242,6 @@ static struct platform_device *devices[] __initdata = { &lcd_device, }; -#define P2_NAND_RB_GPIO_PIN 62 - -static int nand_dev_ready(struct omap_nand_platform_data *data) -{ - return gpio_get_value(P2_NAND_RB_GPIO_PIN); -} - static struct omap_lcd_config perseus2_lcd_config __initdata = { .ctrl_name = "internal", }; @@ -230,7 +254,7 @@ static void __init omap_perseus2_init(void) { if (gpio_request(P2_NAND_RB_GPIO_PIN, "NAND ready") < 0) BUG(); - nand_data.dev_ready = nand_dev_ready; + gpio_direction_input(P2_NAND_RB_GPIO_PIN); omap_cfg_reg(L3_1610_FLASH_CS2B_OE); omap_cfg_reg(M8_1610_FLASH_CS2B_WE); -- cgit v1.2.3-59-g8ed1b