From 5e9e7687cbc016ac36b6825f79d78213319331d9 Mon Sep 17 00:00:00 2001 From: Michael Hennerich Date: Thu, 9 Oct 2008 12:31:03 +0800 Subject: Blackfin arch: Fix BUG -- BF533 + 0.5 silicon + MPU + UART PIO -> crash Apply ANOMALY_05000283 & ANOMALY_05000315 Workaround also to the EXCEPTION path. Cover evt_ivhw also with ANOMALY_05000315 The Workaround needs to be prior to accesses (either read or write) to any system MMR. Signed-off-by: Michael Hennerich Signed-off-by: Bryan Wu --- arch/blackfin/mach-common/entry.S | 18 ++++++++++++++++++ arch/blackfin/mach-common/interrupt.S | 2 +- 2 files changed, 19 insertions(+), 1 deletion(-) diff --git a/arch/blackfin/mach-common/entry.S b/arch/blackfin/mach-common/entry.S index 5a219b228de3..76c42d3b5e85 100644 --- a/arch/blackfin/mach-common/entry.S +++ b/arch/blackfin/mach-common/entry.S @@ -484,6 +484,15 @@ ENTRY(_trap) /* Exception: 4th entry into system event table(supervisor mode)*/ [--sp] = ASTAT; [--sp] = (R7:6,P5:4); +#if ANOMALY_05000283 || ANOMALY_05000315 + cc = r7 == r7; + p5.h = HI(CHIPID); + p5.l = LO(CHIPID); + if cc jump 1f; + r7.l = W[p5]; +1: +#endif + #ifdef CONFIG_DEBUG_DOUBLEFAULT /* * Save these registers, as they are only valid in exception context @@ -1020,6 +1029,15 @@ ENTRY(_early_trap) SAVE_ALL_SYS trace_buffer_stop(p0,r0); +#if ANOMALY_05000283 || ANOMALY_05000315 + cc = r5 == r5; + p4.h = HI(CHIPID); + p4.l = LO(CHIPID); + if cc jump 1f; + r5.l = W[p4]; +1: +#endif + /* Turn caches off, to ensure we don't get double exceptions */ P4.L = LO(IMEM_CONTROL); diff --git a/arch/blackfin/mach-common/interrupt.S b/arch/blackfin/mach-common/interrupt.S index b27e59d32401..647f0f522910 100644 --- a/arch/blackfin/mach-common/interrupt.S +++ b/arch/blackfin/mach-common/interrupt.S @@ -143,7 +143,7 @@ ENTRY(_evt_ivhw) fp = 0; #endif -#if ANOMALY_05000283 +#if ANOMALY_05000283 || ANOMALY_05000315 cc = r7 == r7; p5.h = HI(CHIPID); p5.l = LO(CHIPID); -- cgit v1.2.3-59-g8ed1b