From 7bfd90f5a57e49c3b97929ce1f7868629e3e13d0 Mon Sep 17 00:00:00 2001 From: Matthias Kaehlcke Date: Thu, 27 Sep 2018 14:22:53 -0700 Subject: arm64: dts: qcom: pm8998: Use ADC temperature to temp-alarm node The temperature information from the temp-alarm block itself is very coarse ("temperature is above/below trip points"). Provide the driver with the die temperature channel of the ADC on the PMIC for more precise readings. Signed-off-by: Matthias Kaehlcke Reviewed-by: Douglas Anderson Signed-off-by: Andy Gross --- arch/arm64/boot/dts/qcom/pm8998.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/pm8998.dtsi b/arch/arm64/boot/dts/qcom/pm8998.dtsi index 4872f116758d..d3ca35a940fb 100644 --- a/arch/arm64/boot/dts/qcom/pm8998.dtsi +++ b/arch/arm64/boot/dts/qcom/pm8998.dtsi @@ -58,6 +58,8 @@ compatible = "qcom,spmi-temp-alarm"; reg = <0x2400>; interrupts = <0x0 0x24 0x0 IRQ_TYPE_EDGE_RISING>; + io-channels = <&pm8998_adc ADC5_DIE_TEMP>; + io-channel-names = "thermal"; #thermal-sensor-cells = <0>; }; -- cgit v1.3-14-g43fede From 79e51645a1dd7bc76c70bbb0f211868e94d8331e Mon Sep 17 00:00:00 2001 From: Matthias Kaehlcke Date: Wed, 19 Dec 2018 15:55:26 -0800 Subject: arm64: dts: qcom: msm8916: Set 'xo_board' as ref clock of the DSI PHY Add 'xo_board' as ref clock for the DSI PHYs, it was previously hardcoded in the PLL 'driver' for the 28nm PHY. Signed-off-by: Matthias Kaehlcke Reviewed-by: Douglas Anderson Reviewed-by: Stephen Boyd Signed-off-by: Andy Gross --- arch/arm64/boot/dts/qcom/msm8916.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index e4b1010f70b6..423dda996b5d 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -1024,8 +1024,9 @@ #clock-cells = <1>; #phy-cells = <0>; - clocks = <&gcc GCC_MDSS_AHB_CLK>; - clock-names = "iface"; + clocks = <&gcc GCC_MDSS_AHB_CLK>, + <&xo_board>; + clock-names = "iface", "ref"; }; }; -- cgit v1.3-14-g43fede From 0c0e72705a3345916192f740e5fd158efc01fefd Mon Sep 17 00:00:00 2001 From: Matthias Kaehlcke Date: Wed, 19 Dec 2018 15:55:27 -0800 Subject: arm64: dts: sdm845: Set 'bi_tcxo' as ref clock of the DSI PHYs Add 'bi_tcxo' as ref clock for the DSI PHYs, it was previously hardcoded in the PLL 'driver' for the 10nm PHY. Signed-off-by: Matthias Kaehlcke Reviewed-by: Douglas Anderson Reviewed-by: Stephen Boyd Signed-off-by: Andy Gross --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index dd67f9c5cb43..0d7dd5e3d946 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -1985,8 +1985,9 @@ #clock-cells = <1>; #phy-cells = <0>; - clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>; - clock-names = "iface"; + clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, + <&rpmhcc RPMH_CXO_CLK>; + clock-names = "iface", "ref"; status = "disabled"; }; @@ -2051,8 +2052,9 @@ #clock-cells = <1>; #phy-cells = <0>; - clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>; - clock-names = "iface"; + clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, + <&rpmhcc RPMH_CXO_CLK>; + clock-names = "iface", "ref"; status = "disabled"; }; -- cgit v1.3-14-g43fede From 7b5ee83dfdf8abe5d1c917762e4cabfe6c1b9c68 Mon Sep 17 00:00:00 2001 From: Matthias Kaehlcke Date: Mon, 14 Jan 2019 10:42:55 -0800 Subject: arm64: dts: sdm845: Add CPU topology The 8 CPU cores of the SDM845 are organized in two clusters of 4 big ("gold") and 4 little ("silver") cores. Add a cpu-map node to the DT that describes this topology. Signed-off-by: Matthias Kaehlcke Reviewed-by: Douglas Anderson Signed-off-by: Andy Gross --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 38 ++++++++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 0d7dd5e3d946..38124e923687 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -299,6 +299,44 @@ next-level-cache = <&L3_0>; }; }; + + cpu-map { + cluster0 { + core0 { + cpu = <&CPU0>; + }; + + core1 { + cpu = <&CPU1>; + }; + + core2 { + cpu = <&CPU2>; + }; + + core3 { + cpu = <&CPU3>; + }; + }; + + cluster1 { + core0 { + cpu = <&CPU4>; + }; + + core1 { + cpu = <&CPU5>; + }; + + core2 { + cpu = <&CPU6>; + }; + + core3 { + cpu = <&CPU7>; + }; + }; + }; }; pmu { -- cgit v1.3-14-g43fede From b6bc6423fa1a2b1cdf407c22bf1a1bfff73d57bd Mon Sep 17 00:00:00 2001 From: Matthias Kaehlcke Date: Wed, 16 Jan 2019 15:40:39 -0800 Subject: arm64: dts: sdm845: Add CPU capacity values Specify the relative CPU capacity of all SDM845 AP cores. The values were provided by Qualcomm engineers. Signed-off-by: Matthias Kaehlcke Reviewed-by: Rajendra Nayak Signed-off-by: Andy Gross --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 38124e923687..fcb93300ca62 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -190,6 +190,7 @@ compatible = "qcom,kryo385"; reg = <0x0 0x0>; enable-method = "psci"; + capacity-dmips-mhz = <607>; qcom,freq-domain = <&cpufreq_hw 0>; #cooling-cells = <2>; next-level-cache = <&L2_0>; @@ -207,6 +208,7 @@ compatible = "qcom,kryo385"; reg = <0x0 0x100>; enable-method = "psci"; + capacity-dmips-mhz = <607>; qcom,freq-domain = <&cpufreq_hw 0>; #cooling-cells = <2>; next-level-cache = <&L2_100>; @@ -221,6 +223,7 @@ compatible = "qcom,kryo385"; reg = <0x0 0x200>; enable-method = "psci"; + capacity-dmips-mhz = <607>; qcom,freq-domain = <&cpufreq_hw 0>; #cooling-cells = <2>; next-level-cache = <&L2_200>; @@ -235,6 +238,7 @@ compatible = "qcom,kryo385"; reg = <0x0 0x300>; enable-method = "psci"; + capacity-dmips-mhz = <607>; qcom,freq-domain = <&cpufreq_hw 0>; #cooling-cells = <2>; next-level-cache = <&L2_300>; @@ -249,6 +253,7 @@ compatible = "qcom,kryo385"; reg = <0x0 0x400>; enable-method = "psci"; + capacity-dmips-mhz = <1024>; qcom,freq-domain = <&cpufreq_hw 1>; #cooling-cells = <2>; next-level-cache = <&L2_400>; @@ -263,6 +268,7 @@ compatible = "qcom,kryo385"; reg = <0x0 0x500>; enable-method = "psci"; + capacity-dmips-mhz = <1024>; qcom,freq-domain = <&cpufreq_hw 1>; #cooling-cells = <2>; next-level-cache = <&L2_500>; @@ -277,6 +283,7 @@ compatible = "qcom,kryo385"; reg = <0x0 0x600>; enable-method = "psci"; + capacity-dmips-mhz = <1024>; qcom,freq-domain = <&cpufreq_hw 1>; #cooling-cells = <2>; next-level-cache = <&L2_600>; @@ -291,6 +298,7 @@ compatible = "qcom,kryo385"; reg = <0x0 0x700>; enable-method = "psci"; + capacity-dmips-mhz = <1024>; qcom,freq-domain = <&cpufreq_hw 1>; #cooling-cells = <2>; next-level-cache = <&L2_700>; -- cgit v1.3-14-g43fede From d26c474d4cf3f73817073d87da80b0eb37f68f89 Mon Sep 17 00:00:00 2001 From: Jordan Crouse Date: Wed, 30 Jan 2019 11:04:32 +0000 Subject: arm64: dts: msm8996: Add graphics smmu node Add device node for graphics smmu, aka. adreno_smmu. Signed-off-by: Jordan Crouse Signed-off-by: Vivek Gautam Signed-off-by: Srinivas Kandagatla Signed-off-by: Andy Gross --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index edcddc74a4fc..57a74fb1a3c3 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -1288,6 +1288,25 @@ }; }; + adreno_smmu: arm,smmu@b40000 { + compatible = "qcom,msm8996-smmu-v2", "qcom,smmu-v2"; + reg = <0xb40000 0x10000>; + + #global-interrupts = <1>; + interrupts = , + , + ; + #iommu-cells = <1>; + + clocks = <&mmcc GPU_AHB_CLK>, + <&gcc GCC_MMSS_BIMC_GFX_CLK>; + clock-names = "iface", "bus"; + + power-domains = <&mmcc GPU_GDSC>; + + status = "disabled"; + }; + agnoc@0 { power-domains = <&gcc AGGRE0_NOC_GDSC>; compatible = "simple-pm-bus"; -- cgit v1.3-14-g43fede From 953f6573700651aef1d1ea9d0bb04cb85c5d00a4 Mon Sep 17 00:00:00 2001 From: Archit Taneja Date: Wed, 30 Jan 2019 11:04:33 +0000 Subject: arm64: dts: msm8996: Add display smmu node Add device node for display smmu, aka. mdp_smmu. Signed-off-by: Archit Taneja Signed-off-by: Vivek Gautam Signed-off-by: Srinivas Kandagatla Signed-off-by: Andy Gross --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index 57a74fb1a3c3..790dcaa54c91 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -1307,6 +1307,24 @@ status = "disabled"; }; + mdp_smmu: arm,smmu@d00000 { + compatible = "qcom,msm8996-smmu-v2", "qcom,smmu-v2"; + reg = <0xd00000 0x10000>; + + #global-interrupts = <1>; + interrupts = , + , + ; + #iommu-cells = <1>; + clocks = <&mmcc SMMU_MDP_AHB_CLK>, + <&mmcc SMMU_MDP_AXI_CLK>; + clock-names = "iface", "bus"; + + power-domains = <&mmcc MDSS_GDSC>; + + status = "disabled"; + }; + agnoc@0 { power-domains = <&gcc AGGRE0_NOC_GDSC>; compatible = "simple-pm-bus"; -- cgit v1.3-14-g43fede From 3a4547c1fc2fa5a84d4036d865e9a386c7c11359 Mon Sep 17 00:00:00 2001 From: Archit Taneja Date: Wed, 30 Jan 2019 11:04:34 +0000 Subject: arm64: qcom: msm8996.dtsi: Add Display nodes Signed-off-by: Archit Taneja [Removed instances of mmagic clocks; Use qcom,msm8996-smmu-v2 bindings] Signed-off-by: Vivek Gautam Signed-off-by: Srinivas Kandagatla Signed-off-by: Andy Gross --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 120 ++++++++++++++++++++++++++++++++++ 1 file changed, 120 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index 790dcaa54c91..cbb7fe0fbbe5 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -1490,6 +1490,126 @@ "bus_slave"; }; }; + + mdss: mdss@900000 { + compatible = "qcom,mdss"; + + reg = <0x900000 0x1000>, + <0x9b0000 0x1040>, + <0x9b8000 0x1040>; + reg-names = "mdss_phys", + "vbif_phys", + "vbif_nrt_phys"; + + power-domains = <&mmcc MDSS_GDSC>; + interrupts = ; + + interrupt-controller; + #interrupt-cells = <1>; + + clocks = <&mmcc MDSS_AHB_CLK>; + clock-names = "iface_clk"; + + #address-cells = <1>; + #size-cells = <1>; + ranges; + + mdp: mdp@901000 { + compatible = "qcom,mdp5"; + reg = <0x901000 0x90000>; + reg-names = "mdp_phys"; + + interrupt-parent = <&mdss>; + interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; + + clocks = <&mmcc MDSS_AHB_CLK>, + <&mmcc MDSS_AXI_CLK>, + <&mmcc MDSS_MDP_CLK>, + <&mmcc SMMU_MDP_AXI_CLK>, + <&mmcc MDSS_VSYNC_CLK>; + clock-names = "iface_clk", + "bus_clk", + "core_clk", + "iommu_clk", + "vsync_clk"; + + iommus = <&mdp_smmu 0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + mdp5_intf3_out: endpoint { + remote-endpoint = <&hdmi_in>; + }; + }; + }; + }; + + hdmi: hdmi-tx@9a0000 { + compatible = "qcom,hdmi-tx-8996"; + reg = <0x009a0000 0x50c>, + <0x00070000 0x6158>, + <0x009e0000 0xfff>; + reg-names = "core_physical", + "qfprom_physical", + "hdcp_physical"; + + interrupt-parent = <&mdss>; + interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; + + clocks = <&mmcc MDSS_MDP_CLK>, + <&mmcc MDSS_AHB_CLK>, + <&mmcc MDSS_HDMI_CLK>, + <&mmcc MDSS_HDMI_AHB_CLK>, + <&mmcc MDSS_EXTPCLK_CLK>; + clock-names = + "mdp_core_clk", + "iface_clk", + "core_clk", + "alt_iface_clk", + "extp_clk"; + + phys = <&hdmi_phy>; + phy-names = "hdmi_phy"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + hdmi_in: endpoint { + remote-endpoint = <&mdp5_intf3_out>; + }; + }; + }; + }; + + hdmi_phy: hdmi-phy@9a0600 { + #phy-cells = <0>; + compatible = "qcom,hdmi-phy-8996"; + reg = <0x9a0600 0x1c4>, + <0x9a0a00 0x124>, + <0x9a0c00 0x124>, + <0x9a0e00 0x124>, + <0x9a1000 0x124>, + <0x9a1200 0x0c8>; + reg-names = "hdmi_pll", + "hdmi_tx_l0", + "hdmi_tx_l1", + "hdmi_tx_l2", + "hdmi_tx_l3", + "hdmi_phy"; + + clocks = <&mmcc MDSS_AHB_CLK>, + <&gcc GCC_HDMI_CLKREF_CLK>; + clock-names = "iface_clk", + "ref_clk"; + }; + }; }; adsp-pil { -- cgit v1.3-14-g43fede From 69cc3114ab0f59a1ba429b7e5b84b26e2599d207 Mon Sep 17 00:00:00 2001 From: Jordan Crouse Date: Wed, 30 Jan 2019 11:04:35 +0000 Subject: arm64: dts: Add Adreno GPU definitions Add an initial node for the Adreno GPU. Signed-off-by: Vivek Gautam Signed-off-by: Srinivas Kandagatla Signed-off-by: Jordan Crouse Signed-off-by: Andy Gross --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 86 +++++++++++++++++++++++++++++++++++ 1 file changed, 86 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index cbb7fe0fbbe5..d46858644c3d 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -84,6 +84,12 @@ qcom,client-id = <1>; qcom,vmid = <15>; }; + + zap_shader_region: gpu@8f200000 { + compatible = "shared-dma-pool"; + reg = <0x0 0x90b00000 0x0 0xa00000>; + no-map; + }; }; cpus { @@ -946,6 +952,11 @@ reg = <0x24f 0x1>; bits = <1 4>; }; + + gpu_speed_bin: gpu_speed_bin@133 { + reg = <0x133 0x1>; + bits = <5 3>; + }; }; phy@34000 { @@ -1491,6 +1502,81 @@ }; }; + gpu@b00000 { + compatible = "qcom,adreno-530.2", "qcom,adreno"; + #stream-id-cells = <16>; + + reg = <0xb00000 0x3f000>; + reg-names = "kgsl_3d0_reg_memory"; + + interrupts = <0 300 IRQ_TYPE_LEVEL_HIGH>; + + clocks = <&mmcc GPU_GX_GFX3D_CLK>, + <&mmcc GPU_AHB_CLK>, + <&mmcc GPU_GX_RBBMTIMER_CLK>, + <&gcc GCC_BIMC_GFX_CLK>, + <&gcc GCC_MMSS_BIMC_GFX_CLK>; + + clock-names = "core", + "iface", + "rbbmtimer", + "mem", + "mem_iface"; + + power-domains = <&mmcc GPU_GDSC>; + iommus = <&adreno_smmu 0>; + + nvmem-cells = <&gpu_speed_bin>; + nvmem-cell-names = "speed_bin"; + + qcom,gpu-quirk-two-pass-use-wfi; + qcom,gpu-quirk-fault-detect-mask; + + operating-points-v2 = <&gpu_opp_table>; + + gpu_opp_table: opp-table { + compatible ="operating-points-v2"; + + /* + * 624Mhz and 560Mhz are only available on speed + * bin (1 << 0). All the rest are available on + * all bins of the hardware + */ + opp-624000000 { + opp-hz = /bits/ 64 <624000000>; + opp-supported-hw = <0x01>; + }; + opp-560000000 { + opp-hz = /bits/ 64 <560000000>; + opp-supported-hw = <0x01>; + }; + opp-510000000 { + opp-hz = /bits/ 64 <510000000>; + opp-supported-hw = <0xFF>; + }; + opp-401800000 { + opp-hz = /bits/ 64 <401800000>; + opp-supported-hw = <0xFF>; + }; + opp-315000000 { + opp-hz = /bits/ 64 <315000000>; + opp-supported-hw = <0xFF>; + }; + opp-214000000 { + opp-hz = /bits/ 64 <214000000>; + opp-supported-hw = <0xFF>; + }; + opp-133000000 { + opp-hz = /bits/ 64 <133000000>; + opp-supported-hw = <0xFF>; + }; + }; + + zap-shader { + memory-region = <&zap_shader_region>; + }; + }; + mdss: mdss@900000 { compatible = "qcom,mdss"; -- cgit v1.3-14-g43fede From 1ad69b69558230ed6bfdcc752bd9b69d33c932b4 Mon Sep 17 00:00:00 2001 From: Archit Taneja Date: Wed, 30 Jan 2019 11:04:36 +0000 Subject: arm64: dts: apq8096-db820c: Add HDMI display support The APQ8096 DB820c platform provides HDMI output. The MDSS block on 8x96 supports a direct HDMI out. Populate the MDSS, MDP and HDMI DT nodes. Also, add the HDMI HPD and DDC pinctrl nodes with the bias and driver strength specified for this platform. Signed-off-by: Archit Taneja Signed-off-by: Srinivas Kandagatla Signed-off-by: Andy Gross --- arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi | 52 +++++++++++++++++++++++ arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 27 ++++++++++++ 2 files changed, 79 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi b/arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi index 6a573875d45a..1c0d06f59d00 100644 --- a/arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi +++ b/arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi @@ -62,4 +62,56 @@ bias-disable; }; }; + + hdmi_hpd_active: hdmi_hpd_active { + mux { + pins = "gpio34"; + function = "hdmi_hot"; + }; + + config { + pins = "gpio34"; + bias-pull-down; + drive-strength = <16>; + }; + }; + + hdmi_hpd_suspend: hdmi_hpd_suspend { + mux { + pins = "gpio34"; + function = "hdmi_hot"; + }; + + config { + pins = "gpio34"; + bias-pull-down; + drive-strength = <2>; + }; + }; + + hdmi_ddc_active: hdmi_ddc_active { + mux { + pins = "gpio32", "gpio33"; + function = "hdmi_ddc"; + }; + + config { + pins = "gpio32", "gpio33"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + hdmi_ddc_suspend: hdmi_ddc_suspend { + mux { + pins = "gpio32", "gpio33"; + function = "hdmi_ddc"; + }; + + config { + pins = "gpio32", "gpio33"; + drive-strength = <2>; + bias-pull-down; + }; + }; }; diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi index 6d50449fbcdf..1e78f0b47c89 100644 --- a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi +++ b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi @@ -452,6 +452,33 @@ perst-gpio = <&msmgpio 114 GPIO_ACTIVE_LOW>; }; }; + + mdss@900000 { + status = "okay"; + + mdp@901000 { + status = "okay"; + }; + + hdmi-phy@9a0600 { + status = "okay"; + + vddio-supply = <&pm8994_l12>; + vcca-supply = <&pm8994_l28>; + #phy-cells = <0>; + }; + + hdmi-tx@9a0000 { + status = "okay"; + + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&hdmi_hpd_active &hdmi_ddc_active>; + pinctrl-1 = <&hdmi_hpd_suspend &hdmi_ddc_suspend>; + + core-vdda-supply = <&pm8994_l12>; + core-vcc-supply = <&pm8994_s4>; + }; + }; }; -- cgit v1.3-14-g43fede From f3eb39a55a1f770ec768304af49d406dc92637d7 Mon Sep 17 00:00:00 2001 From: Srinivas Kandagatla Date: Wed, 30 Jan 2019 11:04:37 +0000 Subject: arm64: dts: db820c: Add sound card support This patch adds support both digital and analog audio on DB820c. This board has HDMI port and 3.5mm audio jack to support both digital and analog audio respectively. Signed-off-by: Srinivas Kandagatla Signed-off-by: Andy Gross --- .../boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi | 8 ++ arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 94 ++++++++++++++ arch/arm64/boot/dts/qcom/msm8996-pins.dtsi | 43 +++++++ arch/arm64/boot/dts/qcom/msm8996.dtsi | 141 +++++++++++++++++++++ 4 files changed, 286 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi b/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi index a6ad3d7fe655..31a3e3311ad5 100644 --- a/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi +++ b/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi @@ -36,6 +36,14 @@ }; }; + audio_mclk: clk_div1 { + pinconf { + pins = "gpio15"; + function = "func1"; + power-source = ; // 1.8V + }; + }; + volume_up_gpio: pm8996_gpio2 { pinconf { pins = "gpio2"; diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi index 1e78f0b47c89..943f69912074 100644 --- a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi +++ b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi @@ -18,6 +18,8 @@ #include "apq8096-db820c-pmic-pins.dtsi" #include #include +#include +#include /* * GPIO name legend: proper name = the GPIO line is used as GPIO @@ -63,6 +65,7 @@ }; clocks { + compatible = "simple-bus"; divclk4: divclk4 { compatible = "fixed-clock"; #clock-cells = <0>; @@ -72,6 +75,15 @@ pinctrl-names = "default"; pinctrl-0 = <&divclk4_pin_a>; }; + + div1_mclk: divclk1 { + compatible = "gpio-gate-clock"; + pinctrl-0 = <&audio_mclk>; + pinctrl-names = "default"; + clocks = <&rpmcc RPM_SMD_DIV_CLK1>; + #clock-cells = <0>; + enable-gpios = <&pm8994_gpios 15 0>; + }; }; soc { @@ -453,6 +465,16 @@ }; }; + slim_msm: slim@91c0000 { + ngd@1 { + wcd9335: codec@1{ + clock-names = "mclk", "slimbus"; + clocks = <&div1_mclk>, + <&rpmcc RPM_SMD_BB_CLK1>; + }; + }; + }; + mdss@900000 { status = "okay"; @@ -666,3 +688,75 @@ }; }; }; + +&sound { + compatible = "qcom,apq8096-sndcard"; + model = "DB820c"; + audio-routing = "RX_BIAS", "MCLK"; + + mm1-dai-link { + link-name = "MultiMedia1"; + cpu { + sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA1>; + }; + }; + + mm2-dai-link { + link-name = "MultiMedia2"; + cpu { + sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA2>; + }; + }; + + mm3-dai-link { + link-name = "MultiMedia3"; + cpu { + sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA3>; + }; + }; + + hdmi-dai-link { + link-name = "HDMI"; + cpu { + sound-dai = <&q6afedai HDMI_RX>; + }; + + platform { + sound-dai = <&q6routing>; + }; + + codec { + sound-dai = <&hdmi 0>; + }; + }; + + slim-dai-link { + link-name = "SLIM Playback"; + cpu { + sound-dai = <&q6afedai SLIMBUS_6_RX>; + }; + + platform { + sound-dai = <&q6routing>; + }; + + codec { + sound-dai = <&wcd9335 6>; + }; + }; + + slimcap-dai-link { + link-name = "SLIM Capture"; + cpu { + sound-dai = <&q6afedai SLIMBUS_0_TX>; + }; + + platform { + sound-dai = <&q6routing>; + }; + + codec { + sound-dai = <&wcd9335 1>; + }; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi b/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi index 131878db9852..fba2229b6236 100644 --- a/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi @@ -13,6 +13,49 @@ &msmgpio { + wcd9xxx_intr { + wcd_intr_default: wcd_intr_default{ + mux { + pins = "gpio54"; + function = "gpio"; + }; + + config { + pins = "gpio54"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* pull down */ + input-enable; + }; + }; + }; + + cdc_reset_ctrl { + cdc_reset_sleep: cdc_reset_sleep { + mux { + pins = "gpio64"; + function = "gpio"; + }; + config { + pins = "gpio64"; + drive-strength = <16>; + bias-disable; + output-low; + }; + }; + cdc_reset_active:cdc_reset_active { + mux { + pins = "gpio64"; + function = "gpio"; + }; + config { + pins = "gpio64"; + drive-strength = <16>; + bias-pull-down; + output-high; + }; + }; + }; + blsp1_spi0_default: blsp1_spi0_default { pinmux { function = "blsp_spi1"; diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index d46858644c3d..c4e7fde9d88e 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -14,6 +14,7 @@ #include #include #include +#include / { interrupt-parent = <&intc>; @@ -1336,6 +1337,33 @@ status = "disabled"; }; + lpass_q6_smmu: arm,smmu-lpass_q6@1600000 { + compatible = "qcom,msm8996-smmu-v2", "qcom,smmu-v2"; + reg = <0x1600000 0x20000>; + #iommu-cells = <1>; + power-domains = <&gcc HLOS1_VOTE_LPASS_CORE_GDSC>; + + #global-interrupts = <1>; + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + ; + + clocks = <&gcc GCC_HLOS1_VOTE_LPASS_CORE_SMMU_CLK>, + <&gcc GCC_HLOS1_VOTE_LPASS_ADSP_SMMU_CLK>; + clock-names = "iface", "bus"; + status = "disabled"; + }; + agnoc@0 { power-domains = <&gcc AGGRE0_NOC_GDSC>; compatible = "simple-pm-bus"; @@ -1502,6 +1530,66 @@ }; }; + slimbam:dma@9184000 + { + compatible = "qcom,bam-v1.7.0"; + qcom,controlled-remotely; + reg = <0x9184000 0x32000>; + num-channels = <31>; + interrupts = <0 164 IRQ_TYPE_LEVEL_HIGH>; + #dma-cells = <1>; + qcom,ee = <1>; + qcom,num-ees = <2>; + }; + + slim_msm: slim@91c0000 { + compatible = "qcom,slim-ngd-v1.5.0"; + reg = <0x91c0000 0x2C000>; + reg-names = "ctrl"; + interrupts = <0 163 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&slimbam 3>, <&slimbam 4>, + <&slimbam 5>, <&slimbam 6>; + dma-names = "rx", "tx", "tx2", "rx2"; + #address-cells = <1>; + #size-cells = <0>; + ngd@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <1>; + + tasha_ifd: tas-ifd { + compatible = "slim217,1a0"; + reg = <0 0>; + }; + + wcd9335: codec@1{ + pinctrl-0 = <&cdc_reset_active &wcd_intr_default>; + pinctrl-names = "default"; + + compatible = "slim217,1a0"; + reg = <1 0>; + + interrupt-parent = <&msmgpio>; + interrupts = <54 IRQ_TYPE_LEVEL_HIGH>, + <53 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "intr1", "intr2"; + interrupt-controller; + #interrupt-cells = <1>; + reset-gpios = <&msmgpio 64 0>; + + slim-ifc-dev = <&tasha_ifd>; + + vdd-buck-supply = <&pm8994_s4>; + vdd-buck-sido-supply = <&pm8994_s4>; + vdd-tx-supply = <&pm8994_s4>; + vdd-rx-supply = <&pm8994_s4>; + vdd-io-supply = <&pm8994_s4>; + + #sound-dai-cells = <1>; + }; + }; + }; + gpu@b00000 { compatible = "qcom,adreno-530.2", "qcom,adreno"; #stream-id-cells = <16>; @@ -1660,6 +1748,7 @@ phys = <&hdmi_phy>; phy-names = "hdmi_phy"; + #sound-dai-cells = <1>; ports { #address-cells = <1>; @@ -1698,6 +1787,9 @@ }; }; + sound: sound { + }; + adsp-pil { compatible = "qcom,msm8996-adsp-pil"; @@ -1724,6 +1816,55 @@ mboxes = <&apcs_glb 8>; qcom,smd-edge = <1>; qcom,remote-pid = <2>; + #address-cells = <1>; + #size-cells = <0>; + apr { + power-domains = <&gcc HLOS1_VOTE_LPASS_ADSP_GDSC>; + compatible = "qcom,apr-v2"; + qcom,smd-channels = "apr_audio_svc"; + reg = ; + #address-cells = <1>; + #size-cells = <0>; + + q6core { + reg = ; + compatible = "qcom,q6core"; + }; + + q6afe: q6afe { + compatible = "qcom,q6afe"; + reg = ; + q6afedai: dais { + compatible = "qcom,q6afe-dais"; + #address-cells = <1>; + #size-cells = <0>; + #sound-dai-cells = <1>; + hdmi@1 { + reg = <1>; + }; + }; + }; + + q6asm: q6asm { + compatible = "qcom,q6asm"; + reg = ; + q6asmdai: dais { + compatible = "qcom,q6asm-dais"; + #sound-dai-cells = <1>; + iommus = <&lpass_q6_smmu 1>; + }; + }; + + q6adm: q6adm { + compatible = "qcom,q6adm"; + reg = ; + q6routing: routing { + compatible = "qcom,q6adm-routing"; + #sound-dai-cells = <0>; + }; + }; + }; + }; }; -- cgit v1.3-14-g43fede From ad480e0149cfc10defe76e88354b977360adb7a1 Mon Sep 17 00:00:00 2001 From: Amit Kucheria Date: Thu, 25 Apr 2019 01:22:50 +0530 Subject: arm64: dts: msm8998-mtp: thermal: Remove skin and battery thermal zones The msm8998-mtp doesn't have TSENS-based sensors wired up for skin and battery thermal zones. TSENS sensors should be common across all boards using the SoC and shouldn't be board-specific as these entries. They also show the following error when trying to read the temperature cat: read error: Invalid argument Remove these board-specific erroneous thermal zones. Fixes: 4449b6f248d9 ("arm64: dts: qcom: msm8998: Add tsens and thermal-zones") Signed-off-by: Amit Kucheria Tested-by: Marc Gonzalez Signed-off-by: Andy Gross --- arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi | 38 ------------------------------- 1 file changed, 38 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi b/arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi index 6329ba4777cc..f09f3e03f708 100644 --- a/arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi @@ -15,44 +15,6 @@ stdout-path = "serial0:115200n8"; }; - thermal-zones { - battery-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - - thermal-sensors = <&tsens0 0>; - - trips { - battery_crit: trip0 { - temperature = <60000>; - hysteresis = <2000>; - type = "critical"; - }; - }; - }; - - skin-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - - thermal-sensors = <&tsens1 5>; - - trips { - skin_alert: trip0 { - temperature = <44000>; - hysteresis = <2000>; - type = "passive"; - }; - - skip_crit: trip1 { - temperature = <70000>; - hysteresis = <2000>; - type = "critical"; - }; - }; - }; - }; - vph_pwr: vph-pwr-regulator { compatible = "regulator-fixed"; regulator-name = "vph_pwr"; -- cgit v1.3-14-g43fede From 280acabbaa11db3027dcad86feb56508efdd34fb Mon Sep 17 00:00:00 2001 From: Amit Kucheria Date: Thu, 25 Apr 2019 01:52:44 +0530 Subject: arm64: dts: msm8998: thermal: Fix number of supported sensors msm8998 has 22 sensors connected in total, 14 on the 1st controller, 8 on the 2nd controller. Increase the number to allow sensors with ID 12 and 13 to be registered. Signed-off-by: Amit Kucheria Tested-by: Marc Gonzalez Signed-off-by: Andy Gross --- arch/arm64/boot/dts/qcom/msm8998.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi index 32ed67cb1f97..d28a7f6fd413 100644 --- a/arch/arm64/boot/dts/qcom/msm8998.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi @@ -745,7 +745,7 @@ reg = <0x10ab000 0x1000>, /* TM */ <0x10aa000 0x1000>; /* SROT */ - #qcom,sensors = <12>; + #qcom,sensors = <14>; #thermal-sensor-cells = <1>; }; -- cgit v1.3-14-g43fede From 060f4211f6c655e69ba24fe6d741c6e33fbfa108 Mon Sep 17 00:00:00 2001 From: Amit Kucheria Date: Thu, 25 Apr 2019 11:53:27 +0530 Subject: arm64: dts: msm8998: thermal: Restrict thermal zone name length to under 20 The thermal core restricts names of thermal zones to under 20 characters. Fix the names for a couple of msm8998 thermal zones. Signed-off-by: Amit Kucheria Tested-by: Marc Gonzalez Signed-off-by: Andy Gross --- arch/arm64/boot/dts/qcom/msm8998.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi index d28a7f6fd413..574be78a936e 100644 --- a/arch/arm64/boot/dts/qcom/msm8998.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi @@ -536,7 +536,7 @@ }; }; - cluster0-mhm-thermal { + clust0-mhm-thermal { polling-delay-passive = <250>; polling-delay = <1000>; @@ -551,7 +551,7 @@ }; }; - cluster1-mhm-thermal { + clust1-mhm-thermal { polling-delay-passive = <250>; polling-delay = <1000>; -- cgit v1.3-14-g43fede