From 9d030e170608aeb287ef56ecb40d9aa4cfa7d086 Mon Sep 17 00:00:00 2001 From: Ray Jui Date: Mon, 21 Sep 2015 10:17:17 -0700 Subject: dt-bindings: Add Cygnus PCIe PHY binding doc Add DT binding document for Broadcom Cygnus PCIe PHYs Signed-off-by: Ray Jui Reviewed-by: Arun Parameswaran Reviewed-by: JD (Jiandong) Zheng Reviewed-by: Scott Branden Signed-off-by: Kishon Vijay Abraham I --- .../bindings/phy/brcm,cygnus-pcie-phy.txt | 47 ++++++++++++++++++++++ 1 file changed, 47 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/brcm,cygnus-pcie-phy.txt diff --git a/Documentation/devicetree/bindings/phy/brcm,cygnus-pcie-phy.txt b/Documentation/devicetree/bindings/phy/brcm,cygnus-pcie-phy.txt new file mode 100644 index 000000000000..761c4bc24a9b --- /dev/null +++ b/Documentation/devicetree/bindings/phy/brcm,cygnus-pcie-phy.txt @@ -0,0 +1,47 @@ +Broadcom Cygnus PCIe PHY + +Required properties: +- compatible: must be "brcm,cygnus-pcie-phy" +- reg: base address and length of the PCIe PHY block +- #address-cells: must be 1 +- #size-cells: must be 0 + +Each PCIe PHY should be represented by a child node + +Required properties For the child node: +- reg: the PHY ID +0 - PCIe RC 0 +1 - PCIe RC 1 +- #phy-cells: must be 0 + +Example: + pcie_phy: phy@0301d0a0 { + compatible = "brcm,cygnus-pcie-phy"; + reg = <0x0301d0a0 0x14>; + + pcie0_phy: phy@0 { + reg = <0>; + #phy-cells = <0>; + }; + + pcie1_phy: phy@1 { + reg = <1>; + #phy-cells = <0>; + }; + }; + + /* users of the PCIe phy */ + + pcie0: pcie@18012000 { + ... + ... + phys = <&pcie0_phy>; + phy-names = "pcie-phy"; + }; + + pcie1: pcie@18013000 { + ... + ... + phys = ; + phy-names = "pcie-phy"; + }; -- cgit v1.2.3-59-g8ed1b