From adc7af464ceba1962c2eb875a97f4d3bd82fbc5f Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Wed, 1 May 2019 10:40:10 +0200 Subject: staging: rtlwifi: move remaining phydm .h files The rtl8188eu driver uses the phydm .h files from the rtlwifi driver, but now that the rtlwifi driver is gone, it's silly to have a whole directory for just 2 .h files. So move these files into the rtl8188eu driver's directory so that it can be self-contained. Signed-off-by: Greg Kroah-Hartman --- drivers/staging/rtl8188eu/include/odm_precomp.h | 4 +- drivers/staging/rtl8188eu/include/phydm_reg.h | 22 +++++++++ .../staging/rtl8188eu/include/phydm_regdefine11n.h | 53 ++++++++++++++++++++++ drivers/staging/rtlwifi/phydm/phydm_reg.h | 22 --------- drivers/staging/rtlwifi/phydm/phydm_regdefine11n.h | 53 ---------------------- 5 files changed, 77 insertions(+), 77 deletions(-) create mode 100644 drivers/staging/rtl8188eu/include/phydm_reg.h create mode 100644 drivers/staging/rtl8188eu/include/phydm_regdefine11n.h delete mode 100644 drivers/staging/rtlwifi/phydm/phydm_reg.h delete mode 100644 drivers/staging/rtlwifi/phydm/phydm_regdefine11n.h diff --git a/drivers/staging/rtl8188eu/include/odm_precomp.h b/drivers/staging/rtl8188eu/include/odm_precomp.h index 6efddc8f1675..df096c37f5eb 100644 --- a/drivers/staging/rtl8188eu/include/odm_precomp.h +++ b/drivers/staging/rtl8188eu/include/odm_precomp.h @@ -24,12 +24,12 @@ #include "odm.h" #include "odm_hwconfig.h" #include "odm_debug.h" -#include "../../rtlwifi/phydm/phydm_regdefine11n.h" +#include "phydm_regdefine11n.h" #include "hal8188e_rate_adaptive.h" /* for RA,Power training */ #include "rtl8188e_hal.h" -#include "../../rtlwifi/phydm/phydm_reg.h" +#include "phydm_reg.h" #include "odm_rtl8188e.h" diff --git a/drivers/staging/rtl8188eu/include/phydm_reg.h b/drivers/staging/rtl8188eu/include/phydm_reg.h new file mode 100644 index 000000000000..e3ae006487ba --- /dev/null +++ b/drivers/staging/rtl8188eu/include/phydm_reg.h @@ -0,0 +1,22 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/****************************************************************************** + * + * Copyright(c) 2007 - 2016 Realtek Corporation. + * + * Contact Information: + * wlanfae + * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, + * Hsinchu 300, Taiwan. + * + * Larry Finger + * + *****************************************************************************/ +#ifndef __HAL_ODM_REG_H__ +#define __HAL_ODM_REG_H__ + +#define ODM_EDCA_VO_PARAM 0x500 +#define ODM_EDCA_VI_PARAM 0x504 +#define ODM_EDCA_BE_PARAM 0x508 +#define ODM_EDCA_BK_PARAM 0x50C + +#endif diff --git a/drivers/staging/rtl8188eu/include/phydm_regdefine11n.h b/drivers/staging/rtl8188eu/include/phydm_regdefine11n.h new file mode 100644 index 000000000000..565996828cab --- /dev/null +++ b/drivers/staging/rtl8188eu/include/phydm_regdefine11n.h @@ -0,0 +1,53 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/****************************************************************************** + * + * Copyright(c) 2007 - 2016 Realtek Corporation. + * + * Contact Information: + * wlanfae + * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, + * Hsinchu 300, Taiwan. + * + * Larry Finger + * + *****************************************************************************/ + +#ifndef __ODM_REGDEFINE11N_H__ +#define __ODM_REGDEFINE11N_H__ + +#define ODM_REG_TX_ANT_CTRL_11N 0x80C +#define ODM_REG_RX_DEFAULT_A_11N 0x858 +#define ODM_REG_ANTSEL_CTRL_11N 0x860 +#define ODM_REG_RX_ANT_CTRL_11N 0x864 +#define ODM_REG_PIN_CTRL_11N 0x870 +#define ODM_REG_SC_CNT_11N 0x8C4 + +#define ODM_REG_ANT_MAPPING1_11N 0x914 + +#define ODM_REG_CCK_ANTDIV_PARA1_11N 0xA00 +#define ODM_REG_CCK_CCA_11N 0xA0A +#define ODM_REG_CCK_ANTDIV_PARA2_11N 0xA0C +#define ODM_REG_CCK_FA_RST_11N 0xA2C +#define ODM_REG_CCK_FA_MSB_11N 0xA58 +#define ODM_REG_CCK_FA_LSB_11N 0xA5C +#define ODM_REG_CCK_CCA_CNT_11N 0xA60 +#define ODM_REG_BB_PWR_SAV4_11N 0xA74 + +#define ODM_REG_LNA_SWITCH_11N 0xB2C + +#define ODM_REG_OFDM_FA_HOLDC_11N 0xC00 +#define ODM_REG_IGI_A_11N 0xC50 +#define ODM_REG_ANTDIV_PARA1_11N 0xCA4 +#define ODM_REG_OFDM_FA_TYPE1_11N 0xCF0 + +#define ODM_REG_OFDM_FA_RSTD_11N 0xD00 +#define ODM_REG_OFDM_FA_TYPE2_11N 0xDA0 +#define ODM_REG_OFDM_FA_TYPE3_11N 0xDA4 +#define ODM_REG_OFDM_FA_TYPE4_11N 0xDA8 + +#define ODM_REG_ANTSEL_PIN_11N 0x4C +#define ODM_REG_RESP_TX_11N 0x6D8 + +#define ODM_BIT_IGI_11N 0x0000007F + +#endif diff --git a/drivers/staging/rtlwifi/phydm/phydm_reg.h b/drivers/staging/rtlwifi/phydm/phydm_reg.h deleted file mode 100644 index e3ae006487ba..000000000000 --- a/drivers/staging/rtlwifi/phydm/phydm_reg.h +++ /dev/null @@ -1,22 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/****************************************************************************** - * - * Copyright(c) 2007 - 2016 Realtek Corporation. - * - * Contact Information: - * wlanfae - * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, - * Hsinchu 300, Taiwan. - * - * Larry Finger - * - *****************************************************************************/ -#ifndef __HAL_ODM_REG_H__ -#define __HAL_ODM_REG_H__ - -#define ODM_EDCA_VO_PARAM 0x500 -#define ODM_EDCA_VI_PARAM 0x504 -#define ODM_EDCA_BE_PARAM 0x508 -#define ODM_EDCA_BK_PARAM 0x50C - -#endif diff --git a/drivers/staging/rtlwifi/phydm/phydm_regdefine11n.h b/drivers/staging/rtlwifi/phydm/phydm_regdefine11n.h deleted file mode 100644 index 565996828cab..000000000000 --- a/drivers/staging/rtlwifi/phydm/phydm_regdefine11n.h +++ /dev/null @@ -1,53 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/****************************************************************************** - * - * Copyright(c) 2007 - 2016 Realtek Corporation. - * - * Contact Information: - * wlanfae - * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, - * Hsinchu 300, Taiwan. - * - * Larry Finger - * - *****************************************************************************/ - -#ifndef __ODM_REGDEFINE11N_H__ -#define __ODM_REGDEFINE11N_H__ - -#define ODM_REG_TX_ANT_CTRL_11N 0x80C -#define ODM_REG_RX_DEFAULT_A_11N 0x858 -#define ODM_REG_ANTSEL_CTRL_11N 0x860 -#define ODM_REG_RX_ANT_CTRL_11N 0x864 -#define ODM_REG_PIN_CTRL_11N 0x870 -#define ODM_REG_SC_CNT_11N 0x8C4 - -#define ODM_REG_ANT_MAPPING1_11N 0x914 - -#define ODM_REG_CCK_ANTDIV_PARA1_11N 0xA00 -#define ODM_REG_CCK_CCA_11N 0xA0A -#define ODM_REG_CCK_ANTDIV_PARA2_11N 0xA0C -#define ODM_REG_CCK_FA_RST_11N 0xA2C -#define ODM_REG_CCK_FA_MSB_11N 0xA58 -#define ODM_REG_CCK_FA_LSB_11N 0xA5C -#define ODM_REG_CCK_CCA_CNT_11N 0xA60 -#define ODM_REG_BB_PWR_SAV4_11N 0xA74 - -#define ODM_REG_LNA_SWITCH_11N 0xB2C - -#define ODM_REG_OFDM_FA_HOLDC_11N 0xC00 -#define ODM_REG_IGI_A_11N 0xC50 -#define ODM_REG_ANTDIV_PARA1_11N 0xCA4 -#define ODM_REG_OFDM_FA_TYPE1_11N 0xCF0 - -#define ODM_REG_OFDM_FA_RSTD_11N 0xD00 -#define ODM_REG_OFDM_FA_TYPE2_11N 0xDA0 -#define ODM_REG_OFDM_FA_TYPE3_11N 0xDA4 -#define ODM_REG_OFDM_FA_TYPE4_11N 0xDA8 - -#define ODM_REG_ANTSEL_PIN_11N 0x4C -#define ODM_REG_RESP_TX_11N 0x6D8 - -#define ODM_BIT_IGI_11N 0x0000007F - -#endif -- cgit v1.2.3-59-g8ed1b