From bb916ebbeabd18f7dc3c661275d2c9d343f4fa85 Mon Sep 17 00:00:00 2001 From: Doug Anderson Date: Wed, 13 Mar 2013 20:40:00 +0000 Subject: iio: adc: Add dt support for turning on the phy in exynos-adc Without this change the exynos adc controller needed to have its phy enabled in some out-of-driver C code. Add support for specifying the phy enable register by listing it in the reg list. Signed-off-by: Doug Anderson Tested-by: Naveen Krishna Chatradhi Signed-off-by: Jonathan Cameron --- Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt') diff --git a/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt b/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt index f68637861b05..05e9d95ede5c 100644 --- a/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt +++ b/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt @@ -15,7 +15,7 @@ Required properties: Must be "samsung,exynos-adc-v2" for future controllers. - reg: Contains ADC register address range (base address and - length). + length) and the address of the phy enable register. - interrupts: Contains the interrupt information for the timer. The format is being dependent on which interrupt controller the Samsung device uses. @@ -27,7 +27,7 @@ Example: adding device info in dtsi file adc: adc@12D10000 { compatible = "samsung,exynos-adc-v1"; - reg = <0x12D10000 0x100>; + reg = <0x12D10000 0x100>, <0x10040718 0x4>; interrupts = <0 106 0>; #io-channel-cells = <1>; io-channel-ranges; -- cgit v1.2.3-59-g8ed1b