From eb8f53b6d3125894e3d825976eb7e03150496362 Mon Sep 17 00:00:00 2001 From: Thierry Reding Date: Fri, 27 Apr 2018 11:15:51 +0200 Subject: dt-bindings: Relocate Tegra20 memory controller bindings Move the device tree bindings for the Tegra20 memory controller to the same location as the Tegra30 (and later) memory controller bindings. Signed-off-by: Thierry Reding --- .../bindings/arm/tegra/nvidia,tegra20-mc.txt | 26 ---------------------- 1 file changed, 26 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-mc.txt (limited to 'Documentation/devicetree/bindings/arm/tegra') diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-mc.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-mc.txt deleted file mode 100644 index 7d60a50a4fa1..000000000000 --- a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-mc.txt +++ /dev/null @@ -1,26 +0,0 @@ -NVIDIA Tegra20 MC(Memory Controller) - -Required properties: -- compatible : "nvidia,tegra20-mc" -- reg : Should contain 2 register ranges(address and length); see the - example below. Note that the MC registers are interleaved with the - GART registers, and hence must be represented as multiple ranges. -- interrupts : Should contain MC General interrupt. -- #reset-cells : Should be 1. This cell represents memory client module ID. - The assignments may be found in header file - or in the TRM documentation. - -Example: - mc: memory-controller@7000f000 { - compatible = "nvidia,tegra20-mc"; - reg = <0x7000f000 0x024 - 0x7000f03c 0x3c4>; - interrupts = <0 77 0x04>; - #reset-cells = <1>; - }; - - video-codec@6001a000 { - compatible = "nvidia,tegra20-vde"; - ... - resets = <&mc TEGRA20_MC_RESET_VDE>; - }; -- cgit v1.2.3-59-g8ed1b