From 437dd8c3c20fa750a9db2e6b39b5e2ff7d01c79e Mon Sep 17 00:00:00 2001 From: Tang Yuantian Date: Mon, 7 Sep 2015 16:23:15 +0800 Subject: devicetree:bindings: add devicetree bindings for Freescale AHCI adds bindings for Freescale QorIQ AHCI SATA controller. Signed-off-by: Tang Yuantian Reviewed-by: Hans de Goede Signed-off-by: Tejun Heo --- .../devicetree/bindings/ata/ahci-fsl-qoriq.txt | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) create mode 100644 Documentation/devicetree/bindings/ata/ahci-fsl-qoriq.txt (limited to 'Documentation/devicetree/bindings/ata') diff --git a/Documentation/devicetree/bindings/ata/ahci-fsl-qoriq.txt b/Documentation/devicetree/bindings/ata/ahci-fsl-qoriq.txt new file mode 100644 index 000000000000..b614e3b1008b --- /dev/null +++ b/Documentation/devicetree/bindings/ata/ahci-fsl-qoriq.txt @@ -0,0 +1,21 @@ +Binding for Freescale QorIQ AHCI SATA Controller + +Required properties: + - reg: Physical base address and size of the controller's register area. + - compatible: Compatibility string. Must be 'fsl,-ahci', where + chip could be ls1021a, ls2085a, ls1043a etc. + - clocks: Input clock specifier. Refer to common clock bindings. + - interrupts: Interrupt specifier. Refer to interrupt binding. + +Optional properties: + - dma-coherent: Enable ACHI coherency DMA operation. + - reg-names: register area names when there are more then 1 regster area. + +Examples: + sata@3200000 { + compatible = "fsl,ls1021a-ahci"; + reg = <0x0 0x3200000 0x0 0x10000>; + interrupts = ; + clocks = <&platform_clk 1>; + dma-coherent; + }; -- cgit v1.2.3-59-g8ed1b